[turbofan] Fix the node matchers.

src/compiler/arm64/instruction-selector-arm64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 
 namespace v8 {
 namespace internal {
 namespace compiler {
@@ skipping 16 matching lines @@
       : OperandGenerator(selector) {}
 
   InstructionOperand* UseOperand(Node* node, ImmediateMode mode) {
     if (CanBeImmediate(node, mode)) {
       return UseImmediate(node);
     }
     return UseRegister(node);
   }
 
   bool CanBeImmediate(Node* node, ImmediateMode mode) {
-    int64_t value;
-    switch (node->opcode()) {
-      // TODO(turbofan): SMI number constants as immediates.
-      case IrOpcode::kInt32Constant:
-        value = ValueOf<int32_t>(node->op());
-        break;
-      default:
-        return false;
-    }
+    Int32Matcher m(node);
+    if (!m.HasValue()) return false;
+    int64_t value = m.Value();
     unsigned ignored;
     switch (mode) {
       case kLogical32Imm:
         // TODO(dcarney): some unencodable values can be handled by
         // switching instructions.
         return Assembler::IsImmLogical(static_cast<uint64_t>(value), 32,
                                        &ignored, &ignored, &ignored);
       case kLogical64Imm:
         return Assembler::IsImmLogical(static_cast<uint64_t>(value), 64,
                                        &ignored, &ignored, &ignored);
@@ skipping 196 matching lines @@
 void InstructionSelector::VisitWord32Or(Node* node) {
   VisitBinop(this, node, kArm64Or32, kLogical32Imm);
 }
 
 
 void InstructionSelector::VisitWord64Or(Node* node) {
   VisitBinop(this, node, kArm64Or, kLogical64Imm);
 }
 
 
-template <typename T>
-static void VisitXor(InstructionSelector* selector, Node* node,
-                     ArchOpcode xor_opcode, ArchOpcode not_opcode) {
-  Arm64OperandGenerator g(selector);
-  BinopMatcher<IntMatcher<T>, IntMatcher<T> > m(node);
+void InstructionSelector::VisitWord32Xor(Node* node) {
+  Arm64OperandGenerator g(this);
+  Int32BinopMatcher m(node);
   if (m.right().Is(-1)) {
-    selector->Emit(not_opcode, g.DefineAsRegister(node),
-                   g.UseRegister(m.left().node()));
+    Emit(kArm64Not32, g.DefineAsRegister(node), g.UseRegister(m.left().node()));
   } else {
-    VisitBinop(selector, node, xor_opcode, kLogical32Imm);
+    VisitBinop(this, node, kArm64Xor32, kLogical32Imm);
   }
 }
 
 
-void InstructionSelector::VisitWord32Xor(Node* node) {
-  VisitXor<int32_t>(this, node, kArm64Xor32, kArm64Not32);
+void InstructionSelector::VisitWord64Xor(Node* node) {
+  Arm64OperandGenerator g(this);
+  Int64BinopMatcher m(node);
+  if (m.right().Is(-1)) {
+    Emit(kArm64Not, g.DefineAsRegister(node), g.UseRegister(m.left().node()));
+  } else {
+    VisitBinop(this, node, kArm64Xor, kLogical32Imm);
+  }
 }
 
 
-void InstructionSelector::VisitWord64Xor(Node* node) {
-  VisitXor<int64_t>(this, node, kArm64Xor, kArm64Not);
-}
-
-
 void InstructionSelector::VisitWord32Shl(Node* node) {
   VisitRRO(this, kArm64Shl32, node, kShift32Imm);
 }
 
 
 void InstructionSelector::VisitWord64Shl(Node* node) {
   VisitRRO(this, kArm64Shl, node, kShift64Imm);
 }
 
 
@@ skipping 30 matching lines @@
 void InstructionSelector::VisitInt32Add(Node* node) {
   VisitBinop(this, node, kArm64Add32, kArithimeticImm);
 }
 
 
 void InstructionSelector::VisitInt64Add(Node* node) {
   VisitBinop(this, node, kArm64Add, kArithimeticImm);
 }
 
 
-template <typename T>
-static void VisitSub(InstructionSelector* selector, Node* node,
-                     ArchOpcode sub_opcode, ArchOpcode neg_opcode) {
-  Arm64OperandGenerator g(selector);
-  BinopMatcher<IntMatcher<T>, IntMatcher<T> > m(node);
+void InstructionSelector::VisitInt32Sub(Node* node) {
+  Arm64OperandGenerator g(this);
+  Int32BinopMatcher m(node);
   if (m.left().Is(0)) {
-    selector->Emit(neg_opcode, g.DefineAsRegister(node),
-                   g.UseRegister(m.right().node()));
+    Emit(kArm64Neg32, g.DefineAsRegister(node),
+         g.UseRegister(m.right().node()));
   } else {
-    VisitBinop(selector, node, sub_opcode, kArithimeticImm);
+    VisitBinop(this, node, kArm64Sub32, kArithimeticImm);
   }
 }
 
 
-void InstructionSelector::VisitInt32Sub(Node* node) {
-  VisitSub<int32_t>(this, node, kArm64Sub32, kArm64Neg32);
+void InstructionSelector::VisitInt64Sub(Node* node) {
+  Arm64OperandGenerator g(this);
+  Int64BinopMatcher m(node);
+  if (m.left().Is(0)) {
+    Emit(kArm64Neg, g.DefineAsRegister(node), g.UseRegister(m.right().node()));
+  } else {
+    VisitBinop(this, node, kArm64Sub, kArithimeticImm);
+  }
 }
 
 
-void InstructionSelector::VisitInt64Sub(Node* node) {
-  VisitSub<int64_t>(this, node, kArm64Sub, kArm64Neg);
-}
-
-
 void InstructionSelector::VisitInt32Mul(Node* node) {
   VisitRRR(this, kArm64Mul32, node);
 }
 
 
 void InstructionSelector::VisitInt64Mul(Node* node) {
   VisitRRR(this, kArm64Mul, node);
 }
 
 
@@ skipping 296 matching lines @@
   // Caller clean up of stack for C-style calls.
   if (is_c_frame && aligned_push_count > 0) {
     DCHECK(deoptimization == NULL && continuation == NULL);
     Emit(kArchDrop | MiscField::encode(aligned_push_count), NULL);
   }
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8