[turbofan] Fix the node matchers.

src/compiler/arm/instruction-selector-arm.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/base/bits.h"
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 
 namespace v8 {
 namespace internal {
 namespace compiler {
 
 // Adds Arm-specific methods for generating InstructionOperands.
 class ArmOperandGenerator FINAL : public OperandGenerator {
  public:
   explicit ArmOperandGenerator(InstructionSelector* selector)
       : OperandGenerator(selector) {}
 
   InstructionOperand* UseOperand(Node* node, InstructionCode opcode) {
     if (CanBeImmediate(node, opcode)) {
       return UseImmediate(node);
     }
     return UseRegister(node);
   }
 
   bool CanBeImmediate(Node* node, InstructionCode opcode) {
-    int32_t value;
-    switch (node->opcode()) {
-      case IrOpcode::kInt32Constant:
-      case IrOpcode::kNumberConstant:
-        value = ValueOf<int32_t>(node->op());
-        break;
-      default:
-        return false;
-    }
+    Int32Matcher m(node);
+    if (!m.HasValue()) return false;
+    int32_t value = m.Value();
     switch (ArchOpcodeField::decode(opcode)) {
       case kArmAnd:
       case kArmMov:
       case kArmMvn:
       case kArmBic:
         return ImmediateFitsAddrMode1Instruction(value) ||
                ImmediateFitsAddrMode1Instruction(~value);
 
       case kArmAdd:
       case kArmSub:
@@ skipping 906 matching lines @@
   } else {
     DCHECK(cont->IsSet());
     Emit(cont->Encode(kArmVcmpF64), g.DefineAsRegister(cont->result()),
          g.UseRegister(m.left().node()), g.UseRegister(m.right().node()));
   }
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8