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Issue 551823004: Reland r23732: ARM64: Fix and improve --trace-sim register trace. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 3 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <assert.h> 5 #include <assert.h>
6 #include <stdarg.h> 6 #include <stdarg.h>
7 #include <stdio.h> 7 #include <stdio.h>
8 #include <string.h> 8 #include <string.h>
9 9
10 #include "src/v8.h" 10 #include "src/v8.h"
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1510 1510
1511 int Disassembler::SubstituteLiteralField(Instruction* instr, 1511 int Disassembler::SubstituteLiteralField(Instruction* instr,
1512 const char* format) { 1512 const char* format) {
1513 DCHECK(strncmp(format, "LValue", 6) == 0); 1513 DCHECK(strncmp(format, "LValue", 6) == 0);
1514 USE(format); 1514 USE(format);
1515 1515
1516 switch (instr->Mask(LoadLiteralMask)) { 1516 switch (instr->Mask(LoadLiteralMask)) {
1517 case LDR_w_lit: 1517 case LDR_w_lit:
1518 case LDR_x_lit: 1518 case LDR_x_lit:
1519 case LDR_s_lit: 1519 case LDR_s_lit:
1520 case LDR_d_lit: AppendToOutput("(addr %p)", instr->LiteralAddress()); break; 1520 case LDR_d_lit:
1521 AppendToOutput("(addr 0x%016" PRIxPTR ")", instr->LiteralAddress());
1522 break;
1521 default: UNREACHABLE(); 1523 default: UNREACHABLE();
1522 } 1524 }
1523 1525
1524 return 6; 1526 return 6;
1525 } 1527 }
1526 1528
1527 1529
1528 int Disassembler::SubstituteShiftField(Instruction* instr, const char* format) { 1530 int Disassembler::SubstituteShiftField(Instruction* instr, const char* format) {
1529 DCHECK(format[0] == 'H'); 1531 DCHECK(format[0] == 'H');
1530 DCHECK(instr->ShiftDP() <= 0x3); 1532 DCHECK(instr->ShiftDP() <= 0x3);
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1823 decoder.AppendVisitor(&disasm); 1825 decoder.AppendVisitor(&disasm);
1824 1826
1825 for (byte* pc = start; pc < end; pc += v8::internal::kInstructionSize) { 1827 for (byte* pc = start; pc < end; pc += v8::internal::kInstructionSize) {
1826 decoder.Decode(reinterpret_cast<v8::internal::Instruction*>(pc)); 1828 decoder.Decode(reinterpret_cast<v8::internal::Instruction*>(pc));
1827 } 1829 }
1828 } 1830 }
1829 1831
1830 } // namespace disasm 1832 } // namespace disasm
1831 1833
1832 #endif // V8_TARGET_ARCH_ARM64 1834 #endif // V8_TARGET_ARCH_ARM64
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