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Side by Side Diff: src/arm64/assembler-arm64.h

Issue 550113002: [turbofan] Tests and fixes for ARM64 load/store with immediate offset. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Updated patch after changes arround ptrdiff_t. Created 6 years, 3 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_ARM64_ASSEMBLER_ARM64_H_ 5 #ifndef V8_ARM64_ASSEMBLER_ARM64_H_
6 #define V8_ARM64_ASSEMBLER_ARM64_H_ 6 #define V8_ARM64_ASSEMBLER_ARM64_H_
7 7
8 #include <list> 8 #include <list>
9 #include <map> 9 #include <map>
10 #include <vector> 10 #include <vector>
(...skipping 1832 matching lines...) Expand 10 before | Expand all | Expand 10 after
1843 inline static Instr ImmLS(int imm9); 1843 inline static Instr ImmLS(int imm9);
1844 inline static Instr ImmLSPair(int imm7, LSDataSize size); 1844 inline static Instr ImmLSPair(int imm7, LSDataSize size);
1845 inline static Instr ImmShiftLS(unsigned shift_amount); 1845 inline static Instr ImmShiftLS(unsigned shift_amount);
1846 inline static Instr ImmException(int imm16); 1846 inline static Instr ImmException(int imm16);
1847 inline static Instr ImmSystemRegister(int imm15); 1847 inline static Instr ImmSystemRegister(int imm15);
1848 inline static Instr ImmHint(int imm7); 1848 inline static Instr ImmHint(int imm7);
1849 inline static Instr ImmBarrierDomain(int imm2); 1849 inline static Instr ImmBarrierDomain(int imm2);
1850 inline static Instr ImmBarrierType(int imm2); 1850 inline static Instr ImmBarrierType(int imm2);
1851 inline static LSDataSize CalcLSDataSize(LoadStoreOp op); 1851 inline static LSDataSize CalcLSDataSize(LoadStoreOp op);
1852 1852
1853 static bool IsImmLSUnscaled(int64_t offset);
1854 static bool IsImmLSScaled(int64_t offset, LSDataSize size);
1855
1853 // Move immediates encoding. 1856 // Move immediates encoding.
1854 inline static Instr ImmMoveWide(uint64_t imm); 1857 inline static Instr ImmMoveWide(uint64_t imm);
1855 inline static Instr ShiftMoveWide(int64_t shift); 1858 inline static Instr ShiftMoveWide(int64_t shift);
1856 1859
1857 // FP Immediates. 1860 // FP Immediates.
1858 static Instr ImmFP32(float imm); 1861 static Instr ImmFP32(float imm);
1859 static Instr ImmFP64(double imm); 1862 static Instr ImmFP64(double imm);
1860 inline static Instr FPScale(unsigned scale); 1863 inline static Instr FPScale(unsigned scale);
1861 1864
1862 // FP register type. 1865 // FP register type.
(...skipping 63 matching lines...) Expand 10 before | Expand all | Expand 10 after
1926 1929
1927 DISALLOW_IMPLICIT_CONSTRUCTORS(BlockPoolsScope); 1930 DISALLOW_IMPLICIT_CONSTRUCTORS(BlockPoolsScope);
1928 }; 1931 };
1929 1932
1930 protected: 1933 protected:
1931 inline const Register& AppropriateZeroRegFor(const CPURegister& reg) const; 1934 inline const Register& AppropriateZeroRegFor(const CPURegister& reg) const;
1932 1935
1933 void LoadStore(const CPURegister& rt, 1936 void LoadStore(const CPURegister& rt,
1934 const MemOperand& addr, 1937 const MemOperand& addr,
1935 LoadStoreOp op); 1938 LoadStoreOp op);
1936 static bool IsImmLSUnscaled(int64_t offset);
1937 static bool IsImmLSScaled(int64_t offset, LSDataSize size);
1938 1939
1939 void LoadStorePair(const CPURegister& rt, const CPURegister& rt2, 1940 void LoadStorePair(const CPURegister& rt, const CPURegister& rt2,
1940 const MemOperand& addr, LoadStorePairOp op); 1941 const MemOperand& addr, LoadStorePairOp op);
1941 static bool IsImmLSPair(int64_t offset, LSDataSize size); 1942 static bool IsImmLSPair(int64_t offset, LSDataSize size);
1942 1943
1943 void Logical(const Register& rd, 1944 void Logical(const Register& rd,
1944 const Register& rn, 1945 const Register& rn,
1945 const Operand& operand, 1946 const Operand& operand,
1946 LogicalOp op); 1947 LogicalOp op);
1947 void LogicalImmediate(const Register& rd, 1948 void LogicalImmediate(const Register& rd,
(...skipping 342 matching lines...) Expand 10 before | Expand all | Expand 10 after
2290 class EnsureSpace BASE_EMBEDDED { 2291 class EnsureSpace BASE_EMBEDDED {
2291 public: 2292 public:
2292 explicit EnsureSpace(Assembler* assembler) { 2293 explicit EnsureSpace(Assembler* assembler) {
2293 assembler->CheckBufferSpace(); 2294 assembler->CheckBufferSpace();
2294 } 2295 }
2295 }; 2296 };
2296 2297
2297 } } // namespace v8::internal 2298 } } // namespace v8::internal
2298 2299
2299 #endif // V8_ARM64_ASSEMBLER_ARM64_H_ 2300 #endif // V8_ARM64_ASSEMBLER_ARM64_H_
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