Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(252)

Side by Side Diff: src/mips/assembler-mips-inl.h

Issue 549079: Support for MIPS in architecture independent files.... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 10 years, 11 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
OLDNEW
(Empty)
1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved.
3 //
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are
6 // met:
7 //
8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer.
10 //
11 // - Redistribution in binary form must reproduce the above copyright
12 // notice, this list of conditions and the following disclaimer in the
13 // documentation and/or other materials provided with the distribution.
14 //
15 // - Neither the name of Sun Microsystems or the names of contributors may
16 // be used to endorse or promote products derived from this software without
17 // specific prior written permission.
18 //
19 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
20 // IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 // THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 // PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
23 // CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 // PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
26 // PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
27 // LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
28 // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
29 // SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30
31 // The original source code covered by the above license above has been
32 // modified significantly by Google Inc.
33 // Copyright 2006-2008 the V8 project authors. All rights reserved.
34
35
36 #ifndef V8_MIPS_ASSEMBLER_MIPS_INL_H_
37 #define V8_MIPS_ASSEMBLER_MIPS_INL_H_
38
39 #include "mips/assembler-mips.h"
40 #include "cpu.h"
41
42
43 namespace v8 {
44 namespace internal {
45
46 // -----------------------------------------------------------------------------
47 // Condition
48
49 // TOCHECK : Seems ok for now, but check this when more infos on mips conditions
50 Condition NegateCondition(Condition cc) {
51 ASSERT(cc != cc_always);
52 return static_cast<Condition>(cc ^ 1);
53 }
54
55
56 // -----------------------------------------------------------------------------
57 // Operand and MemOperand
58
59 Operand::Operand(int32_t immediate, RelocInfo::Mode rmode) {
60 rm_ = no_reg;
61 imm32_ = immediate;
62 rmode_ = rmode;
63 }
64
65 Operand::Operand(const ExternalReference& f) {
66 rm_ = no_reg;
67 imm32_ = reinterpret_cast<int32_t>(f.address());
68 rmode_ = RelocInfo::EXTERNAL_REFERENCE;
69 }
70
71 Operand::Operand(const char* s) {
72 rm_ = no_reg;
73 imm32_ = reinterpret_cast<int32_t>(s);
74 rmode_ = RelocInfo::EMBEDDED_STRING;
75 }
76
77 Operand::Operand(Object** opp) {
78 rm_ = no_reg;
79 imm32_ = reinterpret_cast<int32_t>(opp);
80 rmode_ = RelocInfo::NONE;
81 }
82
83 Operand::Operand(Context** cpp) {
84 rm_ = no_reg;
85 imm32_ = reinterpret_cast<int32_t>(cpp);
86 rmode_ = RelocInfo::NONE;
87 }
88
89 Operand::Operand(Smi* value) {
90 rm_ = no_reg;
91 imm32_ = reinterpret_cast<intptr_t>(value);
92 rmode_ = RelocInfo::NONE;
93 }
94
95 Operand::Operand(Register rm) {
96 rm_ = rm;
97 }
98
99 bool Operand::is_reg() const {
100 return rm_.is_valid();
101 }
102
103
104
105 // -----------------------------------------------------------------------------
106 // RelocInfo
107
108 void RelocInfo::apply(intptr_t delta) {
109 // On MIPS we do not use pc relative addressing, so we don't need to patch the
110 // code here.
111 }
112
113
114 Address RelocInfo::target_address() {
115 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY);
116 return Assembler::target_address_at(pc_);
antonm 2010/01/21 13:10:45 nit: wrong indent, -2 spaces.
Alexandre 2010/01/22 23:08:42 Style issue fixed. On 2010/01/21 13:10:45, antonm
117 }
118
119
120 Address RelocInfo::target_address_address() {
121 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY);
122 return reinterpret_cast<Address>(pc_);
123 }
124
125
126 void RelocInfo::set_target_address(Address target) {
127 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY);
128 Assembler::set_target_address_at(pc_, target);
129 }
130
131
132 Object* RelocInfo::target_object() {
133 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
134 return reinterpret_cast<Object*>(Assembler::target_address_at(pc_));
135 }
136
137
138 Handle<Object> RelocInfo::target_object_handle(Assembler *origin) {
139 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
140 return Handle<Object>(reinterpret_cast<Object**>(Assembler::target_address_at( pc_)));
antonm 2010/01/21 13:10:45 not: line is too long, ./tools/presubmit.py should
Alexandre 2010/01/22 23:08:42 Style issue fixed. On 2010/01/21 13:10:45, antonm
141 }
142
143
144 Object** RelocInfo::target_object_address() {
145 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
146 return reinterpret_cast<Object**>(pc_);
147 }
148
149
150 void RelocInfo::set_target_object(Object* target) {
151 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
152 Assembler::set_target_address_at(pc_, reinterpret_cast<Address>(target));
153 }
154
155
156 Address* RelocInfo::target_reference_address() {
157 ASSERT(rmode_ == EXTERNAL_REFERENCE);
158 return reinterpret_cast<Address*>(pc_);
159 }
160
161
162 Address RelocInfo::call_address() {
163 ASSERT(IsPatchedReturnSequence());
164 // The 2 instructions offset assumes patched return sequence.
165 ASSERT(IsJSReturn(rmode()));
166 return Memory::Address_at(pc_ + 2 * Assembler::kInstrSize);
167 }
168
169
170 void RelocInfo::set_call_address(Address target) {
171 ASSERT(IsPatchedReturnSequence());
172 // The 2 instructions offset assumes patched return sequence.
173 ASSERT(IsJSReturn(rmode()));
174 Memory::Address_at(pc_ + 2 * Assembler::kInstrSize) = target;
175 }
176
177
178 Object* RelocInfo::call_object() {
179 return *call_object_address();
180 }
181
182
183 Object** RelocInfo::call_object_address() {
184 ASSERT(IsPatchedReturnSequence());
185 // The 2 instructions offset assumes patched return sequence.
186 ASSERT(IsJSReturn(rmode()));
187 return reinterpret_cast<Object**>(pc_ + 2 * Assembler::kInstrSize);
188 }
189
190
191 void RelocInfo::set_call_object(Object* target) {
192 *call_object_address() = target;
193 }
194
195
196 bool RelocInfo::IsPatchedReturnSequence() {
197 printf("%s - %d - %s : Checking for jal or jalr. \
antonm 2010/01/21 13:10:45 I think PrintF should be preferred. And probably
Alexandre 2010/01/22 23:08:42 Replaced printf with PrintF. On 2010/01/21 13:10:4
198 If fail check conditionnal execution problem",
199 __FILE__, __LINE__, __func__);
200 return (((Assembler::instr_at(pc_)&(0xf8<<24)) == SPECIAL) &&
201 (((Assembler::instr_at(pc_)&((2<<6)-1)) == JAL) ||
202 ((Assembler::instr_at(pc_)&((2<<6)-1)) == JALR))
203 );
antonm 2010/01/21 13:10:45 slightly strange indentation, I'd lift ); to the p
Alexandre 2010/01/22 23:08:42 Style issue fixed. Also removed magic numbers. On
204 }
205
206 // -----------------------------------------------------------------------------
207 // Assembler
208
209
210 void Assembler::CheckBuffer() {
211 if (buffer_space() <= kGap) {
212 GrowBuffer();
213 }
214 }
215
216
217 void Assembler::emit(Instr x) {
218 CheckBuffer();
219 *reinterpret_cast<Instr*>(pc_) = x;
220 pc_ += kInstrSize;
221 }
222
223
224 } } // namespace v8::internal
225
226 #endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_
OLDNEW

Powered by Google App Engine
This is Rietveld 408576698