[turbofan] Add ARM64 overflow selector tests

src/compiler/arm64/instruction-selector-arm64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 
 namespace v8 {
 namespace internal {
 namespace compiler {
 
 enum ImmediateMode {
-  kArithimeticImm,  // 12 bit unsigned immediate shifted left 0 or 12 bits
-  kShift32Imm,      // 0 - 31
-  kShift64Imm,      // 0 -63
+  kArithmeticImm,  // 12 bit unsigned immediate shifted left 0 or 12 bits
+  kShift32Imm,     // 0 - 31
+  kShift64Imm,     // 0 - 63
   kLogical32Imm,
   kLogical64Imm,
   kLoadStoreImm,  // unsigned 9 bit or signed 7 bit
   kNoImmediate
 };
 
 
 // Adds Arm64-specific methods for generating operands.
 class Arm64OperandGenerator FINAL : public OperandGenerator {
  public:
@@ skipping 20 matching lines @@
     unsigned ignored;
     switch (mode) {
       case kLogical32Imm:
         // TODO(dcarney): some unencodable values can be handled by
         // switching instructions.
         return Assembler::IsImmLogical(static_cast<uint64_t>(value), 32,
                                        &ignored, &ignored, &ignored);
       case kLogical64Imm:
         return Assembler::IsImmLogical(static_cast<uint64_t>(value), 64,
                                        &ignored, &ignored, &ignored);
-      case kArithimeticImm:
+      case kArithmeticImm:
         // TODO(dcarney): -values can be handled by instruction swapping
         return Assembler::IsImmAddSub(value);
       case kShift32Imm:
         return 0 <= value && value < 32;
       case kShift64Imm:
         return 0 <= value && value < 64;
       case kLoadStoreImm:
         return (0 <= value && value < (1 << 9)) ||
                (-(1 << 6) <= value && value < (1 << 6));
       case kNoImmediate:
@@ skipping 250 matching lines @@
   VisitRRO(this, kArm64Ror32, node, kShift32Imm);
 }
 
 
 void InstructionSelector::VisitWord64Ror(Node* node) {
   VisitRRO(this, kArm64Ror, node, kShift64Imm);
 }
 
 
 void InstructionSelector::VisitInt32Add(Node* node) {
-  VisitBinop(this, node, kArm64Add32, kArithimeticImm);
+  VisitBinop(this, node, kArm64Add32, kArithmeticImm);
 }
 
 
 void InstructionSelector::VisitInt64Add(Node* node) {
-  VisitBinop(this, node, kArm64Add, kArithimeticImm);
+  VisitBinop(this, node, kArm64Add, kArithmeticImm);
 }
 
 
 template <typename T>
 static void VisitSub(InstructionSelector* selector, Node* node,
                      ArchOpcode sub_opcode, ArchOpcode neg_opcode) {
   Arm64OperandGenerator g(selector);
   BinopMatcher<IntMatcher<T>, IntMatcher<T> > m(node);
   if (m.left().Is(0)) {
     selector->Emit(neg_opcode, g.DefineAsRegister(node),
                    g.UseRegister(m.right().node()));
   } else {
-    VisitBinop(selector, node, sub_opcode, kArithimeticImm);
+    VisitBinop(selector, node, sub_opcode, kArithmeticImm);
   }
 }
 
 
 void InstructionSelector::VisitInt32Sub(Node* node) {
   VisitSub<int32_t>(this, node, kArm64Sub32, kArm64Neg32);
 }
 
 
 void InstructionSelector::VisitInt64Sub(Node* node) {
@@ skipping 120 matching lines @@
 void InstructionSelector::VisitFloat64Mod(Node* node) {
   Arm64OperandGenerator g(this);
   Emit(kArm64Float64Mod, g.DefineAsFixed(node, d0),
        g.UseFixed(node->InputAt(0), d0),
        g.UseFixed(node->InputAt(1), d1))->MarkAsCall();
 }
 
 
 void InstructionSelector::VisitInt32AddWithOverflow(Node* node,
                                                     FlagsContinuation* cont) {
-  VisitBinop(this, node, kArm64Add32, kArithimeticImm, cont);
+  VisitBinop(this, node, kArm64Add32, kArithmeticImm, cont);
 }
 
 
 void InstructionSelector::VisitInt32SubWithOverflow(Node* node,
                                                     FlagsContinuation* cont) {
-  VisitBinop(this, node, kArm64Sub32, kArithimeticImm, cont);
+  VisitBinop(this, node, kArm64Sub32, kArithmeticImm, cont);
 }
 
 
 // Shared routine for multiple compare operations.
 static void VisitCompare(InstructionSelector* selector, InstructionCode opcode,
                          InstructionOperand* left, InstructionOperand* right,
                          FlagsContinuation* cont) {
   Arm64OperandGenerator g(selector);
   opcode = cont->Encode(opcode);
   if (cont->IsBranch()) {
     selector->Emit(opcode, NULL, left, right, g.Label(cont->true_block()),
                    g.Label(cont->false_block()))->MarkAsControl();
   } else {
     DCHECK(cont->IsSet());
     selector->Emit(opcode, g.DefineAsRegister(cont->result()), left, right);
   }
 }
 
 
 // Shared routine for multiple word compare operations.
 static void VisitWordCompare(InstructionSelector* selector, Node* node,
                              InstructionCode opcode, FlagsContinuation* cont,
                              bool commutative) {
   Arm64OperandGenerator g(selector);
   Node* left = node->InputAt(0);
   Node* right = node->InputAt(1);
 
   // Match immediates on left or right side of comparison.
-  if (g.CanBeImmediate(right, kArithimeticImm)) {
+  if (g.CanBeImmediate(right, kArithmeticImm)) {
     VisitCompare(selector, opcode, g.UseRegister(left), g.UseImmediate(right),
                  cont);
-  } else if (g.CanBeImmediate(left, kArithimeticImm)) {
+  } else if (g.CanBeImmediate(left, kArithmeticImm)) {
     if (!commutative) cont->Commute();
     VisitCompare(selector, opcode, g.UseRegister(right), g.UseImmediate(left),
                  cont);
   } else {
     VisitCompare(selector, opcode, g.UseRegister(left), g.UseRegister(right),
                  cont);
   }
 }
 
 
@@ skipping 131 matching lines @@
   // Caller clean up of stack for C-style calls.
   if (is_c_frame && aligned_push_count > 0) {
     DCHECK(deoptimization == NULL && continuation == NULL);
     Emit(kArchDrop | MiscField::encode(aligned_push_count), NULL);
   }
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8