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Side by Side Diff: src/compiler/x64/instruction-selector-x64.cc

Issue 547233003: [turbofan] Machine operators are globally shared singletons. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Next windows fix. Created 6 years, 3 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/instruction-selector-impl.h" 5 #include "src/compiler/instruction-selector-impl.h"
6 #include "src/compiler/node-matchers.h" 6 #include "src/compiler/node-matchers.h"
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
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49 return !isolate()->heap()->InNewSpace(*value.handle()); 49 return !isolate()->heap()->InNewSpace(*value.handle());
50 } 50 }
51 default: 51 default:
52 return false; 52 return false;
53 } 53 }
54 } 54 }
55 }; 55 };
56 56
57 57
58 void InstructionSelector::VisitLoad(Node* node) { 58 void InstructionSelector::VisitLoad(Node* node) {
59 MachineType rep = RepresentationOf(OpParameter<MachineType>(node)); 59 MachineType rep = RepresentationOf(OpParameter<LoadRepresentation>(node));
60 MachineType typ = TypeOf(OpParameter<MachineType>(node)); 60 MachineType typ = TypeOf(OpParameter<LoadRepresentation>(node));
61 X64OperandGenerator g(this); 61 X64OperandGenerator g(this);
62 Node* base = node->InputAt(0); 62 Node* base = node->InputAt(0);
63 Node* index = node->InputAt(1); 63 Node* index = node->InputAt(1);
64 64
65 ArchOpcode opcode; 65 ArchOpcode opcode;
66 // TODO(titzer): signed/unsigned small loads 66 // TODO(titzer): signed/unsigned small loads
67 switch (rep) { 67 switch (rep) {
68 case kRepFloat32: 68 case kRepFloat32:
69 opcode = kX64Movss; 69 opcode = kX64Movss;
70 break; 70 break;
(...skipping 33 matching lines...) Expand 10 before | Expand all | Expand 10 after
104 } 104 }
105 105
106 106
107 void InstructionSelector::VisitStore(Node* node) { 107 void InstructionSelector::VisitStore(Node* node) {
108 X64OperandGenerator g(this); 108 X64OperandGenerator g(this);
109 Node* base = node->InputAt(0); 109 Node* base = node->InputAt(0);
110 Node* index = node->InputAt(1); 110 Node* index = node->InputAt(1);
111 Node* value = node->InputAt(2); 111 Node* value = node->InputAt(2);
112 112
113 StoreRepresentation store_rep = OpParameter<StoreRepresentation>(node); 113 StoreRepresentation store_rep = OpParameter<StoreRepresentation>(node);
114 MachineType rep = RepresentationOf(store_rep.machine_type); 114 MachineType rep = RepresentationOf(store_rep.machine_type());
115 if (store_rep.write_barrier_kind == kFullWriteBarrier) { 115 if (store_rep.write_barrier_kind() == kFullWriteBarrier) {
116 DCHECK(rep == kRepTagged); 116 DCHECK(rep == kRepTagged);
117 // TODO(dcarney): refactor RecordWrite function to take temp registers 117 // TODO(dcarney): refactor RecordWrite function to take temp registers
118 // and pass them here instead of using fixed regs 118 // and pass them here instead of using fixed regs
119 // TODO(dcarney): handle immediate indices. 119 // TODO(dcarney): handle immediate indices.
120 InstructionOperand* temps[] = {g.TempRegister(rcx), g.TempRegister(rdx)}; 120 InstructionOperand* temps[] = {g.TempRegister(rcx), g.TempRegister(rdx)};
121 Emit(kX64StoreWriteBarrier, NULL, g.UseFixed(base, rbx), 121 Emit(kX64StoreWriteBarrier, NULL, g.UseFixed(base, rbx),
122 g.UseFixed(index, rcx), g.UseFixed(value, rdx), arraysize(temps), 122 g.UseFixed(index, rcx), g.UseFixed(value, rdx), arraysize(temps),
123 temps); 123 temps);
124 return; 124 return;
125 } 125 }
126 DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind); 126 DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind());
127 InstructionOperand* val; 127 InstructionOperand* val;
128 if (g.CanBeImmediate(value)) { 128 if (g.CanBeImmediate(value)) {
129 val = g.UseImmediate(value); 129 val = g.UseImmediate(value);
130 } else if (rep == kRepWord8 || rep == kRepBit) { 130 } else if (rep == kRepWord8 || rep == kRepBit) {
131 val = g.UseByteRegister(value); 131 val = g.UseByteRegister(value);
132 } else { 132 } else {
133 val = g.UseRegister(value); 133 val = g.UseRegister(value);
134 } 134 }
135 ArchOpcode opcode; 135 ArchOpcode opcode;
136 switch (rep) { 136 switch (rep) {
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722 DCHECK(deoptimization == NULL && continuation == NULL); 722 DCHECK(deoptimization == NULL && continuation == NULL);
723 Emit(kArchDrop | 723 Emit(kArchDrop |
724 MiscField::encode(static_cast<int>(buffer.pushed_nodes.size())), 724 MiscField::encode(static_cast<int>(buffer.pushed_nodes.size())),
725 NULL); 725 NULL);
726 } 726 }
727 } 727 }
728 728
729 } // namespace compiler 729 } // namespace compiler
730 } // namespace internal 730 } // namespace internal
731 } // namespace v8 731 } // namespace v8
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