[turbofan] Machine operators are globally shared singletons.

src/compiler/arm64/instruction-selector-arm64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 
 namespace v8 {
 namespace internal {
 namespace compiler {
@@ skipping 118 matching lines @@
 
 // Shared routine for multiple binary operations.
 static void VisitBinop(InstructionSelector* selector, Node* node,
                        ArchOpcode opcode, ImmediateMode operand_mode) {
   FlagsContinuation cont;
   VisitBinop(selector, node, opcode, operand_mode, &cont);
 }
 
 
 void InstructionSelector::VisitLoad(Node* node) {
-  MachineType rep = RepresentationOf(OpParameter<MachineType>(node));
-  MachineType typ = TypeOf(OpParameter<MachineType>(node));
+  MachineType rep = RepresentationOf(OpParameter<LoadRepresentation>(node));
+  MachineType typ = TypeOf(OpParameter<LoadRepresentation>(node));
   Arm64OperandGenerator g(this);
   Node* base = node->InputAt(0);
   Node* index = node->InputAt(1);
   ArchOpcode opcode;
   switch (rep) {
     case kRepFloat32:
       opcode = kArm64LdrS;
       break;
     case kRepFloat64:
       opcode = kArm64LdrD;
@@ skipping 26 matching lines @@
 }
 
 
 void InstructionSelector::VisitStore(Node* node) {
   Arm64OperandGenerator g(this);
   Node* base = node->InputAt(0);
   Node* index = node->InputAt(1);
   Node* value = node->InputAt(2);
 
   StoreRepresentation store_rep = OpParameter<StoreRepresentation>(node);
-  MachineType rep = RepresentationOf(store_rep.machine_type);
-  if (store_rep.write_barrier_kind == kFullWriteBarrier) {
+  MachineType rep = RepresentationOf(store_rep.machine_type());
+  if (store_rep.write_barrier_kind() == kFullWriteBarrier) {
     DCHECK(rep == kRepTagged);
     // TODO(dcarney): refactor RecordWrite function to take temp registers
     //                and pass them here instead of using fixed regs
     // TODO(dcarney): handle immediate indices.
     InstructionOperand* temps[] = {g.TempRegister(x11), g.TempRegister(x12)};
     Emit(kArm64StoreWriteBarrier, NULL, g.UseFixed(base, x10),
          g.UseFixed(index, x11), g.UseFixed(value, x12), arraysize(temps),
          temps);
     return;
   }
-  DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind);
+  DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind());
   ArchOpcode opcode;
   switch (rep) {
     case kRepFloat32:
       opcode = kArm64StrS;
       break;
     case kRepFloat64:
       opcode = kArm64StrD;
       break;
     case kRepBit:  // Fall through.
     case kRepWord8:
@@ skipping 451 matching lines @@
   // Caller clean up of stack for C-style calls.
   if (is_c_frame && aligned_push_count > 0) {
     DCHECK(deoptimization == NULL && continuation == NULL);
     Emit(kArchDrop | MiscField::encode(aligned_push_count), NULL);
   }
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8