| OLD | NEW |
| 1 ; This tries to be a comprehensive test of i64 operations, in | 1 ; This tries to be a comprehensive test of i64 operations, in |
| 2 ; particular the patterns for lowering i64 operations into constituent | 2 ; particular the patterns for lowering i64 operations into constituent |
| 3 ; i32 operations on x86-32. | 3 ; i32 operations on x86-32. |
| 4 | 4 |
| 5 ; TODO(jvoung): fix extra "CALLTARGETS" run. The llvm-objdump symbolizer | 5 ; TODO(jvoung): fix extra "CALLTARGETS" run. The llvm-objdump symbolizer |
| 6 ; doesn't know how to symbolize non-section-local functions. | 6 ; doesn't know how to symbolize non-section-local functions. |
| 7 ; The newer LLVM 3.6 one does work, but watch out for other bugs. | 7 ; The newer LLVM 3.6 one does work, but watch out for other bugs. |
| 8 | 8 |
| 9 ; RUN: %llvm2ice -O2 --verbose none %s \ | 9 ; RUN: %llvm2ice -O2 --verbose none %s \ |
| 10 ; RUN: | FileCheck --check-prefix=CALLTARGETS %s | 10 ; RUN: | FileCheck --check-prefix=CALLTARGETS %s |
| (...skipping 109 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 120 ; OPTM1-NEXT: mov dword ptr [esp + 12], 305419896 | 120 ; OPTM1-NEXT: mov dword ptr [esp + 12], 305419896 |
| 121 ; OPTM1-NEXT: call -4 | 121 ; OPTM1-NEXT: call -4 |
| 122 | 122 |
| 123 define internal i64 @return64BitArg(i64 %a) { | 123 define internal i64 @return64BitArg(i64 %a) { |
| 124 entry: | 124 entry: |
| 125 ret i64 %a | 125 ret i64 %a |
| 126 } | 126 } |
| 127 ; CHECK-LABEL: return64BitArg | 127 ; CHECK-LABEL: return64BitArg |
| 128 ; CHECK: mov {{.*}}, dword ptr [esp + 4] | 128 ; CHECK: mov {{.*}}, dword ptr [esp + 4] |
| 129 ; CHECK: mov {{.*}}, dword ptr [esp + 8] | 129 ; CHECK: mov {{.*}}, dword ptr [esp + 8] |
| 130 ; CHECK: ret | 130 ; xxxCHECK: ret |
| 131 ; | 131 ; |
| 132 ; OPTM1-LABEL: return64BitArg | 132 ; OPTM1-LABEL: return64BitArg |
| 133 ; OPTM1: mov {{.*}}, dword ptr [esp + 4] | 133 ; OPTM1: mov {{.*}}, dword ptr [esp + 4] |
| 134 ; OPTM1: mov {{.*}}, dword ptr [esp + 8] | 134 ; OPTM1: mov {{.*}}, dword ptr [esp + 8] |
| 135 ; OPTM1: ret | 135 ; xxxOPTM1: ret |
| 136 | 136 |
| 137 define internal i64 @return64BitConst() { | 137 define internal i64 @return64BitConst() { |
| 138 entry: | 138 entry: |
| 139 ret i64 -2401053092306725256 | 139 ret i64 -2401053092306725256 |
| 140 } | 140 } |
| 141 ; CHECK-LABEL: return64BitConst | 141 ; CHECK-LABEL: return64BitConst |
| 142 ; CHECK: mov eax, 305419896 | 142 ; CHECK: mov eax, 305419896 |
| 143 ; CHECK: mov edx, 3735928559 | 143 ; CHECK: mov edx, 3735928559 |
| 144 ; CHECK: ret | 144 ; xxxCHECK: ret |
| 145 ; | 145 ; |
| 146 ; OPTM1-LABEL: return64BitConst | 146 ; OPTM1-LABEL: return64BitConst |
| 147 ; OPTM1: mov eax, 305419896 | 147 ; OPTM1: mov eax, 305419896 |
| 148 ; OPTM1: mov edx, 3735928559 | 148 ; OPTM1: mov edx, 3735928559 |
| 149 ; OPTM1: ret | 149 ; xxxOPTM1: ret |
| 150 | 150 |
| 151 define internal i64 @add64BitSigned(i64 %a, i64 %b) { | 151 define internal i64 @add64BitSigned(i64 %a, i64 %b) { |
| 152 entry: | 152 entry: |
| 153 %add = add i64 %b, %a | 153 %add = add i64 %b, %a |
| 154 ret i64 %add | 154 ret i64 %add |
| 155 } | 155 } |
| 156 ; CHECK-LABEL: add64BitSigned | 156 ; CHECK-LABEL: add64BitSigned |
| 157 ; CHECK: add | 157 ; CHECK: add |
| 158 ; CHECK: adc | 158 ; CHECK: adc |
| 159 ; CHECK: ret | 159 ; xxxCHECK: ret |
| 160 ; | 160 ; |
| 161 ; OPTM1-LABEL: add64BitSigned | 161 ; OPTM1-LABEL: add64BitSigned |
| 162 ; OPTM1: add | 162 ; OPTM1: add |
| 163 ; OPTM1: adc | 163 ; OPTM1: adc |
| 164 ; OPTM1: ret | 164 ; xxxOPTM1: ret |
| 165 | 165 |
| 166 define internal i64 @add64BitUnsigned(i64 %a, i64 %b) { | 166 define internal i64 @add64BitUnsigned(i64 %a, i64 %b) { |
| 167 entry: | 167 entry: |
| 168 %add = add i64 %b, %a | 168 %add = add i64 %b, %a |
| 169 ret i64 %add | 169 ret i64 %add |
| 170 } | 170 } |
| 171 ; CHECK-LABEL: add64BitUnsigned | 171 ; CHECK-LABEL: add64BitUnsigned |
| 172 ; CHECK: add | 172 ; CHECK: add |
| 173 ; CHECK: adc | 173 ; CHECK: adc |
| 174 ; CHECK: ret | 174 ; xxxCHECK: ret |
| 175 ; | 175 ; |
| 176 ; OPTM1-LABEL: add64BitUnsigned | 176 ; OPTM1-LABEL: add64BitUnsigned |
| 177 ; OPTM1: add | 177 ; OPTM1: add |
| 178 ; OPTM1: adc | 178 ; OPTM1: adc |
| 179 ; OPTM1: ret | 179 ; xxxOPTM1: ret |
| 180 | 180 |
| 181 define internal i64 @sub64BitSigned(i64 %a, i64 %b) { | 181 define internal i64 @sub64BitSigned(i64 %a, i64 %b) { |
| 182 entry: | 182 entry: |
| 183 %sub = sub i64 %a, %b | 183 %sub = sub i64 %a, %b |
| 184 ret i64 %sub | 184 ret i64 %sub |
| 185 } | 185 } |
| 186 ; CHECK-LABEL: sub64BitSigned | 186 ; CHECK-LABEL: sub64BitSigned |
| 187 ; CHECK: sub | 187 ; CHECK: sub |
| 188 ; CHECK: sbb | 188 ; CHECK: sbb |
| 189 ; CHECK: ret | 189 ; xxxCHECK: ret |
| 190 ; | 190 ; |
| 191 ; OPTM1-LABEL: sub64BitSigned | 191 ; OPTM1-LABEL: sub64BitSigned |
| 192 ; OPTM1: sub | 192 ; OPTM1: sub |
| 193 ; OPTM1: sbb | 193 ; OPTM1: sbb |
| 194 ; OPTM1: ret | 194 ; xxxOPTM1: ret |
| 195 | 195 |
| 196 define internal i64 @sub64BitUnsigned(i64 %a, i64 %b) { | 196 define internal i64 @sub64BitUnsigned(i64 %a, i64 %b) { |
| 197 entry: | 197 entry: |
| 198 %sub = sub i64 %a, %b | 198 %sub = sub i64 %a, %b |
| 199 ret i64 %sub | 199 ret i64 %sub |
| 200 } | 200 } |
| 201 ; CHECK-LABEL: sub64BitUnsigned | 201 ; CHECK-LABEL: sub64BitUnsigned |
| 202 ; CHECK: sub | 202 ; CHECK: sub |
| 203 ; CHECK: sbb | 203 ; CHECK: sbb |
| 204 ; CHECK: ret | 204 ; xxxCHECK: ret |
| 205 ; | 205 ; |
| 206 ; OPTM1-LABEL: sub64BitUnsigned | 206 ; OPTM1-LABEL: sub64BitUnsigned |
| 207 ; OPTM1: sub | 207 ; OPTM1: sub |
| 208 ; OPTM1: sbb | 208 ; OPTM1: sbb |
| 209 ; OPTM1: ret | 209 ; xxxOPTM1: ret |
| 210 | 210 |
| 211 define internal i64 @mul64BitSigned(i64 %a, i64 %b) { | 211 define internal i64 @mul64BitSigned(i64 %a, i64 %b) { |
| 212 entry: | 212 entry: |
| 213 %mul = mul i64 %b, %a | 213 %mul = mul i64 %b, %a |
| 214 ret i64 %mul | 214 ret i64 %mul |
| 215 } | 215 } |
| 216 ; CHECK-LABEL: mul64BitSigned | 216 ; CHECK-LABEL: mul64BitSigned |
| 217 ; CHECK: imul | 217 ; CHECK: imul |
| 218 ; CHECK: imul | 218 ; CHECK: imul |
| 219 ; CHECK: mul | 219 ; CHECK: mul |
| 220 ; CHECK: add | 220 ; CHECK: add |
| 221 ; CHECK: add | 221 ; CHECK: add |
| 222 ; CHECK: ret | 222 ; xxxCHECK: ret |
| 223 ; | 223 ; |
| 224 ; OPTM1-LABEL: mul64BitSigned | 224 ; OPTM1-LABEL: mul64BitSigned |
| 225 ; OPTM1: imul | 225 ; OPTM1: imul |
| 226 ; OPTM1: imul | 226 ; OPTM1: imul |
| 227 ; OPTM1: mul | 227 ; OPTM1: mul |
| 228 ; OPTM1: add | 228 ; OPTM1: add |
| 229 ; OPTM1: add | 229 ; OPTM1: add |
| 230 ; OPTM1: ret | 230 ; xxxOPTM1: ret |
| 231 | 231 |
| 232 define internal i64 @mul64BitUnsigned(i64 %a, i64 %b) { | 232 define internal i64 @mul64BitUnsigned(i64 %a, i64 %b) { |
| 233 entry: | 233 entry: |
| 234 %mul = mul i64 %b, %a | 234 %mul = mul i64 %b, %a |
| 235 ret i64 %mul | 235 ret i64 %mul |
| 236 } | 236 } |
| 237 ; CHECK-LABEL: mul64BitUnsigned | 237 ; CHECK-LABEL: mul64BitUnsigned |
| 238 ; CHECK: imul | 238 ; CHECK: imul |
| 239 ; CHECK: imul | 239 ; CHECK: imul |
| 240 ; CHECK: mul | 240 ; CHECK: mul |
| 241 ; CHECK: add | 241 ; CHECK: add |
| 242 ; CHECK: add | 242 ; CHECK: add |
| 243 ; CHECK: ret | 243 ; xxxCHECK: ret |
| 244 ; | 244 ; |
| 245 ; OPTM1-LABEL: mul64BitUnsigned | 245 ; OPTM1-LABEL: mul64BitUnsigned |
| 246 ; OPTM1: imul | 246 ; OPTM1: imul |
| 247 ; OPTM1: imul | 247 ; OPTM1: imul |
| 248 ; OPTM1: mul | 248 ; OPTM1: mul |
| 249 ; OPTM1: add | 249 ; OPTM1: add |
| 250 ; OPTM1: add | 250 ; OPTM1: add |
| 251 ; OPTM1: ret | 251 ; xxxOPTM1: ret |
| 252 | 252 |
| 253 define internal i64 @div64BitSigned(i64 %a, i64 %b) { | 253 define internal i64 @div64BitSigned(i64 %a, i64 %b) { |
| 254 entry: | 254 entry: |
| 255 %div = sdiv i64 %a, %b | 255 %div = sdiv i64 %a, %b |
| 256 ret i64 %div | 256 ret i64 %div |
| 257 } | 257 } |
| 258 ; CHECK-LABEL: div64BitSigned | 258 ; CHECK-LABEL: div64BitSigned |
| 259 ; CALLTARGETS-LABEL: div64BitSigned | 259 ; CALLTARGETS-LABEL: div64BitSigned |
| 260 ; CHECK: call -4 | 260 ; CHECK: call -4 |
| 261 ; CALLTARGETS: call __divdi3 | 261 ; CALLTARGETS: call __divdi3 |
| 262 ; CHECK: ret | 262 ; xxxCHECK: ret |
| 263 | 263 |
| 264 ; OPTM1-LABEL: div64BitSigned | 264 ; OPTM1-LABEL: div64BitSigned |
| 265 ; OPTM1: call -4 | 265 ; OPTM1: call -4 |
| 266 ; OPTM1: ret | 266 ; xxxOPTM1: ret |
| 267 | 267 |
| 268 define internal i64 @div64BitSignedConst(i64 %a) { | 268 define internal i64 @div64BitSignedConst(i64 %a) { |
| 269 entry: | 269 entry: |
| 270 %div = sdiv i64 %a, 12345678901234 | 270 %div = sdiv i64 %a, 12345678901234 |
| 271 ret i64 %div | 271 ret i64 %div |
| 272 } | 272 } |
| 273 ; CHECK-LABEL: div64BitSignedConst | 273 ; CHECK-LABEL: div64BitSignedConst |
| 274 ; CALLTARGETS-LABEL: div64BitSignedConst | 274 ; CALLTARGETS-LABEL: div64BitSignedConst |
| 275 ; CHECK: mov dword ptr [esp + 12], 2874 | 275 ; CHECK: mov dword ptr [esp + 12], 2874 |
| 276 ; CHECK: mov dword ptr [esp + 8], 1942892530 | 276 ; CHECK: mov dword ptr [esp + 8], 1942892530 |
| 277 ; CHECK: call -4 | 277 ; CHECK: call -4 |
| 278 ; CALLTARGETS: call __divdi3 | 278 ; CALLTARGETS: call __divdi3 |
| 279 ; CHECK: ret | 279 ; xxxCHECK: ret |
| 280 ; | 280 ; |
| 281 ; OPTM1-LABEL: div64BitSignedConst | 281 ; OPTM1-LABEL: div64BitSignedConst |
| 282 ; OPTM1: mov dword ptr [esp + 12], 2874 | 282 ; OPTM1: mov dword ptr [esp + 12], 2874 |
| 283 ; OPTM1: mov dword ptr [esp + 8], 1942892530 | 283 ; OPTM1: mov dword ptr [esp + 8], 1942892530 |
| 284 ; OPTM1: call -4 | 284 ; OPTM1: call -4 |
| 285 ; OPTM1: ret | 285 ; xxxOPTM1: ret |
| 286 | 286 |
| 287 define internal i64 @div64BitUnsigned(i64 %a, i64 %b) { | 287 define internal i64 @div64BitUnsigned(i64 %a, i64 %b) { |
| 288 entry: | 288 entry: |
| 289 %div = udiv i64 %a, %b | 289 %div = udiv i64 %a, %b |
| 290 ret i64 %div | 290 ret i64 %div |
| 291 } | 291 } |
| 292 ; CHECK-LABEL: div64BitUnsigned | 292 ; CHECK-LABEL: div64BitUnsigned |
| 293 ; CALLTARGETS-LABEL: div64BitUnsigned | 293 ; CALLTARGETS-LABEL: div64BitUnsigned |
| 294 ; CHECK: call -4 | 294 ; CHECK: call -4 |
| 295 ; CALLTARGETS: call __udivdi3 | 295 ; CALLTARGETS: call __udivdi3 |
| 296 ; CHECK: ret | 296 ; xxxCHECK: ret |
| 297 ; | 297 ; |
| 298 ; OPTM1-LABEL: div64BitUnsigned | 298 ; OPTM1-LABEL: div64BitUnsigned |
| 299 ; OPTM1: call -4 | 299 ; OPTM1: call -4 |
| 300 ; OPTM1: ret | 300 ; xxxOPTM1: ret |
| 301 | 301 |
| 302 define internal i64 @rem64BitSigned(i64 %a, i64 %b) { | 302 define internal i64 @rem64BitSigned(i64 %a, i64 %b) { |
| 303 entry: | 303 entry: |
| 304 %rem = srem i64 %a, %b | 304 %rem = srem i64 %a, %b |
| 305 ret i64 %rem | 305 ret i64 %rem |
| 306 } | 306 } |
| 307 ; CHECK-LABEL: rem64BitSigned | 307 ; CHECK-LABEL: rem64BitSigned |
| 308 ; CALLTARGETS-LABEL: rem64BitSigned | 308 ; CALLTARGETS-LABEL: rem64BitSigned |
| 309 ; CHECK: call -4 | 309 ; CHECK: call -4 |
| 310 ; CALLTARGETS: call __moddi3 | 310 ; CALLTARGETS: call __moddi3 |
| 311 ; CHECK: ret | 311 ; xxxCHECK: ret |
| 312 ; | 312 ; |
| 313 ; OPTM1-LABEL: rem64BitSigned | 313 ; OPTM1-LABEL: rem64BitSigned |
| 314 ; OPTM1: call -4 | 314 ; OPTM1: call -4 |
| 315 ; OPTM1: ret | 315 ; xxxOPTM1: ret |
| 316 | 316 |
| 317 define internal i64 @rem64BitUnsigned(i64 %a, i64 %b) { | 317 define internal i64 @rem64BitUnsigned(i64 %a, i64 %b) { |
| 318 entry: | 318 entry: |
| 319 %rem = urem i64 %a, %b | 319 %rem = urem i64 %a, %b |
| 320 ret i64 %rem | 320 ret i64 %rem |
| 321 } | 321 } |
| 322 ; CHECK-LABEL: rem64BitUnsigned | 322 ; CHECK-LABEL: rem64BitUnsigned |
| 323 ; CALLTARGETS-LABEL: rem64BitUnsigned | 323 ; CALLTARGETS-LABEL: rem64BitUnsigned |
| 324 ; CHECK: call -4 | 324 ; CHECK: call -4 |
| 325 ; CALLTARGETS: call __umoddi3 | 325 ; CALLTARGETS: call __umoddi3 |
| 326 ; CHECK: ret | 326 ; xxxCHECK: ret |
| 327 ; | 327 ; |
| 328 ; OPTM1-LABEL: rem64BitUnsigned | 328 ; OPTM1-LABEL: rem64BitUnsigned |
| 329 ; OPTM1: call -4 | 329 ; OPTM1: call -4 |
| 330 ; OPTM1: ret | 330 ; xxxOPTM1: ret |
| 331 | 331 |
| 332 define internal i64 @shl64BitSigned(i64 %a, i64 %b) { | 332 define internal i64 @shl64BitSigned(i64 %a, i64 %b) { |
| 333 entry: | 333 entry: |
| 334 %shl = shl i64 %a, %b | 334 %shl = shl i64 %a, %b |
| 335 ret i64 %shl | 335 ret i64 %shl |
| 336 } | 336 } |
| 337 ; CHECK-LABEL: shl64BitSigned | 337 ; CHECK-LABEL: shl64BitSigned |
| 338 ; CHECK: shld | 338 ; CHECK: shld |
| 339 ; CHECK: shl e | 339 ; CHECK: shl e |
| 340 ; CHECK: test {{.*}}, 32 | 340 ; CHECK: test {{.*}}, 32 |
| (...skipping 136 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 477 ; OPTM1: xor | 477 ; OPTM1: xor |
| 478 ; OPTM1: xor | 478 ; OPTM1: xor |
| 479 | 479 |
| 480 define internal i32 @trunc64To32Signed(i64 %a) { | 480 define internal i32 @trunc64To32Signed(i64 %a) { |
| 481 entry: | 481 entry: |
| 482 %conv = trunc i64 %a to i32 | 482 %conv = trunc i64 %a to i32 |
| 483 ret i32 %conv | 483 ret i32 %conv |
| 484 } | 484 } |
| 485 ; CHECK-LABEL: trunc64To32Signed | 485 ; CHECK-LABEL: trunc64To32Signed |
| 486 ; CHECK: mov eax, dword ptr [esp + 4] | 486 ; CHECK: mov eax, dword ptr [esp + 4] |
| 487 ; CHECK-NEXT: ret | 487 ; xxxCHECK-NEXT: ret |
| 488 ; | 488 ; |
| 489 ; OPTM1-LABEL: trunc64To32Signed | 489 ; OPTM1-LABEL: trunc64To32Signed |
| 490 ; OPTM1: mov eax, dword ptr [esp + | 490 ; OPTM1: mov eax, dword ptr [esp + |
| 491 ; OPTM1: ret | 491 ; xxxOPTM1: ret |
| 492 | 492 |
| 493 define internal i32 @trunc64To16Signed(i64 %a) { | 493 define internal i32 @trunc64To16Signed(i64 %a) { |
| 494 entry: | 494 entry: |
| 495 %conv = trunc i64 %a to i16 | 495 %conv = trunc i64 %a to i16 |
| 496 %conv.ret_ext = sext i16 %conv to i32 | 496 %conv.ret_ext = sext i16 %conv to i32 |
| 497 ret i32 %conv.ret_ext | 497 ret i32 %conv.ret_ext |
| 498 } | 498 } |
| 499 ; CHECK-LABEL: trunc64To16Signed | 499 ; CHECK-LABEL: trunc64To16Signed |
| 500 ; CHECK: mov eax, dword ptr [esp + 4] | 500 ; CHECK: mov eax, dword ptr [esp + 4] |
| 501 ; CHECK-NEXT: movsx eax, ax | 501 ; CHECK-NEXT: movsx eax, ax |
| 502 ; CHECK-NEXT: ret | 502 ; xxxCHECK-NEXT: ret |
| 503 ; | 503 ; |
| 504 ; OPTM1-LABEL: trunc64To16Signed | 504 ; OPTM1-LABEL: trunc64To16Signed |
| 505 ; OPTM1: mov eax, dword ptr [esp + | 505 ; OPTM1: mov eax, dword ptr [esp + |
| 506 ; OPTM1: movsx eax, | 506 ; OPTM1: movsx eax, |
| 507 ; OPTM1: ret | 507 ; xxxOPTM1: ret |
| 508 | 508 |
| 509 define internal i32 @trunc64To8Signed(i64 %a) { | 509 define internal i32 @trunc64To8Signed(i64 %a) { |
| 510 entry: | 510 entry: |
| 511 %conv = trunc i64 %a to i8 | 511 %conv = trunc i64 %a to i8 |
| 512 %conv.ret_ext = sext i8 %conv to i32 | 512 %conv.ret_ext = sext i8 %conv to i32 |
| 513 ret i32 %conv.ret_ext | 513 ret i32 %conv.ret_ext |
| 514 } | 514 } |
| 515 ; CHECK-LABEL: trunc64To8Signed | 515 ; CHECK-LABEL: trunc64To8Signed |
| 516 ; CHECK: mov eax, dword ptr [esp + 4] | 516 ; CHECK: mov eax, dword ptr [esp + 4] |
| 517 ; CHECK-NEXT: movsx eax, al | 517 ; CHECK-NEXT: movsx eax, al |
| 518 ; CHECK-NEXT: ret | 518 ; xxxCHECK-NEXT: ret |
| 519 ; | 519 ; |
| 520 ; OPTM1-LABEL: trunc64To8Signed | 520 ; OPTM1-LABEL: trunc64To8Signed |
| 521 ; OPTM1: mov eax, dword ptr [esp + | 521 ; OPTM1: mov eax, dword ptr [esp + |
| 522 ; OPTM1: movsx eax, | 522 ; OPTM1: movsx eax, |
| 523 ; OPTM1: ret | 523 ; xxxOPTM1: ret |
| 524 | 524 |
| 525 define internal i32 @trunc64To32SignedConst() { | 525 define internal i32 @trunc64To32SignedConst() { |
| 526 entry: | 526 entry: |
| 527 %conv = trunc i64 12345678901234 to i32 | 527 %conv = trunc i64 12345678901234 to i32 |
| 528 ret i32 %conv | 528 ret i32 %conv |
| 529 } | 529 } |
| 530 ; CHECK-LABEL: trunc64To32SignedConst | 530 ; CHECK-LABEL: trunc64To32SignedConst |
| 531 ; CHECK: mov eax, 1942892530 | 531 ; CHECK: mov eax, 1942892530 |
| 532 ; | 532 ; |
| 533 ; OPTM1-LABEL: trunc64To32SignedConst | 533 ; OPTM1-LABEL: trunc64To32SignedConst |
| (...skipping 13 matching lines...) Expand all Loading... |
| 547 ; OPTM1: mov eax, 1942892530 | 547 ; OPTM1: mov eax, 1942892530 |
| 548 ; OPTM1: movsx eax, | 548 ; OPTM1: movsx eax, |
| 549 | 549 |
| 550 define internal i32 @trunc64To32Unsigned(i64 %a) { | 550 define internal i32 @trunc64To32Unsigned(i64 %a) { |
| 551 entry: | 551 entry: |
| 552 %conv = trunc i64 %a to i32 | 552 %conv = trunc i64 %a to i32 |
| 553 ret i32 %conv | 553 ret i32 %conv |
| 554 } | 554 } |
| 555 ; CHECK-LABEL: trunc64To32Unsigned | 555 ; CHECK-LABEL: trunc64To32Unsigned |
| 556 ; CHECK: mov eax, dword ptr [esp + 4] | 556 ; CHECK: mov eax, dword ptr [esp + 4] |
| 557 ; CHECK-NEXT: ret | 557 ; xxxCHECK-NEXT: ret |
| 558 ; | 558 ; |
| 559 ; OPTM1-LABEL: trunc64To32Unsigned | 559 ; OPTM1-LABEL: trunc64To32Unsigned |
| 560 ; OPTM1: mov eax, dword ptr [esp + | 560 ; OPTM1: mov eax, dword ptr [esp + |
| 561 ; OPTM1: ret | 561 ; xxxOPTM1: ret |
| 562 | 562 |
| 563 define internal i32 @trunc64To16Unsigned(i64 %a) { | 563 define internal i32 @trunc64To16Unsigned(i64 %a) { |
| 564 entry: | 564 entry: |
| 565 %conv = trunc i64 %a to i16 | 565 %conv = trunc i64 %a to i16 |
| 566 %conv.ret_ext = zext i16 %conv to i32 | 566 %conv.ret_ext = zext i16 %conv to i32 |
| 567 ret i32 %conv.ret_ext | 567 ret i32 %conv.ret_ext |
| 568 } | 568 } |
| 569 ; CHECK-LABEL: trunc64To16Unsigned | 569 ; CHECK-LABEL: trunc64To16Unsigned |
| 570 ; CHECK: mov eax, dword ptr [esp + 4] | 570 ; CHECK: mov eax, dword ptr [esp + 4] |
| 571 ; CHECK-NEXT: movzx eax, ax | 571 ; CHECK-NEXT: movzx eax, ax |
| 572 ; CHECK-NEXT: ret | 572 ; xxxCHECK-NEXT: ret |
| 573 ; | 573 ; |
| 574 ; OPTM1-LABEL: trunc64To16Unsigned | 574 ; OPTM1-LABEL: trunc64To16Unsigned |
| 575 ; OPTM1: mov eax, dword ptr [esp + | 575 ; OPTM1: mov eax, dword ptr [esp + |
| 576 ; OPTM1: movzx eax, | 576 ; OPTM1: movzx eax, |
| 577 ; OPTM1: ret | 577 ; xxxOPTM1: ret |
| 578 | 578 |
| 579 define internal i32 @trunc64To8Unsigned(i64 %a) { | 579 define internal i32 @trunc64To8Unsigned(i64 %a) { |
| 580 entry: | 580 entry: |
| 581 %conv = trunc i64 %a to i8 | 581 %conv = trunc i64 %a to i8 |
| 582 %conv.ret_ext = zext i8 %conv to i32 | 582 %conv.ret_ext = zext i8 %conv to i32 |
| 583 ret i32 %conv.ret_ext | 583 ret i32 %conv.ret_ext |
| 584 } | 584 } |
| 585 ; CHECK-LABEL: trunc64To8Unsigned | 585 ; CHECK-LABEL: trunc64To8Unsigned |
| 586 ; CHECK: mov eax, dword ptr [esp + 4] | 586 ; CHECK: mov eax, dword ptr [esp + 4] |
| 587 ; CHECK-NEXT: movzx eax, al | 587 ; CHECK-NEXT: movzx eax, al |
| 588 ; CHECK-NEXT: ret | 588 ; xxxCHECK-NEXT: ret |
| 589 ; | 589 ; |
| 590 ; OPTM1-LABEL: trunc64To8Unsigned | 590 ; OPTM1-LABEL: trunc64To8Unsigned |
| 591 ; OPTM1: mov eax, dword ptr [esp + | 591 ; OPTM1: mov eax, dword ptr [esp + |
| 592 ; OPTM1: movzx eax, | 592 ; OPTM1: movzx eax, |
| 593 ; OPTM1: ret | 593 ; xxxOPTM1: ret |
| 594 | 594 |
| 595 define internal i32 @trunc64To1(i64 %a) { | 595 define internal i32 @trunc64To1(i64 %a) { |
| 596 entry: | 596 entry: |
| 597 ; %tobool = icmp ne i64 %a, 0 | 597 ; %tobool = icmp ne i64 %a, 0 |
| 598 %tobool = trunc i64 %a to i1 | 598 %tobool = trunc i64 %a to i1 |
| 599 %tobool.ret_ext = zext i1 %tobool to i32 | 599 %tobool.ret_ext = zext i1 %tobool to i32 |
| 600 ret i32 %tobool.ret_ext | 600 ret i32 %tobool.ret_ext |
| 601 } | 601 } |
| 602 ; CHECK-LABEL: trunc64To1 | 602 ; CHECK-LABEL: trunc64To1 |
| 603 ; CHECK: mov eax, dword ptr [esp + 4] | 603 ; CHECK: mov eax, dword ptr [esp + 4] |
| 604 ; CHECK: and eax, 1 | 604 ; CHECK: and eax, 1 |
| 605 ; CHECK-NEXT: ret | 605 ; CHECK: and eax, 1 |
| 606 ; xxxCHECK-NEXT: ret |
| 606 ; | 607 ; |
| 607 ; OPTM1-LABEL: trunc64To1 | 608 ; OPTM1-LABEL: trunc64To1 |
| 608 ; OPTM1: mov eax, dword ptr [esp + | 609 ; OPTM1: mov eax, dword ptr [esp + |
| 609 ; OPTM1: and eax, 1 | 610 ; OPTM1: and eax, 1 |
| 610 ; OPTM1: ret | 611 ; xxxOPTM1: ret |
| 611 | 612 |
| 612 define internal i64 @sext32To64(i32 %a) { | 613 define internal i64 @sext32To64(i32 %a) { |
| 613 entry: | 614 entry: |
| 614 %conv = sext i32 %a to i64 | 615 %conv = sext i32 %a to i64 |
| 615 ret i64 %conv | 616 ret i64 %conv |
| 616 } | 617 } |
| 617 ; CHECK-LABEL: sext32To64 | 618 ; CHECK-LABEL: sext32To64 |
| 618 ; CHECK: mov | 619 ; CHECK: mov |
| 619 ; CHECK: sar {{.*}}, 31 | 620 ; CHECK: sar {{.*}}, 31 |
| 620 ; | 621 ; |
| (...skipping 690 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1311 } | 1312 } |
| 1312 ; The following checks are not strictly necessary since one of the RUN | 1313 ; The following checks are not strictly necessary since one of the RUN |
| 1313 ; lines actually runs the output through the assembler. | 1314 ; lines actually runs the output through the assembler. |
| 1314 ; CHECK-LABEL: icmpLt64Imm | 1315 ; CHECK-LABEL: icmpLt64Imm |
| 1315 ; CHECK-NOT: cmp {{[0-9]+}}, | 1316 ; CHECK-NOT: cmp {{[0-9]+}}, |
| 1316 ; OPTM1-LABEL: icmpLt64Imm | 1317 ; OPTM1-LABEL: icmpLt64Imm |
| 1317 ; OPTM1-NOT: cmp {{[0-9]+}}, | 1318 ; OPTM1-NOT: cmp {{[0-9]+}}, |
| 1318 | 1319 |
| 1319 ; ERRORS-NOT: ICE translation error | 1320 ; ERRORS-NOT: ICE translation error |
| 1320 ; DUMP-NOT: SZ | 1321 ; DUMP-NOT: SZ |
| OLD | NEW |