Subzero: Be more strict about i1 calculations.

tests_lit/llvm2ice_tests/64bit.pnacl.ll

 ; This tries to be a comprehensive test of i64 operations, in
 ; particular the patterns for lowering i64 operations into constituent
 ; i32 operations on x86-32.
 
 ; TODO(jvoung): fix extra "CALLTARGETS" run. The llvm-objdump symbolizer
 ; doesn't know how to symbolize non-section-local functions.
 ; The newer LLVM 3.6 one does work, but watch out for other bugs.
 
 ; RUN: %llvm2ice -O2 --verbose none %s \
 ; RUN:   | FileCheck --check-prefix=CALLTARGETS %s
@@ skipping 109 matching lines @@
 ; OPTM1-NEXT: mov     dword ptr [esp + 12], 305419896
 ; OPTM1-NEXT: call    -4
 
 define internal i64 @return64BitArg(i64 %a) {
 entry:
   ret i64 %a
 }
 ; CHECK-LABEL: return64BitArg
 ; CHECK: mov     {{.*}}, dword ptr [esp + 4]
 ; CHECK: mov     {{.*}}, dword ptr [esp + 8]
-; CHECK: ret
 ;
 ; OPTM1-LABEL: return64BitArg
 ; OPTM1: mov     {{.*}}, dword ptr [esp + 4]
 ; OPTM1: mov     {{.*}}, dword ptr [esp + 8]
-; OPTM1: ret
 
 define internal i64 @return64BitConst() {
 entry:
   ret i64 -2401053092306725256
 }
 ; CHECK-LABEL: return64BitConst
 ; CHECK: mov     eax, 305419896
 ; CHECK: mov     edx, 3735928559
-; CHECK: ret
 ;
 ; OPTM1-LABEL: return64BitConst
 ; OPTM1: mov     eax, 305419896
 ; OPTM1: mov     edx, 3735928559
-; OPTM1: ret
 
 define internal i64 @add64BitSigned(i64 %a, i64 %b) {
 entry:
   %add = add i64 %b, %a
   ret i64 %add
 }
 ; CHECK-LABEL: add64BitSigned
 ; CHECK: add
 ; CHECK: adc
-; CHECK: ret
 ;
 ; OPTM1-LABEL: add64BitSigned
 ; OPTM1: add
 ; OPTM1: adc
-; OPTM1: ret
 
 define internal i64 @add64BitUnsigned(i64 %a, i64 %b) {
 entry:
   %add = add i64 %b, %a
   ret i64 %add
 }
 ; CHECK-LABEL: add64BitUnsigned
 ; CHECK: add
 ; CHECK: adc
-; CHECK: ret
 ;
 ; OPTM1-LABEL: add64BitUnsigned
 ; OPTM1: add
 ; OPTM1: adc
-; OPTM1: ret
 
 define internal i64 @sub64BitSigned(i64 %a, i64 %b) {
 entry:
   %sub = sub i64 %a, %b
   ret i64 %sub
 }
 ; CHECK-LABEL: sub64BitSigned
 ; CHECK: sub
 ; CHECK: sbb
-; CHECK: ret
 ;
 ; OPTM1-LABEL: sub64BitSigned
 ; OPTM1: sub
 ; OPTM1: sbb
-; OPTM1: ret
 
 define internal i64 @sub64BitUnsigned(i64 %a, i64 %b) {
 entry:
   %sub = sub i64 %a, %b
   ret i64 %sub
 }
 ; CHECK-LABEL: sub64BitUnsigned
 ; CHECK: sub
 ; CHECK: sbb
-; CHECK: ret
 ;
 ; OPTM1-LABEL: sub64BitUnsigned
 ; OPTM1: sub
 ; OPTM1: sbb
-; OPTM1: ret
 
 define internal i64 @mul64BitSigned(i64 %a, i64 %b) {
 entry:
   %mul = mul i64 %b, %a
   ret i64 %mul
 }
 ; CHECK-LABEL: mul64BitSigned
 ; CHECK: imul
 ; CHECK: imul
 ; CHECK: mul
 ; CHECK: add
 ; CHECK: add
-; CHECK: ret
 ;
 ; OPTM1-LABEL: mul64BitSigned
 ; OPTM1: imul
 ; OPTM1: imul
 ; OPTM1: mul
 ; OPTM1: add
 ; OPTM1: add
-; OPTM1: ret
 
 define internal i64 @mul64BitUnsigned(i64 %a, i64 %b) {
 entry:
   %mul = mul i64 %b, %a
   ret i64 %mul
 }
 ; CHECK-LABEL: mul64BitUnsigned
 ; CHECK: imul
 ; CHECK: imul
 ; CHECK: mul
 ; CHECK: add
 ; CHECK: add
-; CHECK: ret
 ;
 ; OPTM1-LABEL: mul64BitUnsigned
 ; OPTM1: imul
 ; OPTM1: imul
 ; OPTM1: mul
 ; OPTM1: add
 ; OPTM1: add
-; OPTM1: ret
 
 define internal i64 @div64BitSigned(i64 %a, i64 %b) {
 entry:
   %div = sdiv i64 %a, %b
   ret i64 %div
 }
 ; CHECK-LABEL: div64BitSigned
 ; CALLTARGETS-LABEL: div64BitSigned
 ; CHECK: call    -4
 ; CALLTARGETS: call __divdi3
-; CHECK: ret
 
 ; OPTM1-LABEL: div64BitSigned
 ; OPTM1: call    -4
-; OPTM1: ret
 
 define internal i64 @div64BitSignedConst(i64 %a) {
 entry:
   %div = sdiv i64 %a, 12345678901234
   ret i64 %div
 }
 ; CHECK-LABEL: div64BitSignedConst
 ; CALLTARGETS-LABEL: div64BitSignedConst
 ; CHECK: mov     dword ptr [esp + 12], 2874
 ; CHECK: mov     dword ptr [esp + 8],  1942892530
 ; CHECK: call    -4
 ; CALLTARGETS: call __divdi3
-; CHECK: ret
 ;
 ; OPTM1-LABEL: div64BitSignedConst
 ; OPTM1: mov     dword ptr [esp + 12], 2874
 ; OPTM1: mov     dword ptr [esp + 8],  1942892530
 ; OPTM1: call    -4
-; OPTM1: ret
 
 define internal i64 @div64BitUnsigned(i64 %a, i64 %b) {
 entry:
   %div = udiv i64 %a, %b
   ret i64 %div
 }
 ; CHECK-LABEL: div64BitUnsigned
 ; CALLTARGETS-LABEL: div64BitUnsigned
 ; CHECK: call    -4
 ; CALLTARGETS: call __udivdi3
-; CHECK: ret
 ;
 ; OPTM1-LABEL: div64BitUnsigned
 ; OPTM1: call    -4
-; OPTM1: ret
 
 define internal i64 @rem64BitSigned(i64 %a, i64 %b) {
 entry:
   %rem = srem i64 %a, %b
   ret i64 %rem
 }
 ; CHECK-LABEL: rem64BitSigned
 ; CALLTARGETS-LABEL: rem64BitSigned
 ; CHECK: call    -4
 ; CALLTARGETS: call __moddi3
-; CHECK: ret
 ;
 ; OPTM1-LABEL: rem64BitSigned
 ; OPTM1: call    -4
-; OPTM1: ret
 
 define internal i64 @rem64BitUnsigned(i64 %a, i64 %b) {
 entry:
   %rem = urem i64 %a, %b
   ret i64 %rem
 }
 ; CHECK-LABEL: rem64BitUnsigned
 ; CALLTARGETS-LABEL: rem64BitUnsigned
 ; CHECK: call    -4
 ; CALLTARGETS: call __umoddi3
-; CHECK: ret
 ;
 ; OPTM1-LABEL: rem64BitUnsigned
 ; OPTM1: call    -4
-; OPTM1: ret
 
 define internal i64 @shl64BitSigned(i64 %a, i64 %b) {
 entry:
   %shl = shl i64 %a, %b
   ret i64 %shl
 }
 ; CHECK-LABEL: shl64BitSigned
 ; CHECK: shld
 ; CHECK: shl e
 ; CHECK: test {{.*}}, 32
@@ skipping 136 matching lines @@
 ; OPTM1: xor
 ; OPTM1: xor
 
 define internal i32 @trunc64To32Signed(i64 %a) {
 entry:
   %conv = trunc i64 %a to i32
   ret i32 %conv
 }
 ; CHECK-LABEL: trunc64To32Signed
 ; CHECK: mov     eax, dword ptr [esp + 4]
-; CHECK-NEXT: ret
 ;
 ; OPTM1-LABEL: trunc64To32Signed
 ; OPTM1: mov     eax, dword ptr [esp +
-; OPTM1: ret
 
 define internal i32 @trunc64To16Signed(i64 %a) {
 entry:
   %conv = trunc i64 %a to i16
   %conv.ret_ext = sext i16 %conv to i32
   ret i32 %conv.ret_ext
 }
 ; CHECK-LABEL: trunc64To16Signed
 ; CHECK:      mov     eax, dword ptr [esp + 4]
 ; CHECK-NEXT: movsx  eax, ax
-; CHECK-NEXT: ret
 ;
 ; OPTM1-LABEL: trunc64To16Signed
 ; OPTM1:      mov     eax, dword ptr [esp +
 ; OPTM1: movsx  eax,
-; OPTM1: ret
 
 define internal i32 @trunc64To8Signed(i64 %a) {
 entry:
   %conv = trunc i64 %a to i8
   %conv.ret_ext = sext i8 %conv to i32
   ret i32 %conv.ret_ext
 }
 ; CHECK-LABEL: trunc64To8Signed
 ; CHECK:      mov     eax, dword ptr [esp + 4]
 ; CHECK-NEXT: movsx  eax, al
-; CHECK-NEXT: ret
 ;
 ; OPTM1-LABEL: trunc64To8Signed
 ; OPTM1:      mov     eax, dword ptr [esp +
 ; OPTM1: movsx  eax,
-; OPTM1: ret
 
 define internal i32 @trunc64To32SignedConst() {
 entry:
   %conv = trunc i64 12345678901234 to i32
   ret i32 %conv
 }
 ; CHECK-LABEL: trunc64To32SignedConst
 ; CHECK: mov eax, 1942892530
 ;
 ; OPTM1-LABEL: trunc64To32SignedConst
@@ skipping 13 matching lines @@
 ; OPTM1: mov eax, 1942892530
 ; OPTM1: movsx eax,
 
 define internal i32 @trunc64To32Unsigned(i64 %a) {
 entry:
   %conv = trunc i64 %a to i32
   ret i32 %conv
 }
 ; CHECK-LABEL: trunc64To32Unsigned
 ; CHECK: mov     eax, dword ptr [esp + 4]
-; CHECK-NEXT: ret
 ;
 ; OPTM1-LABEL: trunc64To32Unsigned
 ; OPTM1: mov     eax, dword ptr [esp +
-; OPTM1: ret
 
 define internal i32 @trunc64To16Unsigned(i64 %a) {
 entry:
   %conv = trunc i64 %a to i16
   %conv.ret_ext = zext i16 %conv to i32
   ret i32 %conv.ret_ext
 }
 ; CHECK-LABEL: trunc64To16Unsigned
 ; CHECK:      mov     eax, dword ptr [esp + 4]
 ; CHECK-NEXT: movzx  eax, ax
-; CHECK-NEXT: ret
 ;
 ; OPTM1-LABEL: trunc64To16Unsigned
 ; OPTM1:      mov     eax, dword ptr [esp +
 ; OPTM1: movzx  eax,
-; OPTM1: ret
 
 define internal i32 @trunc64To8Unsigned(i64 %a) {
 entry:
   %conv = trunc i64 %a to i8
   %conv.ret_ext = zext i8 %conv to i32
   ret i32 %conv.ret_ext
 }
 ; CHECK-LABEL: trunc64To8Unsigned
 ; CHECK:      mov     eax, dword ptr [esp + 4]
 ; CHECK-NEXT: movzx  eax, al
-; CHECK-NEXT: ret
 ;
 ; OPTM1-LABEL: trunc64To8Unsigned
 ; OPTM1: mov    eax, dword ptr [esp +
 ; OPTM1: movzx  eax,
-; OPTM1: ret
 
 define internal i32 @trunc64To1(i64 %a) {
 entry:
 ;  %tobool = icmp ne i64 %a, 0
   %tobool = trunc i64 %a to i1
   %tobool.ret_ext = zext i1 %tobool to i32
   ret i32 %tobool.ret_ext
 }
 ; CHECK-LABEL: trunc64To1
 ; CHECK:      mov     eax, dword ptr [esp + 4]
 ; CHECK:      and     eax, 1
-; CHECK-NEXT: ret
+; CHECK:      and     eax, 1
 ;
 ; OPTM1-LABEL: trunc64To1
 ; OPTM1:      mov     eax, dword ptr [esp +
 ; OPTM1:      and     eax, 1
-; OPTM1: ret
+; OPTM1:      and     eax, 1
 
 define internal i64 @sext32To64(i32 %a) {
 entry:
   %conv = sext i32 %a to i64
   ret i64 %conv
 }
 ; CHECK-LABEL: sext32To64
 ; CHECK: mov
 ; CHECK: sar {{.*}}, 31
 ;
@@ skipping 32 matching lines @@
 define internal i64 @sext1To64(i32 %a) {
 entry:
   %a.arg_trunc = trunc i32 %a to i1
   %conv = sext i1 %a.arg_trunc to i64
   ret i64 %conv
 }
 ; CHECK-LABEL: sext1To64
 ; CHECK: mov
 ; CHECK: shl {{.*}}, 31
 ; CHECK: sar {{.*}}, 31
-; CHECK: sar {{.*}}, 31
 ;
 ; OPTM1-LABEL: sext1To64
 ; OPTM1: mov
 ; OPTM1: shl {{.*}}, 31
 ; OPTM1: sar {{.*}}, 31
-; OPTM1: sar {{.*}}, 31
 
 define internal i64 @zext32To64(i32 %a) {
 entry:
   %conv = zext i32 %a to i64
   ret i64 %conv
 }
 ; CHECK-LABEL: zext32To64
 ; CHECK: mov
 ; CHECK: mov {{.*}}, 0
 ;
@@ skipping 631 matching lines @@
 }
 ; The following checks are not strictly necessary since one of the RUN
 ; lines actually runs the output through the assembler.
 ; CHECK-LABEL: icmpLt64Imm
 ; CHECK-NOT: cmp {{[0-9]+}},
 ; OPTM1-LABEL: icmpLt64Imm
 ; OPTM1-NOT: cmp {{[0-9]+}},
 
 ; ERRORS-NOT: ICE translation error
 ; DUMP-NOT: SZ