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Unified Diff: src/ic/mips/ic-mips.cc

Issue 546733003: MIPS: To aid vector-based load ic work, we need to be able to handle the megamorphic load case in h… (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 3 months ago
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Index: src/ic/mips/ic-mips.cc
diff --git a/src/ic/mips/ic-mips.cc b/src/ic/mips/ic-mips.cc
index 3b7f00362c60fe411c957da60e145c22f582ddae..dfbfff07e4e37690c59b15537799a15967e1ace8 100644
--- a/src/ic/mips/ic-mips.cc
+++ b/src/ic/mips/ic-mips.cc
@@ -249,24 +249,6 @@ static void GenerateKeyNameCheck(MacroAssembler* masm, Register key,
}
-void LoadIC::GenerateMegamorphic(MacroAssembler* masm) {
- // The return address is in lr.
- Register receiver = LoadDescriptor::ReceiverRegister();
- Register name = LoadDescriptor::NameRegister();
- DCHECK(receiver.is(a1));
- DCHECK(name.is(a2));
-
- // Probe the stub cache.
- Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
- Code::ComputeHandlerFlags(Code::LOAD_IC));
- masm->isolate()->stub_cache()->GenerateProbe(masm, flags, receiver, name, a3,
- t0, t1, t2);
-
- // Cache miss: Jump to runtime.
- GenerateMiss(masm);
-}
-
-
void LoadIC::GenerateNormal(MacroAssembler* masm) {
Register dictionary = a0;
DCHECK(!dictionary.is(LoadDescriptor::ReceiverRegister()));
@@ -966,8 +948,8 @@ void StoreIC::GenerateMegamorphic(MacroAssembler* masm) {
// Get the receiver from the stack and probe the stub cache.
Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
Code::ComputeHandlerFlags(Code::STORE_IC));
- masm->isolate()->stub_cache()->GenerateProbe(masm, flags, receiver, name, a3,
- t0, t1, t2);
+ masm->isolate()->stub_cache()->GenerateProbe(masm, flags, false, receiver,
+ name, a3, t0, t1, t2);
// Cache miss: Jump to runtime.
GenerateMiss(masm);
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