Subzero: Work around another llvm-mc parser bug for relocatable symbols.

src/IceInstX8632.cpp

 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the InstX8632 and OperandX8632 classes,
@@ skipping 950 matching lines @@
   Str << "\n";
 }
 
 template <> void InstX8632Mov::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Operand *Src = getSrc(0);
   // The llvm-mc assembler using Intel syntax has a bug in which "mov
   // reg, RelocatableConstant" does not generate the right instruction
   // with a relocation.  To work around, we emit "lea reg,
-  // [RelocatableConstant]".  Also, the lowering and legalization is
+  // RelocatableConstant".  Also, the lowering and legalization is
   // changed to allow relocatable constants only in Assign and Call
   // instructions or in Mem operands.  TODO(stichnot): remove LEAHACK
   // once a proper emitter is used.
+  //
+  // In addition, llvm-mc doesn't like "lea eax, bp" or "lea eax, Sp"
+  // or "lea eax, flags" etc., when the relocatable constant name is a
+  // reserved word.  The hack-on-top-of-hack is to temporarily drop
+  // into AT&T syntax for this lea instruction.
   bool UseLeaHack = llvm::isa<ConstantRelocatable>(Src);
-  Str << "\t";
-  if (UseLeaHack)
-    Str << "lea";
-  else
-    Str << "mov" << TypeX8632Attributes[getDest()->getType()].SdSsString;
+  if (UseLeaHack) {
+    Str << ".att_syntax\n";
+    Str << "\tleal";
+  } else {
+    Str << "\tmov" << TypeX8632Attributes[getDest()->getType()].SdSsString;
+  }
   Str << "\t";
   // For an integer truncation operation, src is wider than dest.
   // Ideally, we use a mov instruction whose data width matches the
   // narrower dest.  This is a problem if e.g. src is a register like
   // esi or si where there is no 8-bit version of the register.  To be
   // safe, we instead widen the dest to match src.  This works even
   // for stack-allocated dest variables because typeWidthOnStack()
   // pads to a 4-byte boundary even if only a lower portion is used.
   // TODO: This assert disallows usages such as copying a floating point
   // value between a vector and a scalar (which movss is used for).
   // Clean this up.
   assert(Func->getTarget()->typeWidthInBytesOnStack(getDest()->getType()) ==
          Func->getTarget()->typeWidthInBytesOnStack(Src->getType()));
-  getDest()->asType(Src->getType()).emit(Func);
-  Str << ", ";
-  Src->emit(Func);
-  Str << "\n";
+  if (UseLeaHack) {
+    Src->emit(Func);
+    Str << ", %";
+    getDest()->emit(Func);
+    Str << "\n";
+    Str << ".intel_syntax\n";
+  } else {
+    getDest()->asType(Src->getType()).emit(Func);
+    Str << ", ";
+    Src->emit(Func);
+    Str << "\n";
+  }
 }
 
 template <> void InstX8632Movp::emit(const Cfg *Func) const {
   // TODO(wala,stichnot): movups works with all vector operands, but
   // there exist other instructions (movaps, movdqa, movdqu) that may
   // perform better, depending on the data type and alignment of the
   // operands.
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Str << "\tmovups\t";
@@ skipping 451 matching lines @@
   default:
     Str << "???";
     break;
   }
   Str << "(";
   Var->dump(Func);
   Str << ")";
 }
 
 } // end of namespace Ice