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Side by Side Diff: tests_lit/llvm2ice_tests/64bit.pnacl.ll

Issue 539743002: Subzero: Render constants in dump() to be more like LLVM. (Closed) Base URL: https://gerrit.chromium.org/gerrit/p/native_client/pnacl-subzero.git@master
Patch Set: Created 6 years, 3 months ago
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1 ; This tries to be a comprehensive test of i64 operations, in 1 ; This tries to be a comprehensive test of i64 operations, in
2 ; particular the patterns for lowering i64 operations into constituent 2 ; particular the patterns for lowering i64 operations into constituent
3 ; i32 operations on x86-32. 3 ; i32 operations on x86-32.
4 4
5 ; TODO(jvoung): fix extra "CALLTARGETS" run. The llvm-objdump symbolizer 5 ; TODO(jvoung): fix extra "CALLTARGETS" run. The llvm-objdump symbolizer
6 ; doesn't know how to symbolize non-section-local functions. 6 ; doesn't know how to symbolize non-section-local functions.
7 ; The newer LLVM 3.6 one does work, but watch out for other bugs. 7 ; The newer LLVM 3.6 one does work, but watch out for other bugs.
8 8
9 ; RUN: %llvm2ice -O2 --verbose none %s \ 9 ; RUN: %llvm2ice -O2 --verbose none %s \
10 ; RUN: | FileCheck --check-prefix=CALLTARGETS %s 10 ; RUN: | FileCheck --check-prefix=CALLTARGETS %s
(...skipping 1141 matching lines...) Expand 10 before | Expand all | Expand 10 after
1152 ; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp + 4] 1152 ; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp + 4]
1153 ; CHECK: mov dword ptr [e[[REGISTER]] + 4], 1153 ; CHECK: mov dword ptr [e[[REGISTER]] + 4],
1154 ; CHECK: mov dword ptr [e[[REGISTER]]], 1154 ; CHECK: mov dword ptr [e[[REGISTER]]],
1155 ; 1155 ;
1156 ; OPTM1-LABEL: store64 1156 ; OPTM1-LABEL: store64
1157 ; OPTM1: mov dword ptr [e[[REGISTER:[a-z]+]] + 4], 1157 ; OPTM1: mov dword ptr [e[[REGISTER:[a-z]+]] + 4],
1158 ; OPTM1: mov dword ptr [e[[REGISTER]]], 1158 ; OPTM1: mov dword ptr [e[[REGISTER]]],
1159 1159
1160 define internal void @store64Const(i32 %a) { 1160 define internal void @store64Const(i32 %a) {
1161 entry: 1161 entry:
1162 %a.asptr = inttoptr i32 %a to i64* 1162 %__1 = inttoptr i32 %a to i64*
1163 store i64 -2401053092306725256, i64* %a.asptr, align 1 1163 store i64 -2401053092306725256, i64* %__1, align 1
1164 ret void 1164 ret void
1165 } 1165 }
1166 ; CHECK-LABEL: store64Const 1166 ; CHECK-LABEL: store64Const
1167 ; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp + 4] 1167 ; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp + 4]
1168 ; CHECK: mov dword ptr [e[[REGISTER]] + 4], 3735928559 1168 ; CHECK: mov dword ptr [e[[REGISTER]] + 4], 3735928559
1169 ; CHECK: mov dword ptr [e[[REGISTER]]], 305419896 1169 ; CHECK: mov dword ptr [e[[REGISTER]]], 305419896
1170 ; 1170 ;
1171 ; OPTM1-LABEL: store64Const 1171 ; OPTM1-LABEL: store64Const
1172 ; OPTM1: mov dword ptr [e[[REGISTER:[a-z]+]] + 4], 3735928559 1172 ; OPTM1: mov dword ptr [e[[REGISTER:[a-z]+]] + 4], 3735928559
1173 ; OPTM1: mov dword ptr [e[[REGISTER]]], 305419896 1173 ; OPTM1: mov dword ptr [e[[REGISTER]]], 305419896
(...skipping 119 matching lines...) Expand 10 before | Expand all | Expand 10 after
1293 } 1293 }
1294 ; The following checks are not strictly necessary since one of the RUN 1294 ; The following checks are not strictly necessary since one of the RUN
1295 ; lines actually runs the output through the assembler. 1295 ; lines actually runs the output through the assembler.
1296 ; CHECK-LABEL: icmpLt64Imm 1296 ; CHECK-LABEL: icmpLt64Imm
1297 ; CHECK-NOT: cmp {{[0-9]+}}, 1297 ; CHECK-NOT: cmp {{[0-9]+}},
1298 ; OPTM1-LABEL: icmpLt64Imm 1298 ; OPTM1-LABEL: icmpLt64Imm
1299 ; OPTM1-NOT: cmp {{[0-9]+}}, 1299 ; OPTM1-NOT: cmp {{[0-9]+}},
1300 1300
1301 ; ERRORS-NOT: ICE translation error 1301 ; ERRORS-NOT: ICE translation error
1302 ; DUMP-NOT: SZ 1302 ; DUMP-NOT: SZ
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