Fixes for ARM/ARM64/MIPS parallel move resolver.

runtime/vm/locations.h

Index: runtime/vm/locations.h
===================================================================
--- runtime/vm/locations.h	(revision 39856)
+++ runtime/vm/locations.h	(working copy)
@@ -283,8 +283,10 @@
   }
 
   // Spill slots.
-  static Location StackSlot(intptr_t stack_index) {
-    uword payload = EncodeStackIndex(stack_index);
+  static Location StackSlot(intptr_t stack_index,
+                            Register base = FPREG) {
+    uword payload = StackSlotBaseField::encode(base)
+        | StackIndexField::encode(EncodeStackIndex(stack_index));
     Location loc(kStackSlot, payload);
     // Ensure that sign is preserved.
     ASSERT(loc.stack_index() == stack_index);
@@ -296,7 +298,8 @@
   }
 
   static Location DoubleStackSlot(intptr_t stack_index) {
-    uword payload = EncodeStackIndex(stack_index);
+    uword payload = StackSlotBaseField::encode(FPREG)
+        | StackIndexField::encode(EncodeStackIndex(stack_index));
     Location loc(kDoubleStackSlot, payload);
     // Ensure that sign is preserved.
     ASSERT(loc.stack_index() == stack_index);
@@ -308,7 +311,8 @@
   }
 
   static Location QuadStackSlot(intptr_t stack_index) {
-    uword payload = EncodeStackIndex(stack_index);
+    uword payload = StackSlotBaseField::encode(FPREG)
+        | StackIndexField::encode(EncodeStackIndex(stack_index));
     Location loc(kQuadStackSlot, payload);
     // Ensure that sign is preserved.
     ASSERT(loc.stack_index() == stack_index);
@@ -319,10 +323,15 @@
     return kind() == kQuadStackSlot;
   }
 
+  Register base_reg() const {
+    ASSERT(HasStackIndex());
+    return StackSlotBaseField::decode(payload());
+  }
+
   intptr_t stack_index() const {
     ASSERT(HasStackIndex());
     // Decode stack index manually to preserve sign.
-    return payload() - kStackIndexBias;
+    return StackIndexField::decode(payload()) - kStackIndexBias;
   }
 
   bool HasStackIndex() const {
@@ -378,8 +387,16 @@
   typedef BitField<Policy, 0, 3> PolicyField;
 
   // Layout for stack slots.
+  static const intptr_t kBitsForBaseReg = 5;

[zra, 2014/09/04 16:05:39]

It looks like the base reg can only ever be FPREG or SPREG. Not sure if it makes
sense to encode this differently. Thoughts?

[Florian Schneider, 2014/09/04 16:17:24]

It seems the most straight-forward to encode the register directly, and 5 bits
(32 registers) is the maximum needed for all platforms, but it leaves only 23
bits for the index on ia32.

But yes, for this 1 bit would be enough. Not sure if it is worth to change it
for now.

+  static const intptr_t kBitsForStackIndex = kBitsForPayload - kBitsForBaseReg;
+  typedef BitField<Register, 0, kBitsForBaseReg> StackSlotBaseField;
+  typedef BitField<intptr_t,
+                   kBitsForBaseReg,
+                   kBitsForStackIndex> StackIndexField;
+  COMPILE_ASSERT(1 << kBitsForBaseReg >= kNumberOfCpuRegisters);
+
   static const intptr_t kStackIndexBias =
-      static_cast<intptr_t>(1) << (kBitsForPayload - 1);
+      static_cast<intptr_t>(1) << (kBitsForStackIndex - 1);
 
   // Location either contains kind and payload fields or a tagged handle for
   // a constant locations. Values of enumeration Kind are selected in such a