Fixes for ARM/ARM64/MIPS parallel move resolver.

runtime/vm/flow_graph_compiler_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_MIPS.
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/flow_graph_compiler.h"
 
 #include "vm/ast_printer.h"
@@ skipping 1555 matching lines @@
   const Location source = move->src();
   const Location destination = move->dest();
   __ TraceSimMsg("ParallelMoveResolver::EmitMove");
 
   if (source.IsRegister()) {
     if (destination.IsRegister()) {
       __ mov(destination.reg(), source.reg());
     } else {
       ASSERT(destination.IsStackSlot());
       const intptr_t dest_offset = destination.ToStackSlotOffset();
-      __ StoreToOffset(source.reg(), FP, dest_offset);
+      __ StoreToOffset(source.reg(), destination.base_reg(), dest_offset);
     }
   } else if (source.IsStackSlot()) {
     if (destination.IsRegister()) {
       const intptr_t source_offset = source.ToStackSlotOffset();
-      __ LoadFromOffset(destination.reg(), FP, source_offset);
+      __ LoadFromOffset(destination.reg(), source.base_reg(), source_offset);
     } else {
       ASSERT(destination.IsStackSlot());
       const intptr_t source_offset = source.ToStackSlotOffset();
       const intptr_t dest_offset = destination.ToStackSlotOffset();
-      __ LoadFromOffset(TMP, FP, source_offset);
-      __ StoreToOffset(TMP, FP, dest_offset);
+      ScratchRegisterScope tmp(this, kNoRegister);
+      __ LoadFromOffset(tmp.reg(), source.base_reg(), source_offset);
+      __ StoreToOffset(tmp.reg(), destination.base_reg(), dest_offset);
     }
   } else if (source.IsFpuRegister()) {
     if (destination.IsFpuRegister()) {
       DRegister dst = destination.fpu_reg();
       DRegister src = source.fpu_reg();
       __ movd(dst, src);
     } else {
-      if (destination.IsDoubleStackSlot()) {
-        const intptr_t dest_offset = destination.ToStackSlotOffset();
-        DRegister src = source.fpu_reg();
-        __ StoreDToOffset(src, FP, dest_offset);
-      } else {
-        ASSERT(destination.IsQuadStackSlot());
-        UNIMPLEMENTED();
-      }
+      ASSERT(destination.IsDoubleStackSlot());
+      const intptr_t dest_offset = destination.ToStackSlotOffset();
+      DRegister src = source.fpu_reg();
+      __ StoreDToOffset(src, destination.base_reg(), dest_offset);
     }
   } else if (source.IsDoubleStackSlot()) {
     if (destination.IsFpuRegister()) {
-      const intptr_t dest_offset = source.ToStackSlotOffset();
+      const intptr_t source_offset = source.ToStackSlotOffset();
       DRegister dst = destination.fpu_reg();
-      __ LoadDFromOffset(dst, FP, dest_offset);
+      __ LoadDFromOffset(dst, source.base_reg(), source_offset);
     } else {
       ASSERT(destination.IsDoubleStackSlot());
       const intptr_t source_offset = source.ToStackSlotOffset();
       const intptr_t dest_offset = destination.ToStackSlotOffset();
-      __ LoadDFromOffset(DTMP, FP, source_offset);
-      __ StoreDToOffset(DTMP, FP, dest_offset);
+      __ LoadDFromOffset(DTMP, source.base_reg(), source_offset);
+      __ StoreDToOffset(DTMP, destination.base_reg(), dest_offset);
     }
-  } else if (source.IsQuadStackSlot()) {
-    UNIMPLEMENTED();
   } else {
     ASSERT(source.IsConstant());
     const Object& constant = source.constant();
     if (destination.IsRegister()) {
       __ LoadObject(destination.reg(), constant);
     } else if (destination.IsFpuRegister()) {
       __ LoadObject(TMP, constant);
       __ LoadDFromOffset(destination.fpu_reg(), TMP,
           Double::value_offset() - kHeapObjectTag);
     } else if (destination.IsDoubleStackSlot()) {
       const intptr_t dest_offset = destination.ToStackSlotOffset();
       __ LoadObject(TMP, constant);
       __ LoadDFromOffset(DTMP, TMP, Double::value_offset() - kHeapObjectTag);
-      __ StoreDToOffset(DTMP, FP, dest_offset);
+      __ StoreDToOffset(DTMP, destination.base_reg(), dest_offset);
     } else {
       ASSERT(destination.IsStackSlot());
       const intptr_t dest_offset = destination.ToStackSlotOffset();
-      __ LoadObject(TMP, constant);
-      __ StoreToOffset(TMP, FP, dest_offset);
+      ScratchRegisterScope tmp(this, kNoRegister);
+      __ LoadObject(tmp.reg(), constant);
+      __ StoreToOffset(tmp.reg(), destination.base_reg(), dest_offset);
     }
   }
 
   move->Eliminate();
 }
 
 
 void ParallelMoveResolver::EmitSwap(int index) {
   MoveOperands* move = moves_[index];
   const Location source = move->src();
   const Location destination = move->dest();
 
   if (source.IsRegister() && destination.IsRegister()) {
     ASSERT(source.reg() != TMP);
     ASSERT(destination.reg() != TMP);
     __ mov(TMP, source.reg());
     __ mov(source.reg(), destination.reg());
     __ mov(destination.reg(), TMP);
   } else if (source.IsRegister() && destination.IsStackSlot()) {
-    Exchange(source.reg(), destination.ToStackSlotOffset());
+    Exchange(source.reg(),
+             destination.base_reg(), destination.ToStackSlotOffset());
   } else if (source.IsStackSlot() && destination.IsRegister()) {
-    Exchange(destination.reg(), source.ToStackSlotOffset());
+    Exchange(destination.reg(),
+             source.base_reg(), source.ToStackSlotOffset());
   } else if (source.IsStackSlot() && destination.IsStackSlot()) {
-    Exchange(source.ToStackSlotOffset(), destination.ToStackSlotOffset());
+    Exchange(source.base_reg(), source.ToStackSlotOffset(),
+             destination.base_reg(), destination.ToStackSlotOffset());
   } else if (source.IsFpuRegister() && destination.IsFpuRegister()) {
     DRegister dst = destination.fpu_reg();
     DRegister src = source.fpu_reg();
     __ movd(DTMP, src);
     __ movd(src, dst);
     __ movd(dst, DTMP);
   } else if (source.IsFpuRegister() || destination.IsFpuRegister()) {
-    ASSERT(destination.IsDoubleStackSlot() ||
-           destination.IsQuadStackSlot() ||
-           source.IsDoubleStackSlot() ||
-           source.IsQuadStackSlot());
-    bool double_width = destination.IsDoubleStackSlot() ||
-                        source.IsDoubleStackSlot();
+    ASSERT(destination.IsDoubleStackSlot() || source.IsDoubleStackSlot());
     DRegister reg = source.IsFpuRegister() ? source.fpu_reg()
                                            : destination.fpu_reg();
+    Register base_reg = source.IsFpuRegister()
+        ? destination.base_reg()
+        : source.base_reg();
     const intptr_t slot_offset = source.IsFpuRegister()
         ? destination.ToStackSlotOffset()
         : source.ToStackSlotOffset();
-
-    if (double_width) {
-      __ LoadDFromOffset(DTMP, FP, slot_offset);
-      __ StoreDToOffset(reg, FP, slot_offset);
-      __ movd(reg, DTMP);
-    } else {
-      UNIMPLEMENTED();
-    }
+    __ LoadDFromOffset(DTMP, base_reg, slot_offset);
+    __ StoreDToOffset(reg, base_reg, slot_offset);
+    __ movd(reg, DTMP);
   } else if (source.IsDoubleStackSlot() && destination.IsDoubleStackSlot()) {
     const intptr_t source_offset = source.ToStackSlotOffset();
     const intptr_t dest_offset = destination.ToStackSlotOffset();
 
     ScratchFpuRegisterScope ensure_scratch(this, DTMP);
     DRegister scratch = ensure_scratch.reg();
-    __ LoadDFromOffset(DTMP, FP, source_offset);
-    __ LoadDFromOffset(scratch, FP, dest_offset);
-    __ StoreDToOffset(DTMP, FP, dest_offset);
-    __ StoreDToOffset(scratch, FP, source_offset);
-  } else if (source.IsQuadStackSlot() && destination.IsQuadStackSlot()) {
-    UNIMPLEMENTED();
+    __ LoadDFromOffset(DTMP, source.base_reg(), source_offset);
+    __ LoadDFromOffset(scratch, destination.base_reg(), dest_offset);
+    __ StoreDToOffset(DTMP, destination.base_reg(), dest_offset);
+    __ StoreDToOffset(scratch, source.base_reg(), source_offset);
   } else {
     UNREACHABLE();
   }
 
   // The swap of source and destination has executed a move from source to
   // destination.
   move->Eliminate();
 
   // Any unperformed (including pending) move with a source of either
   // this move's source or destination needs to have their source
@@ skipping 31 matching lines @@
 }
 
 
 // Do not call or implement this function. Instead, use the form below that
 // uses offsets from the frame pointer instead of Addresses.
 void ParallelMoveResolver::Exchange(const Address& mem1, const Address& mem2) {
   UNREACHABLE();
 }
 
 
-void ParallelMoveResolver::Exchange(Register reg, intptr_t stack_offset) {
-  __ mov(TMP, reg);
-  __ LoadFromOffset(reg, FP, stack_offset);
-  __ StoreToOffset(TMP, FP, stack_offset);
+void ParallelMoveResolver::Exchange(Register reg,
+                                    Register base_reg,
+                                    intptr_t stack_offset) {
+  ScratchRegisterScope tmp(this, reg);
+  __ mov(tmp.reg(), reg);
+  __ LoadFromOffset(reg, base_reg, stack_offset);
+  __ StoreToOffset(tmp.reg(), base_reg, stack_offset);
 }
 
 
-void ParallelMoveResolver::Exchange(intptr_t stack_offset1,
+void ParallelMoveResolver::Exchange(Register base_reg1,
+                                    intptr_t stack_offset1,
+                                    Register base_reg2,
                                     intptr_t stack_offset2) {
-  ScratchRegisterScope ensure_scratch(this, TMP);
-  __ LoadFromOffset(ensure_scratch.reg(), FP, stack_offset1);
-  __ LoadFromOffset(TMP, FP, stack_offset2);
-  __ StoreToOffset(ensure_scratch.reg(), FP, stack_offset2);
-  __ StoreToOffset(TMP, FP, stack_offset1);
+  ScratchRegisterScope tmp1(this, kNoRegister);
+  ScratchRegisterScope tmp2(this, tmp1.reg());
+  __ LoadFromOffset(tmp1.reg(), base_reg1, stack_offset1);
+  __ LoadFromOffset(tmp2.reg(), base_reg2, stack_offset2);
+  __ StoreToOffset(tmp1.reg(), base_reg1, stack_offset2);
+  __ StoreToOffset(tmp2.reg(), base_reg2, stack_offset1);
 }
 
 
 void ParallelMoveResolver::SpillScratch(Register reg) {
   __ TraceSimMsg("ParallelMoveResolver::SpillScratch");
   __ Push(reg);
 }
 
 
 void ParallelMoveResolver::RestoreScratch(Register reg) {
@@ skipping 15 matching lines @@
   __ AddImmediate(SP, kDoubleSize);
 }
 
 
 #undef __
 
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS