Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(1224)

Side by Side Diff: src/ic/mips64/ic-mips64.cc

Issue 538573002: MIPS: Make concrete classes for individual call descriptors. - internal (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: mips64 port added. Created 6 years, 3 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « src/ic/mips64/ic-conventions-mips64.cc ('k') | src/mips/code-stubs-mips.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 5
6 #include "src/v8.h" 6 #include "src/v8.h"
7 7
8 #if V8_TARGET_ARCH_MIPS64 8 #if V8_TARGET_ARCH_MIPS64
9 9
10 #include "src/codegen.h" 10 #include "src/codegen.h"
(...skipping 232 matching lines...) Expand 10 before | Expand all | Expand 10 after
243 STATIC_ASSERT(kInternalizedTag == 0); 243 STATIC_ASSERT(kInternalizedTag == 0);
244 __ And(at, hash, Operand(kIsNotInternalizedMask)); 244 __ And(at, hash, Operand(kIsNotInternalizedMask));
245 __ Branch(not_unique, ne, at, Operand(zero_reg)); 245 __ Branch(not_unique, ne, at, Operand(zero_reg));
246 246
247 __ bind(&unique); 247 __ bind(&unique);
248 } 248 }
249 249
250 250
251 void LoadIC::GenerateMegamorphic(MacroAssembler* masm) { 251 void LoadIC::GenerateMegamorphic(MacroAssembler* masm) {
252 // The return address is in lr. 252 // The return address is in lr.
253 Register receiver = LoadConvention::ReceiverRegister(); 253 Register receiver = LoadDescriptor::ReceiverRegister();
254 Register name = LoadConvention::NameRegister(); 254 Register name = LoadDescriptor::NameRegister();
255 DCHECK(receiver.is(a1)); 255 DCHECK(receiver.is(a1));
256 DCHECK(name.is(a2)); 256 DCHECK(name.is(a2));
257 257
258 // Probe the stub cache. 258 // Probe the stub cache.
259 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags( 259 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
260 Code::ComputeHandlerFlags(Code::LOAD_IC)); 260 Code::ComputeHandlerFlags(Code::LOAD_IC));
261 masm->isolate()->stub_cache()->GenerateProbe(masm, flags, receiver, name, a3, 261 masm->isolate()->stub_cache()->GenerateProbe(masm, flags, receiver, name, a3,
262 a4, a5, a6); 262 a4, a5, a6);
263 263
264 // Cache miss: Jump to runtime. 264 // Cache miss: Jump to runtime.
265 GenerateMiss(masm); 265 GenerateMiss(masm);
266 } 266 }
267 267
268 268
269 void LoadIC::GenerateNormal(MacroAssembler* masm) { 269 void LoadIC::GenerateNormal(MacroAssembler* masm) {
270 Register dictionary = a0; 270 Register dictionary = a0;
271 DCHECK(!dictionary.is(LoadConvention::ReceiverRegister())); 271 DCHECK(!dictionary.is(LoadDescriptor::ReceiverRegister()));
272 DCHECK(!dictionary.is(LoadConvention::NameRegister())); 272 DCHECK(!dictionary.is(LoadDescriptor::NameRegister()));
273 Label slow; 273 Label slow;
274 274
275 __ ld(dictionary, FieldMemOperand(LoadConvention::ReceiverRegister(), 275 __ ld(dictionary, FieldMemOperand(LoadDescriptor::ReceiverRegister(),
276 JSObject::kPropertiesOffset)); 276 JSObject::kPropertiesOffset));
277 GenerateDictionaryLoad(masm, &slow, dictionary, 277 GenerateDictionaryLoad(masm, &slow, dictionary,
278 LoadConvention::NameRegister(), v0, a3, a4); 278 LoadDescriptor::NameRegister(), v0, a3, a4);
279 __ Ret(); 279 __ Ret();
280 280
281 // Dictionary load failed, go slow (but don't miss). 281 // Dictionary load failed, go slow (but don't miss).
282 __ bind(&slow); 282 __ bind(&slow);
283 GenerateRuntimeGetProperty(masm); 283 GenerateRuntimeGetProperty(masm);
284 } 284 }
285 285
286 286
287 // A register that isn't one of the parameters to the load ic. 287 // A register that isn't one of the parameters to the load ic.
288 static const Register LoadIC_TempRegister() { return a3; } 288 static const Register LoadIC_TempRegister() { return a3; }
289 289
290 290
291 void LoadIC::GenerateMiss(MacroAssembler* masm) { 291 void LoadIC::GenerateMiss(MacroAssembler* masm) {
292 // The return address is on the stack. 292 // The return address is on the stack.
293 Isolate* isolate = masm->isolate(); 293 Isolate* isolate = masm->isolate();
294 294
295 __ IncrementCounter(isolate->counters()->keyed_load_miss(), 1, a3, a4); 295 __ IncrementCounter(isolate->counters()->keyed_load_miss(), 1, a3, a4);
296 296
297 __ mov(LoadIC_TempRegister(), LoadConvention::ReceiverRegister()); 297 __ mov(LoadIC_TempRegister(), LoadDescriptor::ReceiverRegister());
298 __ Push(LoadIC_TempRegister(), LoadConvention::NameRegister()); 298 __ Push(LoadIC_TempRegister(), LoadDescriptor::NameRegister());
299 299
300 // Perform tail call to the entry. 300 // Perform tail call to the entry.
301 ExternalReference ref = ExternalReference(IC_Utility(kLoadIC_Miss), isolate); 301 ExternalReference ref = ExternalReference(IC_Utility(kLoadIC_Miss), isolate);
302 __ TailCallExternalReference(ref, 2, 1); 302 __ TailCallExternalReference(ref, 2, 1);
303 } 303 }
304 304
305 305
306 void LoadIC::GenerateRuntimeGetProperty(MacroAssembler* masm) { 306 void LoadIC::GenerateRuntimeGetProperty(MacroAssembler* masm) {
307 // The return address is in ra. 307 // The return address is in ra.
308 308
309 __ mov(LoadIC_TempRegister(), LoadConvention::ReceiverRegister()); 309 __ mov(LoadIC_TempRegister(), LoadDescriptor::ReceiverRegister());
310 __ Push(LoadIC_TempRegister(), LoadConvention::NameRegister()); 310 __ Push(LoadIC_TempRegister(), LoadDescriptor::NameRegister());
311 311
312 __ TailCallRuntime(Runtime::kGetProperty, 2, 1); 312 __ TailCallRuntime(Runtime::kGetProperty, 2, 1);
313 } 313 }
314 314
315 315
316 static MemOperand GenerateMappedArgumentsLookup( 316 static MemOperand GenerateMappedArgumentsLookup(
317 MacroAssembler* masm, Register object, Register key, Register scratch1, 317 MacroAssembler* masm, Register object, Register key, Register scratch1,
318 Register scratch2, Register scratch3, Label* unmapped_case, 318 Register scratch2, Register scratch3, Label* unmapped_case,
319 Label* slow_case) { 319 Label* slow_case) {
320 Heap* heap = masm->isolate()->heap(); 320 Heap* heap = masm->isolate()->heap();
(...skipping 64 matching lines...) Expand 10 before | Expand all | Expand 10 after
385 __ SmiUntag(scratch, key); 385 __ SmiUntag(scratch, key);
386 __ dsll(scratch, scratch, kPointerSizeLog2); 386 __ dsll(scratch, scratch, kPointerSizeLog2);
387 __ Daddu(scratch, scratch, Operand(FixedArray::kHeaderSize - kHeapObjectTag)); 387 __ Daddu(scratch, scratch, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
388 __ Daddu(scratch, backing_store, scratch); 388 __ Daddu(scratch, backing_store, scratch);
389 return MemOperand(scratch); 389 return MemOperand(scratch);
390 } 390 }
391 391
392 392
393 void KeyedLoadIC::GenerateSloppyArguments(MacroAssembler* masm) { 393 void KeyedLoadIC::GenerateSloppyArguments(MacroAssembler* masm) {
394 // The return address is in ra. 394 // The return address is in ra.
395 Register receiver = LoadConvention::ReceiverRegister(); 395 Register receiver = LoadDescriptor::ReceiverRegister();
396 Register key = LoadConvention::NameRegister(); 396 Register key = LoadDescriptor::NameRegister();
397 DCHECK(receiver.is(a1)); 397 DCHECK(receiver.is(a1));
398 DCHECK(key.is(a2)); 398 DCHECK(key.is(a2));
399 399
400 Label slow, notin; 400 Label slow, notin;
401 MemOperand mapped_location = GenerateMappedArgumentsLookup( 401 MemOperand mapped_location = GenerateMappedArgumentsLookup(
402 masm, receiver, key, a0, a3, a4, &notin, &slow); 402 masm, receiver, key, a0, a3, a4, &notin, &slow);
403 __ Ret(USE_DELAY_SLOT); 403 __ Ret(USE_DELAY_SLOT);
404 __ ld(v0, mapped_location); 404 __ ld(v0, mapped_location);
405 __ bind(&notin); 405 __ bind(&notin);
406 // The unmapped lookup expects that the parameter map is in a2. 406 // The unmapped lookup expects that the parameter map is in a2.
407 MemOperand unmapped_location = 407 MemOperand unmapped_location =
408 GenerateUnmappedArgumentsLookup(masm, key, a0, a3, &slow); 408 GenerateUnmappedArgumentsLookup(masm, key, a0, a3, &slow);
409 __ ld(a0, unmapped_location); 409 __ ld(a0, unmapped_location);
410 __ LoadRoot(a3, Heap::kTheHoleValueRootIndex); 410 __ LoadRoot(a3, Heap::kTheHoleValueRootIndex);
411 __ Branch(&slow, eq, a0, Operand(a3)); 411 __ Branch(&slow, eq, a0, Operand(a3));
412 __ Ret(USE_DELAY_SLOT); 412 __ Ret(USE_DELAY_SLOT);
413 __ mov(v0, a0); 413 __ mov(v0, a0);
414 __ bind(&slow); 414 __ bind(&slow);
415 GenerateMiss(masm); 415 GenerateMiss(masm);
416 } 416 }
417 417
418 418
419 void KeyedStoreIC::GenerateSloppyArguments(MacroAssembler* masm) { 419 void KeyedStoreIC::GenerateSloppyArguments(MacroAssembler* masm) {
420 Register receiver = StoreConvention::ReceiverRegister(); 420 Register receiver = StoreDescriptor::ReceiverRegister();
421 Register key = StoreConvention::NameRegister(); 421 Register key = StoreDescriptor::NameRegister();
422 Register value = StoreConvention::ValueRegister(); 422 Register value = StoreDescriptor::ValueRegister();
423 DCHECK(value.is(a0)); 423 DCHECK(value.is(a0));
424 424
425 Label slow, notin; 425 Label slow, notin;
426 // Store address is returned in register (of MemOperand) mapped_location. 426 // Store address is returned in register (of MemOperand) mapped_location.
427 MemOperand mapped_location = GenerateMappedArgumentsLookup( 427 MemOperand mapped_location = GenerateMappedArgumentsLookup(
428 masm, receiver, key, a3, a4, a5, &notin, &slow); 428 masm, receiver, key, a3, a4, a5, &notin, &slow);
429 __ sd(value, mapped_location); 429 __ sd(value, mapped_location);
430 __ mov(t1, value); 430 __ mov(t1, value);
431 DCHECK_EQ(mapped_location.offset(), 0); 431 DCHECK_EQ(mapped_location.offset(), 0);
432 __ RecordWrite(a3, mapped_location.rm(), t1, kRAHasNotBeenSaved, 432 __ RecordWrite(a3, mapped_location.rm(), t1, kRAHasNotBeenSaved,
(...skipping 16 matching lines...) Expand all
449 GenerateMiss(masm); 449 GenerateMiss(masm);
450 } 450 }
451 451
452 452
453 void KeyedLoadIC::GenerateMiss(MacroAssembler* masm) { 453 void KeyedLoadIC::GenerateMiss(MacroAssembler* masm) {
454 // The return address is in ra. 454 // The return address is in ra.
455 Isolate* isolate = masm->isolate(); 455 Isolate* isolate = masm->isolate();
456 456
457 __ IncrementCounter(isolate->counters()->keyed_load_miss(), 1, a3, a4); 457 __ IncrementCounter(isolate->counters()->keyed_load_miss(), 1, a3, a4);
458 458
459 __ Push(LoadConvention::ReceiverRegister(), LoadConvention::NameRegister()); 459 __ Push(LoadDescriptor::ReceiverRegister(), LoadDescriptor::NameRegister());
460 460
461 // Perform tail call to the entry. 461 // Perform tail call to the entry.
462 ExternalReference ref = 462 ExternalReference ref =
463 ExternalReference(IC_Utility(kKeyedLoadIC_Miss), isolate); 463 ExternalReference(IC_Utility(kKeyedLoadIC_Miss), isolate);
464 464
465 __ TailCallExternalReference(ref, 2, 1); 465 __ TailCallExternalReference(ref, 2, 1);
466 } 466 }
467 467
468 468
469 void KeyedLoadIC::GenerateRuntimeGetProperty(MacroAssembler* masm) { 469 void KeyedLoadIC::GenerateRuntimeGetProperty(MacroAssembler* masm) {
470 // The return address is in ra. 470 // The return address is in ra.
471 471
472 __ Push(LoadConvention::ReceiverRegister(), LoadConvention::NameRegister()); 472 __ Push(LoadDescriptor::ReceiverRegister(), LoadDescriptor::NameRegister());
473 473
474 __ TailCallRuntime(Runtime::kKeyedGetProperty, 2, 1); 474 __ TailCallRuntime(Runtime::kKeyedGetProperty, 2, 1);
475 } 475 }
476 476
477 477
478 void KeyedLoadIC::GenerateGeneric(MacroAssembler* masm) { 478 void KeyedLoadIC::GenerateGeneric(MacroAssembler* masm) {
479 // The return address is in ra. 479 // The return address is in ra.
480 Label slow, check_name, index_smi, index_name, property_array_property; 480 Label slow, check_name, index_smi, index_name, property_array_property;
481 Label probe_dictionary, check_number_dictionary; 481 Label probe_dictionary, check_number_dictionary;
482 482
483 Register key = LoadConvention::NameRegister(); 483 Register key = LoadDescriptor::NameRegister();
484 Register receiver = LoadConvention::ReceiverRegister(); 484 Register receiver = LoadDescriptor::ReceiverRegister();
485 DCHECK(key.is(a2)); 485 DCHECK(key.is(a2));
486 DCHECK(receiver.is(a1)); 486 DCHECK(receiver.is(a1));
487 487
488 Isolate* isolate = masm->isolate(); 488 Isolate* isolate = masm->isolate();
489 489
490 // Check that the key is a smi. 490 // Check that the key is a smi.
491 __ JumpIfNotSmi(key, &check_name); 491 __ JumpIfNotSmi(key, &check_name);
492 __ bind(&index_smi); 492 __ bind(&index_smi);
493 // Now the key is known to be a smi. This place is also jumped to from below 493 // Now the key is known to be a smi. This place is also jumped to from below
494 // where a numeric string is converted to a smi. 494 // where a numeric string is converted to a smi.
(...skipping 145 matching lines...) Expand 10 before | Expand all | Expand 10 after
640 __ IndexFromHash(a3, key); 640 __ IndexFromHash(a3, key);
641 // Now jump to the place where smi keys are handled. 641 // Now jump to the place where smi keys are handled.
642 __ Branch(&index_smi); 642 __ Branch(&index_smi);
643 } 643 }
644 644
645 645
646 void KeyedLoadIC::GenerateString(MacroAssembler* masm) { 646 void KeyedLoadIC::GenerateString(MacroAssembler* masm) {
647 // Return address is in ra. 647 // Return address is in ra.
648 Label miss; 648 Label miss;
649 649
650 Register receiver = LoadConvention::ReceiverRegister(); 650 Register receiver = LoadDescriptor::ReceiverRegister();
651 Register index = LoadConvention::NameRegister(); 651 Register index = LoadDescriptor::NameRegister();
652 Register scratch = a3; 652 Register scratch = a3;
653 Register result = v0; 653 Register result = v0;
654 DCHECK(!scratch.is(receiver) && !scratch.is(index)); 654 DCHECK(!scratch.is(receiver) && !scratch.is(index));
655 655
656 StringCharAtGenerator char_at_generator(receiver, index, scratch, result, 656 StringCharAtGenerator char_at_generator(receiver, index, scratch, result,
657 &miss, // When not a string. 657 &miss, // When not a string.
658 &miss, // When not a number. 658 &miss, // When not a number.
659 &miss, // When index out of range. 659 &miss, // When index out of range.
660 STRING_INDEX_IS_ARRAY_INDEX); 660 STRING_INDEX_IS_ARRAY_INDEX);
661 char_at_generator.GenerateFast(masm); 661 char_at_generator.GenerateFast(masm);
(...skipping 163 matching lines...) Expand 10 before | Expand all | Expand 10 after
825 // -- a0 : value 825 // -- a0 : value
826 // -- a1 : key 826 // -- a1 : key
827 // -- a2 : receiver 827 // -- a2 : receiver
828 // -- ra : return address 828 // -- ra : return address
829 // ----------------------------------- 829 // -----------------------------------
830 Label slow, fast_object, fast_object_grow; 830 Label slow, fast_object, fast_object_grow;
831 Label fast_double, fast_double_grow; 831 Label fast_double, fast_double_grow;
832 Label array, extra, check_if_double_array; 832 Label array, extra, check_if_double_array;
833 833
834 // Register usage. 834 // Register usage.
835 Register value = StoreConvention::ValueRegister(); 835 Register value = StoreDescriptor::ValueRegister();
836 Register key = StoreConvention::NameRegister(); 836 Register key = StoreDescriptor::NameRegister();
837 Register receiver = StoreConvention::ReceiverRegister(); 837 Register receiver = StoreDescriptor::ReceiverRegister();
838 DCHECK(value.is(a0)); 838 DCHECK(value.is(a0));
839 Register receiver_map = a3; 839 Register receiver_map = a3;
840 Register elements_map = a6; 840 Register elements_map = a6;
841 Register elements = a7; // Elements array of the receiver. 841 Register elements = a7; // Elements array of the receiver.
842 // a4 and a5 are used as general scratch registers. 842 // a4 and a5 are used as general scratch registers.
843 843
844 // Check that the key is a smi. 844 // Check that the key is a smi.
845 __ JumpIfNotSmi(key, &slow); 845 __ JumpIfNotSmi(key, &slow);
846 // Check that the object isn't a smi. 846 // Check that the object isn't a smi.
847 __ JumpIfSmi(receiver, &slow); 847 __ JumpIfSmi(receiver, &slow);
(...skipping 63 matching lines...) Expand 10 before | Expand all | Expand 10 after
911 &slow, kDontCheckMap, kIncrementLength, value, 911 &slow, kDontCheckMap, kIncrementLength, value,
912 key, receiver, receiver_map, elements_map, 912 key, receiver, receiver_map, elements_map,
913 elements); 913 elements);
914 } 914 }
915 915
916 916
917 void KeyedLoadIC::GenerateIndexedInterceptor(MacroAssembler* masm) { 917 void KeyedLoadIC::GenerateIndexedInterceptor(MacroAssembler* masm) {
918 // Return address is in ra. 918 // Return address is in ra.
919 Label slow; 919 Label slow;
920 920
921 Register receiver = LoadConvention::ReceiverRegister(); 921 Register receiver = LoadDescriptor::ReceiverRegister();
922 Register key = LoadConvention::NameRegister(); 922 Register key = LoadDescriptor::NameRegister();
923 Register scratch1 = a3; 923 Register scratch1 = a3;
924 Register scratch2 = a4; 924 Register scratch2 = a4;
925 DCHECK(!scratch1.is(receiver) && !scratch1.is(key)); 925 DCHECK(!scratch1.is(receiver) && !scratch1.is(key));
926 DCHECK(!scratch2.is(receiver) && !scratch2.is(key)); 926 DCHECK(!scratch2.is(receiver) && !scratch2.is(key));
927 927
928 // Check that the receiver isn't a smi. 928 // Check that the receiver isn't a smi.
929 __ JumpIfSmi(receiver, &slow); 929 __ JumpIfSmi(receiver, &slow);
930 930
931 // Check that the key is an array index, that is Uint32. 931 // Check that the key is an array index, that is Uint32.
932 __ And(a4, key, Operand(kSmiTagMask | kSmiSignMask)); 932 __ And(a4, key, Operand(kSmiTagMask | kSmiSignMask));
(...skipping 16 matching lines...) Expand all
949 masm->isolate()), 949 masm->isolate()),
950 2, 1); 950 2, 1);
951 951
952 __ bind(&slow); 952 __ bind(&slow);
953 GenerateMiss(masm); 953 GenerateMiss(masm);
954 } 954 }
955 955
956 956
957 void KeyedStoreIC::GenerateMiss(MacroAssembler* masm) { 957 void KeyedStoreIC::GenerateMiss(MacroAssembler* masm) {
958 // Push receiver, key and value for runtime call. 958 // Push receiver, key and value for runtime call.
959 __ Push(StoreConvention::ReceiverRegister(), StoreConvention::NameRegister(), 959 __ Push(StoreDescriptor::ReceiverRegister(), StoreDescriptor::NameRegister(),
960 StoreConvention::ValueRegister()); 960 StoreDescriptor::ValueRegister());
961 961
962 ExternalReference ref = 962 ExternalReference ref =
963 ExternalReference(IC_Utility(kKeyedStoreIC_Miss), masm->isolate()); 963 ExternalReference(IC_Utility(kKeyedStoreIC_Miss), masm->isolate());
964 __ TailCallExternalReference(ref, 3, 1); 964 __ TailCallExternalReference(ref, 3, 1);
965 } 965 }
966 966
967 967
968 void StoreIC::GenerateMegamorphic(MacroAssembler* masm) { 968 void StoreIC::GenerateMegamorphic(MacroAssembler* masm) {
969 Register receiver = StoreConvention::ReceiverRegister(); 969 Register receiver = StoreDescriptor::ReceiverRegister();
970 Register name = StoreConvention::NameRegister(); 970 Register name = StoreDescriptor::NameRegister();
971 DCHECK(receiver.is(a1)); 971 DCHECK(receiver.is(a1));
972 DCHECK(name.is(a2)); 972 DCHECK(name.is(a2));
973 DCHECK(StoreConvention::ValueRegister().is(a0)); 973 DCHECK(StoreDescriptor::ValueRegister().is(a0));
974 974
975 // Get the receiver from the stack and probe the stub cache. 975 // Get the receiver from the stack and probe the stub cache.
976 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags( 976 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
977 Code::ComputeHandlerFlags(Code::STORE_IC)); 977 Code::ComputeHandlerFlags(Code::STORE_IC));
978 masm->isolate()->stub_cache()->GenerateProbe(masm, flags, receiver, name, a3, 978 masm->isolate()->stub_cache()->GenerateProbe(masm, flags, receiver, name, a3,
979 a4, a5, a6); 979 a4, a5, a6);
980 980
981 // Cache miss: Jump to runtime. 981 // Cache miss: Jump to runtime.
982 GenerateMiss(masm); 982 GenerateMiss(masm);
983 } 983 }
984 984
985 985
986 void StoreIC::GenerateMiss(MacroAssembler* masm) { 986 void StoreIC::GenerateMiss(MacroAssembler* masm) {
987 __ Push(StoreConvention::ReceiverRegister(), StoreConvention::NameRegister(), 987 __ Push(StoreDescriptor::ReceiverRegister(), StoreDescriptor::NameRegister(),
988 StoreConvention::ValueRegister()); 988 StoreDescriptor::ValueRegister());
989 // Perform tail call to the entry. 989 // Perform tail call to the entry.
990 ExternalReference ref = 990 ExternalReference ref =
991 ExternalReference(IC_Utility(kStoreIC_Miss), masm->isolate()); 991 ExternalReference(IC_Utility(kStoreIC_Miss), masm->isolate());
992 __ TailCallExternalReference(ref, 3, 1); 992 __ TailCallExternalReference(ref, 3, 1);
993 } 993 }
994 994
995 995
996 void StoreIC::GenerateNormal(MacroAssembler* masm) { 996 void StoreIC::GenerateNormal(MacroAssembler* masm) {
997 Label miss; 997 Label miss;
998 Register receiver = StoreConvention::ReceiverRegister(); 998 Register receiver = StoreDescriptor::ReceiverRegister();
999 Register name = StoreConvention::NameRegister(); 999 Register name = StoreDescriptor::NameRegister();
1000 Register value = StoreConvention::ValueRegister(); 1000 Register value = StoreDescriptor::ValueRegister();
1001 Register dictionary = a3; 1001 Register dictionary = a3;
1002 DCHECK(!AreAliased(value, receiver, name, dictionary, a4, a5)); 1002 DCHECK(!AreAliased(value, receiver, name, dictionary, a4, a5));
1003 1003
1004 __ ld(dictionary, FieldMemOperand(receiver, JSObject::kPropertiesOffset)); 1004 __ ld(dictionary, FieldMemOperand(receiver, JSObject::kPropertiesOffset));
1005 1005
1006 GenerateDictionaryStore(masm, &miss, a3, name, value, a4, a5); 1006 GenerateDictionaryStore(masm, &miss, a3, name, value, a4, a5);
1007 Counters* counters = masm->isolate()->counters(); 1007 Counters* counters = masm->isolate()->counters();
1008 __ IncrementCounter(counters->store_normal_hit(), 1, a4, a5); 1008 __ IncrementCounter(counters->store_normal_hit(), 1, a4, a5);
1009 __ Ret(); 1009 __ Ret();
1010 1010
(...skipping 95 matching lines...) Expand 10 before | Expand all | Expand 10 after
1106 patcher.ChangeBranchCondition(ne); 1106 patcher.ChangeBranchCondition(ne);
1107 } else { 1107 } else {
1108 DCHECK(Assembler::IsBne(branch_instr)); 1108 DCHECK(Assembler::IsBne(branch_instr));
1109 patcher.ChangeBranchCondition(eq); 1109 patcher.ChangeBranchCondition(eq);
1110 } 1110 }
1111 } 1111 }
1112 } 1112 }
1113 } // namespace v8::internal 1113 } // namespace v8::internal
1114 1114
1115 #endif // V8_TARGET_ARCH_MIPS64 1115 #endif // V8_TARGET_ARCH_MIPS64
OLDNEW
« no previous file with comments | « src/ic/mips64/ic-conventions-mips64.cc ('k') | src/mips/code-stubs-mips.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698