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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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2052 void Assembler::xorpd(XMMRegister dst, XMMRegister src) { | 2052 void Assembler::xorpd(XMMRegister dst, XMMRegister src) { |
2053 ASSERT(IsEnabled(SSE2)); | 2053 ASSERT(IsEnabled(SSE2)); |
2054 EnsureSpace ensure_space(this); | 2054 EnsureSpace ensure_space(this); |
2055 EMIT(0x66); | 2055 EMIT(0x66); |
2056 EMIT(0x0F); | 2056 EMIT(0x0F); |
2057 EMIT(0x57); | 2057 EMIT(0x57); |
2058 emit_sse_operand(dst, src); | 2058 emit_sse_operand(dst, src); |
2059 } | 2059 } |
2060 | 2060 |
2061 | 2061 |
| 2062 void Assembler::andps(XMMRegister dst, XMMRegister src) { |
| 2063 EnsureSpace ensure_space(this); |
| 2064 EMIT(0x0F); |
| 2065 EMIT(0x54); |
| 2066 emit_sse_operand(dst, src); |
| 2067 } |
| 2068 |
| 2069 |
| 2070 void Assembler::orps(XMMRegister dst, XMMRegister src) { |
| 2071 EnsureSpace ensure_space(this); |
| 2072 EMIT(0x0F); |
| 2073 EMIT(0x56); |
| 2074 emit_sse_operand(dst, src); |
| 2075 } |
| 2076 |
| 2077 |
2062 void Assembler::xorps(XMMRegister dst, XMMRegister src) { | 2078 void Assembler::xorps(XMMRegister dst, XMMRegister src) { |
2063 EnsureSpace ensure_space(this); | 2079 EnsureSpace ensure_space(this); |
2064 EMIT(0x0F); | 2080 EMIT(0x0F); |
2065 EMIT(0x57); | 2081 EMIT(0x57); |
2066 emit_sse_operand(dst, src); | 2082 emit_sse_operand(dst, src); |
2067 } | 2083 } |
2068 | 2084 |
2069 | 2085 |
2070 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) { | 2086 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) { |
2071 ASSERT(IsEnabled(SSE2)); | 2087 ASSERT(IsEnabled(SSE2)); |
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2337 EnsureSpace ensure_space(this); | 2353 EnsureSpace ensure_space(this); |
2338 EMIT(0x66); | 2354 EMIT(0x66); |
2339 EMIT(0x0F); | 2355 EMIT(0x0F); |
2340 EMIT(0x3A); | 2356 EMIT(0x3A); |
2341 EMIT(0x17); | 2357 EMIT(0x17); |
2342 emit_sse_operand(src, dst); | 2358 emit_sse_operand(src, dst); |
2343 EMIT(imm8); | 2359 EMIT(imm8); |
2344 } | 2360 } |
2345 | 2361 |
2346 | 2362 |
2347 void Assembler::andps(XMMRegister dst, XMMRegister src) { | |
2348 EnsureSpace ensure_space(this); | |
2349 EMIT(0x0F); | |
2350 EMIT(0x54); | |
2351 emit_sse_operand(dst, src); | |
2352 } | |
2353 | |
2354 | |
2355 void Assembler::pand(XMMRegister dst, XMMRegister src) { | 2363 void Assembler::pand(XMMRegister dst, XMMRegister src) { |
2356 ASSERT(IsEnabled(SSE2)); | 2364 ASSERT(IsEnabled(SSE2)); |
2357 EnsureSpace ensure_space(this); | 2365 EnsureSpace ensure_space(this); |
2358 EMIT(0x66); | 2366 EMIT(0x66); |
2359 EMIT(0x0F); | 2367 EMIT(0x0F); |
2360 EMIT(0xDB); | 2368 EMIT(0xDB); |
2361 emit_sse_operand(dst, src); | 2369 emit_sse_operand(dst, src); |
2362 } | 2370 } |
2363 | 2371 |
2364 | 2372 |
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2689 fprintf(coverage_log, "%s\n", file_line); | 2697 fprintf(coverage_log, "%s\n", file_line); |
2690 fflush(coverage_log); | 2698 fflush(coverage_log); |
2691 } | 2699 } |
2692 } | 2700 } |
2693 | 2701 |
2694 #endif | 2702 #endif |
2695 | 2703 |
2696 } } // namespace v8::internal | 2704 } } // namespace v8::internal |
2697 | 2705 |
2698 #endif // V8_TARGET_ARCH_IA32 | 2706 #endif // V8_TARGET_ARCH_IA32 |
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