OLD | NEW |
1 /* | 1 /* |
2 * Copyright (c) 2008-2009 Atheros Communications Inc. | 2 * Copyright (c) 2008-2009 Atheros Communications Inc. |
3 * | 3 * |
4 * Permission to use, copy, modify, and/or distribute this software for any | 4 * Permission to use, copy, modify, and/or distribute this software for any |
5 * purpose with or without fee is hereby granted, provided that the above | 5 * purpose with or without fee is hereby granted, provided that the above |
6 * copyright notice and this permission notice appear in all copies. | 6 * copyright notice and this permission notice appear in all copies. |
7 * | 7 * |
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
(...skipping 38 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
49 .band = IEEE80211_BAND_5GHZ, \ | 49 .band = IEEE80211_BAND_5GHZ, \ |
50 .center_freq = (_freq), \ | 50 .center_freq = (_freq), \ |
51 .hw_value = (_idx), \ | 51 .hw_value = (_idx), \ |
52 .max_power = 20, \ | 52 .max_power = 20, \ |
53 } | 53 } |
54 | 54 |
55 /* Some 2 GHz radios are actually tunable on 2312-2732 | 55 /* Some 2 GHz radios are actually tunable on 2312-2732 |
56 * on 5 MHz steps, we support the channels which we know | 56 * on 5 MHz steps, we support the channels which we know |
57 * we have calibration data for all cards though to make | 57 * we have calibration data for all cards though to make |
58 * this static */ | 58 * this static */ |
59 static struct ieee80211_channel ath9k_2ghz_chantable[] = { | 59 static const struct ieee80211_channel ath9k_2ghz_chantable[] = { |
60 CHAN2G(2412, 0), /* Channel 1 */ | 60 CHAN2G(2412, 0), /* Channel 1 */ |
61 CHAN2G(2417, 1), /* Channel 2 */ | 61 CHAN2G(2417, 1), /* Channel 2 */ |
62 CHAN2G(2422, 2), /* Channel 3 */ | 62 CHAN2G(2422, 2), /* Channel 3 */ |
63 CHAN2G(2427, 3), /* Channel 4 */ | 63 CHAN2G(2427, 3), /* Channel 4 */ |
64 CHAN2G(2432, 4), /* Channel 5 */ | 64 CHAN2G(2432, 4), /* Channel 5 */ |
65 CHAN2G(2437, 5), /* Channel 6 */ | 65 CHAN2G(2437, 5), /* Channel 6 */ |
66 CHAN2G(2442, 6), /* Channel 7 */ | 66 CHAN2G(2442, 6), /* Channel 7 */ |
67 CHAN2G(2447, 7), /* Channel 8 */ | 67 CHAN2G(2447, 7), /* Channel 8 */ |
68 CHAN2G(2452, 8), /* Channel 9 */ | 68 CHAN2G(2452, 8), /* Channel 9 */ |
69 CHAN2G(2457, 9), /* Channel 10 */ | 69 CHAN2G(2457, 9), /* Channel 10 */ |
70 CHAN2G(2462, 10), /* Channel 11 */ | 70 CHAN2G(2462, 10), /* Channel 11 */ |
71 CHAN2G(2467, 11), /* Channel 12 */ | 71 CHAN2G(2467, 11), /* Channel 12 */ |
72 CHAN2G(2472, 12), /* Channel 13 */ | 72 CHAN2G(2472, 12), /* Channel 13 */ |
73 CHAN2G(2484, 13), /* Channel 14 */ | 73 CHAN2G(2484, 13), /* Channel 14 */ |
74 }; | 74 }; |
75 | 75 |
76 /* Some 5 GHz radios are actually tunable on XXXX-YYYY | 76 /* Some 5 GHz radios are actually tunable on XXXX-YYYY |
77 * on 5 MHz steps, we support the channels which we know | 77 * on 5 MHz steps, we support the channels which we know |
78 * we have calibration data for all cards though to make | 78 * we have calibration data for all cards though to make |
79 * this static */ | 79 * this static */ |
80 static struct ieee80211_channel ath9k_5ghz_chantable[] = { | 80 static const struct ieee80211_channel ath9k_5ghz_chantable[] = { |
81 /* _We_ call this UNII 1 */ | 81 /* _We_ call this UNII 1 */ |
82 CHAN5G(5180, 14), /* Channel 36 */ | 82 CHAN5G(5180, 14), /* Channel 36 */ |
83 CHAN5G(5200, 15), /* Channel 40 */ | 83 CHAN5G(5200, 15), /* Channel 40 */ |
84 CHAN5G(5220, 16), /* Channel 44 */ | 84 CHAN5G(5220, 16), /* Channel 44 */ |
85 CHAN5G(5240, 17), /* Channel 48 */ | 85 CHAN5G(5240, 17), /* Channel 48 */ |
86 /* _We_ call this UNII 2 */ | 86 /* _We_ call this UNII 2 */ |
87 CHAN5G(5260, 18), /* Channel 52 */ | 87 CHAN5G(5260, 18), /* Channel 52 */ |
88 CHAN5G(5280, 19), /* Channel 56 */ | 88 CHAN5G(5280, 19), /* Channel 56 */ |
89 CHAN5G(5300, 20), /* Channel 60 */ | 89 CHAN5G(5300, 20), /* Channel 60 */ |
90 CHAN5G(5320, 21), /* Channel 64 */ | 90 CHAN5G(5320, 21), /* Channel 64 */ |
(...skipping 297 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
388 * are required to handle both tx+rx MIC keys. | 388 * are required to handle both tx+rx MIC keys. |
389 * With split mic keys the number of stations is limited | 389 * With split mic keys the number of stations is limited |
390 * to 27 otherwise 59. | 390 * to 27 otherwise 59. |
391 */ | 391 */ |
392 if (!(sc->sc_ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA)) | 392 if (!(sc->sc_ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA)) |
393 common->splitmic = 1; | 393 common->splitmic = 1; |
394 } | 394 } |
395 | 395 |
396 static int ath9k_init_btcoex(struct ath_softc *sc) | 396 static int ath9k_init_btcoex(struct ath_softc *sc) |
397 { | 397 { |
398 » int r, qnum; | 398 » struct ath_txq *txq; |
| 399 » int r; |
399 | 400 |
400 switch (sc->sc_ah->btcoex_hw.scheme) { | 401 switch (sc->sc_ah->btcoex_hw.scheme) { |
401 case ATH_BTCOEX_CFG_NONE: | 402 case ATH_BTCOEX_CFG_NONE: |
402 break; | 403 break; |
403 case ATH_BTCOEX_CFG_2WIRE: | 404 case ATH_BTCOEX_CFG_2WIRE: |
404 ath9k_hw_btcoex_init_2wire(sc->sc_ah); | 405 ath9k_hw_btcoex_init_2wire(sc->sc_ah); |
405 break; | 406 break; |
406 case ATH_BTCOEX_CFG_3WIRE: | 407 case ATH_BTCOEX_CFG_3WIRE: |
407 ath9k_hw_btcoex_init_3wire(sc->sc_ah); | 408 ath9k_hw_btcoex_init_3wire(sc->sc_ah); |
408 r = ath_init_btcoex_timer(sc); | 409 r = ath_init_btcoex_timer(sc); |
409 if (r) | 410 if (r) |
410 return -1; | 411 return -1; |
411 » » qnum = sc->tx.hwq_map[WME_AC_BE]; | 412 » » txq = sc->tx.txq_map[WME_AC_BE]; |
412 » » ath9k_hw_init_btcoex_hw(sc->sc_ah, qnum); | 413 » » ath9k_hw_init_btcoex_hw(sc->sc_ah, txq->axq_qnum); |
413 sc->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW; | 414 sc->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW; |
414 break; | 415 break; |
415 default: | 416 default: |
416 WARN_ON(1); | 417 WARN_ON(1); |
417 break; | 418 break; |
418 } | 419 } |
419 | 420 |
420 return 0; | 421 return 0; |
421 } | 422 } |
422 | 423 |
423 static int ath9k_init_queues(struct ath_softc *sc) | 424 static int ath9k_init_queues(struct ath_softc *sc) |
424 { | 425 { |
425 struct ath_common *common = ath9k_hw_common(sc->sc_ah); | |
426 int i = 0; | 426 int i = 0; |
427 | 427 |
428 for (i = 0; i < ARRAY_SIZE(sc->tx.hwq_map); i++) | |
429 sc->tx.hwq_map[i] = -1; | |
430 | |
431 sc->beacon.beaconq = ath9k_hw_beaconq_setup(sc->sc_ah); | 428 sc->beacon.beaconq = ath9k_hw_beaconq_setup(sc->sc_ah); |
432 if (sc->beacon.beaconq == -1) { | |
433 ath_print(common, ATH_DBG_FATAL, | |
434 "Unable to setup a beacon xmit queue\n"); | |
435 goto err; | |
436 } | |
437 | |
438 sc->beacon.cabq = ath_txq_setup(sc, ATH9K_TX_QUEUE_CAB, 0); | 429 sc->beacon.cabq = ath_txq_setup(sc, ATH9K_TX_QUEUE_CAB, 0); |
439 if (sc->beacon.cabq == NULL) { | |
440 ath_print(common, ATH_DBG_FATAL, | |
441 "Unable to setup CAB xmit queue\n"); | |
442 goto err; | |
443 } | |
444 | 430 |
445 sc->config.cabqReadytime = ATH_CABQ_READY_TIME; | 431 sc->config.cabqReadytime = ATH_CABQ_READY_TIME; |
446 ath_cabq_update(sc); | 432 ath_cabq_update(sc); |
447 | 433 |
448 » if (!ath_tx_setup(sc, WME_AC_BK)) { | 434 » for (i = 0; i < WME_NUM_AC; i++) |
449 » » ath_print(common, ATH_DBG_FATAL, | 435 » » sc->tx.txq_map[i] = ath_txq_setup(sc, ATH9K_TX_QUEUE_DATA, i); |
450 » » » "Unable to setup xmit queue for BK traffic\n"); | |
451 » » goto err; | |
452 » } | |
453 | |
454 » if (!ath_tx_setup(sc, WME_AC_BE)) { | |
455 » » ath_print(common, ATH_DBG_FATAL, | |
456 » » » "Unable to setup xmit queue for BE traffic\n"); | |
457 » » goto err; | |
458 » } | |
459 » if (!ath_tx_setup(sc, WME_AC_VI)) { | |
460 » » ath_print(common, ATH_DBG_FATAL, | |
461 » » » "Unable to setup xmit queue for VI traffic\n"); | |
462 » » goto err; | |
463 » } | |
464 » if (!ath_tx_setup(sc, WME_AC_VO)) { | |
465 » » ath_print(common, ATH_DBG_FATAL, | |
466 » » » "Unable to setup xmit queue for VO traffic\n"); | |
467 » » goto err; | |
468 » } | |
469 | 436 |
470 return 0; | 437 return 0; |
471 | |
472 err: | |
473 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) | |
474 if (ATH_TXQ_SETUP(sc, i)) | |
475 ath_tx_cleanupq(sc, &sc->tx.txq[i]); | |
476 | |
477 return -EIO; | |
478 } | 438 } |
479 | 439 |
480 static void ath9k_init_channels_rates(struct ath_softc *sc) | 440 static int ath9k_init_channels_rates(struct ath_softc *sc) |
481 { | 441 { |
| 442 void *channels; |
| 443 |
482 if (test_bit(ATH9K_MODE_11G, sc->sc_ah->caps.wireless_modes)) { | 444 if (test_bit(ATH9K_MODE_11G, sc->sc_ah->caps.wireless_modes)) { |
483 » » sc->sbands[IEEE80211_BAND_2GHZ].channels = ath9k_2ghz_chantable; | 445 » » channels = kmemdup(ath9k_2ghz_chantable, |
| 446 » » » sizeof(ath9k_2ghz_chantable), GFP_KERNEL); |
| 447 » » if (!channels) |
| 448 » » return -ENOMEM; |
| 449 |
| 450 » » sc->sbands[IEEE80211_BAND_2GHZ].channels = channels; |
484 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ; | 451 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ; |
485 sc->sbands[IEEE80211_BAND_2GHZ].n_channels = | 452 sc->sbands[IEEE80211_BAND_2GHZ].n_channels = |
486 ARRAY_SIZE(ath9k_2ghz_chantable); | 453 ARRAY_SIZE(ath9k_2ghz_chantable); |
487 sc->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates; | 454 sc->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates; |
488 sc->sbands[IEEE80211_BAND_2GHZ].n_bitrates = | 455 sc->sbands[IEEE80211_BAND_2GHZ].n_bitrates = |
489 ARRAY_SIZE(ath9k_legacy_rates); | 456 ARRAY_SIZE(ath9k_legacy_rates); |
490 } | 457 } |
491 | 458 |
492 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes)) { | 459 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes)) { |
493 » » sc->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_chantable; | 460 » » channels = kmemdup(ath9k_5ghz_chantable, |
| 461 » » » sizeof(ath9k_5ghz_chantable), GFP_KERNEL); |
| 462 » » if (!channels) { |
| 463 » » » if (sc->sbands[IEEE80211_BAND_2GHZ].channels) |
| 464 » » » » kfree(sc->sbands[IEEE80211_BAND_2GHZ].channels); |
| 465 » » » return -ENOMEM; |
| 466 » » } |
| 467 |
| 468 » » sc->sbands[IEEE80211_BAND_5GHZ].channels = channels; |
494 sc->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ; | 469 sc->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ; |
495 sc->sbands[IEEE80211_BAND_5GHZ].n_channels = | 470 sc->sbands[IEEE80211_BAND_5GHZ].n_channels = |
496 ARRAY_SIZE(ath9k_5ghz_chantable); | 471 ARRAY_SIZE(ath9k_5ghz_chantable); |
497 sc->sbands[IEEE80211_BAND_5GHZ].bitrates = | 472 sc->sbands[IEEE80211_BAND_5GHZ].bitrates = |
498 ath9k_legacy_rates + 4; | 473 ath9k_legacy_rates + 4; |
499 sc->sbands[IEEE80211_BAND_5GHZ].n_bitrates = | 474 sc->sbands[IEEE80211_BAND_5GHZ].n_bitrates = |
500 ARRAY_SIZE(ath9k_legacy_rates) - 4; | 475 ARRAY_SIZE(ath9k_legacy_rates) - 4; |
501 } | 476 } |
| 477 return 0; |
502 } | 478 } |
503 | 479 |
504 static void ath9k_init_misc(struct ath_softc *sc) | 480 static void ath9k_init_misc(struct ath_softc *sc) |
505 { | 481 { |
506 struct ath_common *common = ath9k_hw_common(sc->sc_ah); | 482 struct ath_common *common = ath9k_hw_common(sc->sc_ah); |
507 int i = 0; | 483 int i = 0; |
508 | 484 |
509 common->ani.noise_floor = ATH_DEFAULT_NOISE_FLOOR; | 485 common->ani.noise_floor = ATH_DEFAULT_NOISE_FLOOR; |
510 setup_timer(&common->ani.timer, ath_ani_calibrate, (unsigned long)sc); | 486 setup_timer(&common->ani.timer, ath_ani_calibrate, (unsigned long)sc); |
511 | 487 |
(...skipping 73 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
585 } | 561 } |
586 | 562 |
587 ret = ath9k_init_queues(sc); | 563 ret = ath9k_init_queues(sc); |
588 if (ret) | 564 if (ret) |
589 goto err_queues; | 565 goto err_queues; |
590 | 566 |
591 ret = ath9k_init_btcoex(sc); | 567 ret = ath9k_init_btcoex(sc); |
592 if (ret) | 568 if (ret) |
593 goto err_btcoex; | 569 goto err_btcoex; |
594 | 570 |
| 571 ret = ath9k_init_channels_rates(sc); |
| 572 if (ret) |
| 573 goto err_btcoex; |
| 574 |
595 ath9k_init_crypto(sc); | 575 ath9k_init_crypto(sc); |
596 ath9k_init_channels_rates(sc); | |
597 ath9k_init_misc(sc); | 576 ath9k_init_misc(sc); |
598 | 577 |
599 return 0; | 578 return 0; |
600 | 579 |
601 err_btcoex: | 580 err_btcoex: |
602 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) | 581 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) |
603 if (ATH_TXQ_SETUP(sc, i)) | 582 if (ATH_TXQ_SETUP(sc, i)) |
604 ath_tx_cleanupq(sc, &sc->tx.txq[i]); | 583 ath_tx_cleanupq(sc, &sc->tx.txq[i]); |
605 err_queues: | 584 err_queues: |
606 ath9k_exit_debug(ah); | 585 ath9k_exit_debug(ah); |
(...skipping 137 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
744 } | 723 } |
745 | 724 |
746 /*****************************/ | 725 /*****************************/ |
747 /* De-Initialization */ | 726 /* De-Initialization */ |
748 /*****************************/ | 727 /*****************************/ |
749 | 728 |
750 static void ath9k_deinit_softc(struct ath_softc *sc) | 729 static void ath9k_deinit_softc(struct ath_softc *sc) |
751 { | 730 { |
752 int i = 0; | 731 int i = 0; |
753 | 732 |
| 733 if (sc->sbands[IEEE80211_BAND_2GHZ].channels) |
| 734 kfree(sc->sbands[IEEE80211_BAND_2GHZ].channels); |
| 735 |
| 736 if (sc->sbands[IEEE80211_BAND_5GHZ].channels) |
| 737 kfree(sc->sbands[IEEE80211_BAND_5GHZ].channels); |
| 738 |
754 if ((sc->btcoex.no_stomp_timer) && | 739 if ((sc->btcoex.no_stomp_timer) && |
755 sc->sc_ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE) | 740 sc->sc_ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE) |
756 ath_gen_timer_free(sc->sc_ah, sc->btcoex.no_stomp_timer); | 741 ath_gen_timer_free(sc->sc_ah, sc->btcoex.no_stomp_timer); |
757 | 742 |
758 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) | 743 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) |
759 if (ATH_TXQ_SETUP(sc, i)) | 744 if (ATH_TXQ_SETUP(sc, i)) |
760 ath_tx_cleanupq(sc, &sc->tx.txq[i]); | 745 ath_tx_cleanupq(sc, &sc->tx.txq[i]); |
761 | 746 |
762 ath9k_exit_debug(sc->sc_ah); | 747 ath9k_exit_debug(sc->sc_ah); |
763 ath9k_hw_deinit(sc->sc_ah); | 748 ath9k_hw_deinit(sc->sc_ah); |
(...skipping 99 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
863 | 848 |
864 static void __exit ath9k_exit(void) | 849 static void __exit ath9k_exit(void) |
865 { | 850 { |
866 ath_ahb_exit(); | 851 ath_ahb_exit(); |
867 ath_pci_exit(); | 852 ath_pci_exit(); |
868 ath9k_debug_remove_root(); | 853 ath9k_debug_remove_root(); |
869 ath_rate_control_unregister(); | 854 ath_rate_control_unregister(); |
870 printk(KERN_INFO "%s: Driver unloaded\n", dev_info); | 855 printk(KERN_INFO "%s: Driver unloaded\n", dev_info); |
871 } | 856 } |
872 module_exit(ath9k_exit); | 857 module_exit(ath9k_exit); |
OLD | NEW |