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Unified Diff: tests_lit/reader_tests/select.ll

Issue 531123002: Add select instruction to Subzero bitcode reader. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix issues in patch set 1. Created 6 years, 3 months ago
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Index: tests_lit/reader_tests/select.ll
diff --git a/tests_lit/reader_tests/select.ll b/tests_lit/reader_tests/select.ll
new file mode 100644
index 0000000000000000000000000000000000000000..4c3253aa6b30e19cfaf2dd500b7d107847e3f5e0
--- /dev/null
+++ b/tests_lit/reader_tests/select.ll
@@ -0,0 +1,186 @@
+; Tests if we can read select instrutions.
+
+; RUN: llvm-as < %s | pnacl-freeze \
+; RUN: | %llvm2ice -notranslate -verbose=inst -build-on-read \
+; RUN: -allow-pnacl-reader-error-recovery \
+; RUN: | FileCheck %s
+
+define void @Seli1(i32 %p) {
+ %vc = trunc i32 %p to i1
+ %vt = trunc i32 %p to i1
+ %ve = trunc i32 %p to i1
+ %r = select i1 %vc, i1 %vt, i1 %ve
+ ret void
+}
+
+; CHECK: define void @Seli1(i32 %__0) {
+; CHECK-NEXT: __0:
+; CHECK-NEXT: %__1 = trunc i32 %__0 to i1
+; CHECK-NEXT: %__2 = trunc i32 %__0 to i1
+; CHECK-NEXT: %__3 = trunc i32 %__0 to i1
+; CHECK-NEXT: %__4 = select i1 %__1, i1 %__2, i1 %__3
+; CHECK-NEXT: ret void
+; CHECK-NEXT: }
+
+define void @Seli8(i32 %p) {
+ %vc = trunc i32 %p to i1
+ %vt = trunc i32 %p to i8
+ %ve = trunc i32 %p to i8
+ %r = select i1 %vc, i8 %vt, i8 %ve
+ ret void
+}
+
+; CHECK-NEXT: define void @Seli8(i32 %__0) {
+; CHECK-NEXT: __0:
+; CHECK-NEXT: %__1 = trunc i32 %__0 to i1
+; CHECK-NEXT: %__2 = trunc i32 %__0 to i8
+; CHECK-NEXT: %__3 = trunc i32 %__0 to i8
+; CHECK-NEXT: %__4 = select i1 %__1, i8 %__2, i8 %__3
+; CHECK-NEXT: ret void
+; CHECK-NEXT: }
+
+define void @Seli16(i32 %p) {
+ %vc = trunc i32 %p to i1
+ %vt = trunc i32 %p to i16
+ %ve = trunc i32 %p to i16
+ %r = select i1 %vc, i16 %vt, i16 %ve
+ ret void
+}
+
+; CHECK-NEXT: define void @Seli16(i32 %__0) {
+; CHECK-NEXT: __0:
+; CHECK-NEXT: %__1 = trunc i32 %__0 to i1
+; CHECK-NEXT: %__2 = trunc i32 %__0 to i16
+; CHECK-NEXT: %__3 = trunc i32 %__0 to i16
+; CHECK-NEXT: %__4 = select i1 %__1, i16 %__2, i16 %__3
+; CHECK-NEXT: ret void
+; CHECK-NEXT: }
+
+define void @Seli32(i32 %pc, i32 %pt, i32 %pe) {
+ %vc = trunc i32 %pc to i1
+ %r = select i1 %vc, i32 %pt, i32 %pe
+ ret void
+}
+
+; CHECK-NEXT: define void @Seli32(i32 %__0, i32 %__1, i32 %__2) {
+; CHECK-NEXT: __0:
+; CHECK-NEXT: %__3 = trunc i32 %__0 to i1
+; CHECK-NEXT: %__4 = select i1 %__3, i32 %__1, i32 %__2
+; CHECK-NEXT: ret void
+; CHECK-NEXT: }
+
+define void @Seli64(i64 %pc, i64 %pt, i64 %pe) {
+ %vc = trunc i64 %pc to i1
+ %r = select i1 %vc, i64 %pt, i64 %pe
+ ret void
+}
+
+; CHECK-NEXT: define void @Seli64(i64 %__0, i64 %__1, i64 %__2) {
+; CHECK-NEXT: __0:
+; CHECK-NEXT: %__3 = trunc i64 %__0 to i1
+; CHECK-NEXT: %__4 = select i1 %__3, i64 %__1, i64 %__2
+; CHECK-NEXT: ret void
+; CHECK-NEXT: }
+
+
+define void @SelFloat(i32 %pc, float %pt, float %pe) {
+ %vc = trunc i32 %pc to i1
+ %r = select i1 %vc, float %pt, float %pe
+ ret void
+}
+
+; CHECK-NEXT: define void @SelFloat(i32 %__0, float %__1, float %__2) {
+; CHECK-NEXT: __0:
+; CHECK-NEXT: %__3 = trunc i32 %__0 to i1
+; CHECK-NEXT: %__4 = select i1 %__3, float %__1, float %__2
+; CHECK-NEXT: ret void
+; CHECK-NEXT: }
+
+define void @SelDouble(i32 %pc, double %pt, double %pe) {
+ %vc = trunc i32 %pc to i1
+ %r = select i1 %vc, double %pt, double %pe
+ ret void
+}
+
+; CHECK-NEXT: define void @SelDouble(i32 %__0, double %__1, double %__2) {
+; CHECK-NEXT: __0:
+; CHECK-NEXT: %__3 = trunc i32 %__0 to i1
+; CHECK-NEXT: %__4 = select i1 %__3, double %__1, double %__2
+; CHECK-NEXT: ret void
+; CHECK-NEXT: }
+
+; Note: Only showing tests for vectors <16 x i8>, <4 x i32> and <4 x float>.
+
+define void @SelV16x8(i32 %pc, <16 x i8> %pt, <16 x i8> %pe) {
+ %vc = trunc i32 %pc to i1
+ %r = select i1 %vc, <16 x i8> %pt, <16 x i8> %pe
+ ret void
+}
+
+; CHECK-NEXT: define void @SelV16x8(i32 %__0, <16 x i8> %__1, <16 x i8> %__2) {
+; CHECK-NEXT: __0:
+; CHECK-NEXT: %__3 = trunc i32 %__0 to i1
+; CHECK-NEXT: %__4 = select i1 %__3, <16 x i8> %__1, <16 x i8> %__2
+; CHECK-NEXT: ret void
+; CHECK-NEXT: }
+
+define void @SelV4x32(i32 %pc, <4 x i32> %pt, <4 x i32> %pe) {
+ %vc = trunc i32 %pc to i1
+ %r = select i1 %vc, <4 x i32> %pt, <4 x i32> %pe
+ ret void
+}
+
+; CHECK-NEXT: define void @SelV4x32(i32 %__0, <4 x i32> %__1, <4 x i32> %__2) {
+; CHECK-NEXT: __0:
+; CHECK-NEXT: %__3 = trunc i32 %__0 to i1
+; CHECK-NEXT: %__4 = select i1 %__3, <4 x i32> %__1, <4 x i32> %__2
+; CHECK-NEXT: ret void
+; CHECK-NEXT: }
+
+define void @SelV4xfloat(i32 %pc, <4 x float> %pt, <4 x float> %pe) {
+ %vc = trunc i32 %pc to i1
+ %r = select i1 %vc, <4 x float> %pt, <4 x float> %pe
+ ret void
+}
+
+; CHECK-NEXT: define void @SelV4xfloat(i32 %__0, <4 x float> %__1, <4 x float> %__2) {
+; CHECK-NEXT: __0:
+; CHECK-NEXT: %__3 = trunc i32 %__0 to i1
+; CHECK-NEXT: %__4 = select i1 %__3, <4 x float> %__1, <4 x float> %__2
+; CHECK-NEXT: ret void
+; CHECK-NEXT: }
+
Jim Stichnoth 2014/09/02 22:34:01 Single blank line (here and once below) for consis
Karl 2014/09/03 17:16:08 Done.
+
+define void @SelV16x8Vcond(<16 x i1> %pc, <16 x i8> %pt, <16 x i8> %pe) {
+ %r = select <16 x i1> %pc, <16 x i8> %pt, <16 x i8> %pe
+ ret void
+}
+
+; CHECK-NEXT: define void @SelV16x8Vcond(<16 x i1> %__0, <16 x i8> %__1, <16 x i8> %__2) {
+; CHECK-NEXT: __0:
+; CHECK-NEXT: %__3 = select <16 x i1> %__0, <16 x i8> %__1, <16 x i8> %__2
+; CHECK-NEXT: ret void
+; CHECK-NEXT: }
+
+
+define void @SelV4x32Vcond(<4 x i1> %pc, <4 x i32> %pt, <4 x i32> %pe) {
+ %r = select <4 x i1> %pc, <4 x i32> %pt, <4 x i32> %pe
+ ret void
+}
+
+; CHECK-NEXT: define void @SelV4x32Vcond(<4 x i1> %__0, <4 x i32> %__1, <4 x i32> %__2) {
+; CHECK-NEXT: __0:
+; CHECK-NEXT: %__3 = select <4 x i1> %__0, <4 x i32> %__1, <4 x i32> %__2
+; CHECK-NEXT: ret void
+; CHECK-NEXT: }
+
+define void @SelV4xfloatVcond(<4 x i1> %pc, <4 x float> %pt, <4 x float> %pe) {
Jim Stichnoth 2014/09/02 22:34:01 For completeness, include some missing combos: (<
Karl 2014/09/03 17:16:08 Done.
Jim Stichnoth 2014/09/03 18:08:22 Still missing one: (<8 x i1> %cond, <8 x i16> %arg
+ %r = select <4 x i1> %pc, <4 x float> %pt, <4 x float> %pe
+ ret void
+}
+
+; CHECK-NEXT: define void @SelV4xfloatVcond(<4 x i1> %__0, <4 x float> %__1, <4 x float> %__2) {
+; CHECK-NEXT: __0:
+; CHECK-NEXT: %__3 = select <4 x i1> %__0, <4 x float> %__1, <4 x float> %__2
+; CHECK-NEXT: ret void
+; CHECK-NEXT: }
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