Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(574)

Unified Diff: src/mips/code-stubs-mips.cc

Issue 531033003: MIPS: Minor-key-ify four stubs. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 3 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
« no previous file with comments | « no previous file | src/mips/macro-assembler-mips.cc » ('j') | no next file with comments »
Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
Index: src/mips/code-stubs-mips.cc
diff --git a/src/mips/code-stubs-mips.cc b/src/mips/code-stubs-mips.cc
index a175e792b1d7a24017976206ff16bae1b25c3019..e79608fdf97494286a347b6094feb812804706f5 100644
--- a/src/mips/code-stubs-mips.cc
+++ b/src/mips/code-stubs-mips.cc
@@ -742,8 +742,8 @@ void ICCompareStub::GenerateGeneric(MacroAssembler* masm) {
Condition cc = GetCondition();
Label miss;
- ICCompareStub_CheckInputType(masm, lhs, a2, left_, &miss);
- ICCompareStub_CheckInputType(masm, rhs, a3, right_, &miss);
+ ICCompareStub_CheckInputType(masm, lhs, a2, left(), &miss);
+ ICCompareStub_CheckInputType(masm, rhs, a3, right(), &miss);
Label slow; // Call builtin.
Label not_smis, both_loaded_as_doubles;
@@ -3648,7 +3648,7 @@ void BinaryOpICWithAllocationSiteStub::Generate(MacroAssembler* masm) {
void ICCompareStub::GenerateSmis(MacroAssembler* masm) {
- DCHECK(state_ == CompareIC::SMI);
+ DCHECK(state() == CompareIC::SMI);
Label miss;
__ Or(a2, a1, a0);
__ JumpIfNotSmi(a2, &miss);
@@ -3671,16 +3671,16 @@ void ICCompareStub::GenerateSmis(MacroAssembler* masm) {
void ICCompareStub::GenerateNumbers(MacroAssembler* masm) {
- DCHECK(state_ == CompareIC::NUMBER);
+ DCHECK(state() == CompareIC::NUMBER);
Label generic_stub;
Label unordered, maybe_undefined1, maybe_undefined2;
Label miss;
- if (left_ == CompareIC::SMI) {
+ if (left() == CompareIC::SMI) {
__ JumpIfNotSmi(a1, &miss);
}
- if (right_ == CompareIC::SMI) {
+ if (right() == CompareIC::SMI) {
__ JumpIfNotSmi(a0, &miss);
}
@@ -3738,12 +3738,12 @@ void ICCompareStub::GenerateNumbers(MacroAssembler* masm) {
__ bind(&unordered);
__ bind(&generic_stub);
- ICCompareStub stub(isolate(), op_, CompareIC::GENERIC, CompareIC::GENERIC,
+ ICCompareStub stub(isolate(), op(), CompareIC::GENERIC, CompareIC::GENERIC,
CompareIC::GENERIC);
__ Jump(stub.GetCode(), RelocInfo::CODE_TARGET);
__ bind(&maybe_undefined1);
- if (Token::IsOrderedRelationalCompareOp(op_)) {
+ if (Token::IsOrderedRelationalCompareOp(op())) {
__ LoadRoot(at, Heap::kUndefinedValueRootIndex);
__ Branch(&miss, ne, a0, Operand(at));
__ JumpIfSmi(a1, &unordered);
@@ -3753,7 +3753,7 @@ void ICCompareStub::GenerateNumbers(MacroAssembler* masm) {
}
__ bind(&maybe_undefined2);
- if (Token::IsOrderedRelationalCompareOp(op_)) {
+ if (Token::IsOrderedRelationalCompareOp(op())) {
__ LoadRoot(at, Heap::kUndefinedValueRootIndex);
__ Branch(&unordered, eq, a1, Operand(at));
}
@@ -3764,7 +3764,7 @@ void ICCompareStub::GenerateNumbers(MacroAssembler* masm) {
void ICCompareStub::GenerateInternalizedStrings(MacroAssembler* masm) {
- DCHECK(state_ == CompareIC::INTERNALIZED_STRING);
+ DCHECK(state() == CompareIC::INTERNALIZED_STRING);
Label miss;
// Registers containing left and right operands respectively.
@@ -3804,7 +3804,7 @@ void ICCompareStub::GenerateInternalizedStrings(MacroAssembler* masm) {
void ICCompareStub::GenerateUniqueNames(MacroAssembler* masm) {
- DCHECK(state_ == CompareIC::UNIQUE_NAME);
+ DCHECK(state() == CompareIC::UNIQUE_NAME);
DCHECK(GetCondition() == eq);
Label miss;
@@ -3848,10 +3848,10 @@ void ICCompareStub::GenerateUniqueNames(MacroAssembler* masm) {
void ICCompareStub::GenerateStrings(MacroAssembler* masm) {
- DCHECK(state_ == CompareIC::STRING);
+ DCHECK(state() == CompareIC::STRING);
Label miss;
- bool equality = Token::IsEqualityOp(op_);
+ bool equality = Token::IsEqualityOp(op());
// Registers containing left and right operands respectively.
Register left = a1;
@@ -3934,7 +3934,7 @@ void ICCompareStub::GenerateStrings(MacroAssembler* masm) {
void ICCompareStub::GenerateObjects(MacroAssembler* masm) {
- DCHECK(state_ == CompareIC::OBJECT);
+ DCHECK(state() == CompareIC::OBJECT);
Label miss;
__ And(a2, a1, Operand(a0));
__ JumpIfSmi(a2, &miss);
@@ -3978,7 +3978,7 @@ void ICCompareStub::GenerateMiss(MacroAssembler* masm) {
FrameScope scope(masm, StackFrame::INTERNAL);
__ Push(a1, a0);
__ Push(ra, a1, a0);
- __ li(t0, Operand(Smi::FromInt(op_)));
+ __ li(t0, Operand(Smi::FromInt(op())));
__ addiu(sp, sp, -kPointerSize);
__ CallExternalReference(miss, 3, USE_DELAY_SLOT);
__ sw(t0, MemOperand(sp)); // In the delay slot.
« no previous file with comments | « no previous file | src/mips/macro-assembler-mips.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698