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Issue 528993002: First step to cleanup the power-of-2 mess. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: clang-format Created 6 years, 3 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <limits.h> // For LONG_MIN, LONG_MAX. 5 #include <limits.h> // For LONG_MIN, LONG_MAX.
6 6
7 #include "src/v8.h" 7 #include "src/v8.h"
8 8
9 #if V8_TARGET_ARCH_ARM 9 #if V8_TARGET_ARCH_ARM
10 10
11 #include "src/base/bits.h"
11 #include "src/bootstrapper.h" 12 #include "src/bootstrapper.h"
12 #include "src/codegen.h" 13 #include "src/codegen.h"
13 #include "src/cpu-profiler.h" 14 #include "src/cpu-profiler.h"
14 #include "src/debug.h" 15 #include "src/debug.h"
15 #include "src/isolate-inl.h" 16 #include "src/isolate-inl.h"
16 #include "src/runtime.h" 17 #include "src/runtime.h"
17 18
18 namespace v8 { 19 namespace v8 {
19 namespace internal { 20 namespace internal {
20 21
(...skipping 242 matching lines...) Expand 10 before | Expand all | Expand 10 after
263 264
264 void MacroAssembler::And(Register dst, Register src1, const Operand& src2, 265 void MacroAssembler::And(Register dst, Register src1, const Operand& src2,
265 Condition cond) { 266 Condition cond) {
266 if (!src2.is_reg() && 267 if (!src2.is_reg() &&
267 !src2.must_output_reloc_info(this) && 268 !src2.must_output_reloc_info(this) &&
268 src2.immediate() == 0) { 269 src2.immediate() == 0) {
269 mov(dst, Operand::Zero(), LeaveCC, cond); 270 mov(dst, Operand::Zero(), LeaveCC, cond);
270 } else if (!(src2.instructions_required(this) == 1) && 271 } else if (!(src2.instructions_required(this) == 1) &&
271 !src2.must_output_reloc_info(this) && 272 !src2.must_output_reloc_info(this) &&
272 CpuFeatures::IsSupported(ARMv7) && 273 CpuFeatures::IsSupported(ARMv7) &&
273 IsPowerOf2(src2.immediate() + 1)) { 274 base::bits::IsPowerOfTwo32(src2.immediate() + 1)) {
274 ubfx(dst, src1, 0, 275 ubfx(dst, src1, 0,
275 WhichPowerOf2(static_cast<uint32_t>(src2.immediate()) + 1), cond); 276 WhichPowerOf2(static_cast<uint32_t>(src2.immediate()) + 1), cond);
276 } else { 277 } else {
277 and_(dst, src1, src2, LeaveCC, cond); 278 and_(dst, src1, src2, LeaveCC, cond);
278 } 279 }
279 } 280 }
280 281
281 282
282 void MacroAssembler::Ubfx(Register dst, Register src1, int lsb, int width, 283 void MacroAssembler::Ubfx(Register dst, Register src1, int lsb, int width,
283 Condition cond) { 284 Condition cond) {
(...skipping 783 matching lines...) Expand 10 before | Expand all | Expand 10 after
1067 // DwVfpRegister::kMaxNumRegisters * kDoubleSize, 1068 // DwVfpRegister::kMaxNumRegisters * kDoubleSize,
1068 // since the sp slot, code slot and constant pool slot (if 1069 // since the sp slot, code slot and constant pool slot (if
1069 // FLAG_enable_ool_constant_pool) were pushed after the fp. 1070 // FLAG_enable_ool_constant_pool) were pushed after the fp.
1070 } 1071 }
1071 1072
1072 // Reserve place for the return address and stack space and align the frame 1073 // Reserve place for the return address and stack space and align the frame
1073 // preparing for calling the runtime function. 1074 // preparing for calling the runtime function.
1074 const int frame_alignment = MacroAssembler::ActivationFrameAlignment(); 1075 const int frame_alignment = MacroAssembler::ActivationFrameAlignment();
1075 sub(sp, sp, Operand((stack_space + 1) * kPointerSize)); 1076 sub(sp, sp, Operand((stack_space + 1) * kPointerSize));
1076 if (frame_alignment > 0) { 1077 if (frame_alignment > 0) {
1077 DCHECK(IsPowerOf2(frame_alignment)); 1078 DCHECK(base::bits::IsPowerOfTwo32(frame_alignment));
1078 and_(sp, sp, Operand(-frame_alignment)); 1079 and_(sp, sp, Operand(-frame_alignment));
1079 } 1080 }
1080 1081
1081 // Set the exit frame sp value to point just before the return address 1082 // Set the exit frame sp value to point just before the return address
1082 // location. 1083 // location.
1083 add(ip, sp, Operand(kPointerSize)); 1084 add(ip, sp, Operand(kPointerSize));
1084 str(ip, MemOperand(fp, ExitFrameConstants::kSPOffset)); 1085 str(ip, MemOperand(fp, ExitFrameConstants::kSPOffset));
1085 } 1086 }
1086 1087
1087 1088
(...skipping 2393 matching lines...) Expand 10 before | Expand all | Expand 10 after
3481 int num_double_arguments, 3482 int num_double_arguments,
3482 Register scratch) { 3483 Register scratch) {
3483 int frame_alignment = ActivationFrameAlignment(); 3484 int frame_alignment = ActivationFrameAlignment();
3484 int stack_passed_arguments = CalculateStackPassedWords( 3485 int stack_passed_arguments = CalculateStackPassedWords(
3485 num_reg_arguments, num_double_arguments); 3486 num_reg_arguments, num_double_arguments);
3486 if (frame_alignment > kPointerSize) { 3487 if (frame_alignment > kPointerSize) {
3487 // Make stack end at alignment and make room for num_arguments - 4 words 3488 // Make stack end at alignment and make room for num_arguments - 4 words
3488 // and the original value of sp. 3489 // and the original value of sp.
3489 mov(scratch, sp); 3490 mov(scratch, sp);
3490 sub(sp, sp, Operand((stack_passed_arguments + 1) * kPointerSize)); 3491 sub(sp, sp, Operand((stack_passed_arguments + 1) * kPointerSize));
3491 DCHECK(IsPowerOf2(frame_alignment)); 3492 DCHECK(base::bits::IsPowerOfTwo32(frame_alignment));
3492 and_(sp, sp, Operand(-frame_alignment)); 3493 and_(sp, sp, Operand(-frame_alignment));
3493 str(scratch, MemOperand(sp, stack_passed_arguments * kPointerSize)); 3494 str(scratch, MemOperand(sp, stack_passed_arguments * kPointerSize));
3494 } else { 3495 } else {
3495 sub(sp, sp, Operand(stack_passed_arguments * kPointerSize)); 3496 sub(sp, sp, Operand(stack_passed_arguments * kPointerSize));
3496 } 3497 }
3497 } 3498 }
3498 3499
3499 3500
3500 void MacroAssembler::PrepareCallCFunction(int num_reg_arguments, 3501 void MacroAssembler::PrepareCallCFunction(int num_reg_arguments,
3501 Register scratch) { 3502 Register scratch) {
(...skipping 600 matching lines...) Expand 10 before | Expand all | Expand 10 after
4102 sub(result, result, Operand(dividend)); 4103 sub(result, result, Operand(dividend));
4103 } 4104 }
4104 if (ms.shift() > 0) mov(result, Operand(result, ASR, ms.shift())); 4105 if (ms.shift() > 0) mov(result, Operand(result, ASR, ms.shift()));
4105 add(result, result, Operand(dividend, LSR, 31)); 4106 add(result, result, Operand(dividend, LSR, 31));
4106 } 4107 }
4107 4108
4108 4109
4109 } } // namespace v8::internal 4110 } } // namespace v8::internal
4110 4111
4111 #endif // V8_TARGET_ARCH_ARM 4112 #endif // V8_TARGET_ARCH_ARM
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