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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_IA32. | 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_IA32. |
6 #if defined(TARGET_ARCH_IA32) | 6 #if defined(TARGET_ARCH_IA32) |
7 | 7 |
8 #include "vm/intermediate_language.h" | 8 #include "vm/intermediate_language.h" |
9 | 9 |
10 #include "vm/dart_entry.h" | 10 #include "vm/dart_entry.h" |
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1680 Register temp2 = locs()->temp(1).reg(); | 1680 Register temp2 = locs()->temp(1).reg(); |
1681 | 1681 |
1682 if (is_initialization_) { | 1682 if (is_initialization_) { |
1683 StoreInstanceFieldSlowPath* slow_path = | 1683 StoreInstanceFieldSlowPath* slow_path = |
1684 new StoreInstanceFieldSlowPath(this); | 1684 new StoreInstanceFieldSlowPath(this); |
1685 compiler->AddSlowPathCode(slow_path); | 1685 compiler->AddSlowPathCode(slow_path); |
1686 | 1686 |
1687 __ TryAllocate(compiler->double_class(), | 1687 __ TryAllocate(compiler->double_class(), |
1688 slow_path->entry_label(), | 1688 slow_path->entry_label(), |
1689 Assembler::kFarJump, | 1689 Assembler::kFarJump, |
1690 temp); | 1690 temp, |
| 1691 temp2); |
1691 __ Bind(slow_path->exit_label()); | 1692 __ Bind(slow_path->exit_label()); |
1692 __ movl(temp2, temp); | 1693 __ movl(temp2, temp); |
1693 __ StoreIntoObject(instance_reg, | 1694 __ StoreIntoObject(instance_reg, |
1694 FieldAddress(instance_reg, field().Offset()), | 1695 FieldAddress(instance_reg, field().Offset()), |
1695 temp2); | 1696 temp2); |
1696 } else { | 1697 } else { |
1697 __ movl(temp, FieldAddress(instance_reg, field().Offset())); | 1698 __ movl(temp, FieldAddress(instance_reg, field().Offset())); |
1698 } | 1699 } |
1699 __ movsd(FieldAddress(temp, Double::value_offset()), value); | 1700 __ movsd(FieldAddress(temp, Double::value_offset()), value); |
1700 return; | 1701 return; |
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1729 compiler->AddSlowPathCode(slow_path); | 1730 compiler->AddSlowPathCode(slow_path); |
1730 | 1731 |
1731 if (!compiler->is_optimizing()) { | 1732 if (!compiler->is_optimizing()) { |
1732 locs()->live_registers()->Add(locs()->in(0)); | 1733 locs()->live_registers()->Add(locs()->in(0)); |
1733 locs()->live_registers()->Add(locs()->in(1)); | 1734 locs()->live_registers()->Add(locs()->in(1)); |
1734 } | 1735 } |
1735 | 1736 |
1736 __ TryAllocate(compiler->double_class(), | 1737 __ TryAllocate(compiler->double_class(), |
1737 slow_path->entry_label(), | 1738 slow_path->entry_label(), |
1738 Assembler::kFarJump, | 1739 Assembler::kFarJump, |
1739 temp); | 1740 temp, |
| 1741 temp2); |
1740 __ Bind(slow_path->exit_label()); | 1742 __ Bind(slow_path->exit_label()); |
1741 __ movl(temp2, temp); | 1743 __ movl(temp2, temp); |
1742 __ StoreIntoObject(instance_reg, | 1744 __ StoreIntoObject(instance_reg, |
1743 FieldAddress(instance_reg, field().Offset()), | 1745 FieldAddress(instance_reg, field().Offset()), |
1744 temp2); | 1746 temp2); |
1745 | 1747 |
1746 __ Bind(©_payload); | 1748 __ Bind(©_payload); |
1747 __ movsd(fpu_temp, FieldAddress(value_reg, Double::value_offset())); | 1749 __ movsd(fpu_temp, FieldAddress(value_reg, Double::value_offset())); |
1748 __ movsd(FieldAddress(temp, Double::value_offset()), fpu_temp); | 1750 __ movsd(FieldAddress(temp, Double::value_offset()), fpu_temp); |
1749 __ jmp(&skip_store); | 1751 __ jmp(&skip_store); |
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1977 BoxDoubleSlowPath* slow_path = new BoxDoubleSlowPath(this); | 1979 BoxDoubleSlowPath* slow_path = new BoxDoubleSlowPath(this); |
1978 compiler->AddSlowPathCode(slow_path); | 1980 compiler->AddSlowPathCode(slow_path); |
1979 | 1981 |
1980 if (!compiler->is_optimizing()) { | 1982 if (!compiler->is_optimizing()) { |
1981 locs()->live_registers()->Add(locs()->in(0)); | 1983 locs()->live_registers()->Add(locs()->in(0)); |
1982 } | 1984 } |
1983 | 1985 |
1984 __ TryAllocate(compiler->double_class(), | 1986 __ TryAllocate(compiler->double_class(), |
1985 slow_path->entry_label(), | 1987 slow_path->entry_label(), |
1986 Assembler::kFarJump, | 1988 Assembler::kFarJump, |
1987 result); | 1989 result, |
| 1990 temp); |
1988 __ Bind(slow_path->exit_label()); | 1991 __ Bind(slow_path->exit_label()); |
1989 __ movl(temp, FieldAddress(instance_reg, offset_in_bytes())); | 1992 __ movl(temp, FieldAddress(instance_reg, offset_in_bytes())); |
1990 __ movsd(value, FieldAddress(temp, Double::value_offset())); | 1993 __ movsd(value, FieldAddress(temp, Double::value_offset())); |
1991 __ movsd(FieldAddress(result, Double::value_offset()), value); | 1994 __ movsd(FieldAddress(result, Double::value_offset()), value); |
1992 __ jmp(&done); | 1995 __ jmp(&done); |
1993 __ Bind(&load_pointer); | 1996 __ Bind(&load_pointer); |
1994 } | 1997 } |
1995 __ movl(result, FieldAddress(instance_reg, offset_in_bytes())); | 1998 __ movl(result, FieldAddress(instance_reg, offset_in_bytes())); |
1996 __ Bind(&done); | 1999 __ Bind(&done); |
1997 } | 2000 } |
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2860 void BoxDoubleInstr::EmitNativeCode(FlowGraphCompiler* compiler) { | 2863 void BoxDoubleInstr::EmitNativeCode(FlowGraphCompiler* compiler) { |
2861 BoxDoubleSlowPath* slow_path = new BoxDoubleSlowPath(this); | 2864 BoxDoubleSlowPath* slow_path = new BoxDoubleSlowPath(this); |
2862 compiler->AddSlowPathCode(slow_path); | 2865 compiler->AddSlowPathCode(slow_path); |
2863 | 2866 |
2864 Register out_reg = locs()->out().reg(); | 2867 Register out_reg = locs()->out().reg(); |
2865 XmmRegister value = locs()->in(0).fpu_reg(); | 2868 XmmRegister value = locs()->in(0).fpu_reg(); |
2866 | 2869 |
2867 __ TryAllocate(compiler->double_class(), | 2870 __ TryAllocate(compiler->double_class(), |
2868 slow_path->entry_label(), | 2871 slow_path->entry_label(), |
2869 Assembler::kFarJump, | 2872 Assembler::kFarJump, |
2870 out_reg); | 2873 out_reg, |
| 2874 kNoRegister); |
2871 __ Bind(slow_path->exit_label()); | 2875 __ Bind(slow_path->exit_label()); |
2872 __ movsd(FieldAddress(out_reg, Double::value_offset()), value); | 2876 __ movsd(FieldAddress(out_reg, Double::value_offset()), value); |
2873 } | 2877 } |
2874 | 2878 |
2875 | 2879 |
2876 LocationSummary* UnboxDoubleInstr::MakeLocationSummary(bool opt) const { | 2880 LocationSummary* UnboxDoubleInstr::MakeLocationSummary(bool opt) const { |
2877 const intptr_t kNumInputs = 1; | 2881 const intptr_t kNumInputs = 1; |
2878 const intptr_t value_cid = value()->Type()->ToCid(); | 2882 const intptr_t value_cid = value()->Type()->ToCid(); |
2879 const bool needs_temp = ((value_cid != kSmiCid) && (value_cid != kDoubleCid)); | 2883 const bool needs_temp = ((value_cid != kSmiCid) && (value_cid != kDoubleCid)); |
2880 const bool needs_writable_input = (value_cid == kSmiCid); | 2884 const bool needs_writable_input = (value_cid == kSmiCid); |
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2967 void BoxFloat32x4Instr::EmitNativeCode(FlowGraphCompiler* compiler) { | 2971 void BoxFloat32x4Instr::EmitNativeCode(FlowGraphCompiler* compiler) { |
2968 BoxFloat32x4SlowPath* slow_path = new BoxFloat32x4SlowPath(this); | 2972 BoxFloat32x4SlowPath* slow_path = new BoxFloat32x4SlowPath(this); |
2969 compiler->AddSlowPathCode(slow_path); | 2973 compiler->AddSlowPathCode(slow_path); |
2970 | 2974 |
2971 Register out_reg = locs()->out().reg(); | 2975 Register out_reg = locs()->out().reg(); |
2972 XmmRegister value = locs()->in(0).fpu_reg(); | 2976 XmmRegister value = locs()->in(0).fpu_reg(); |
2973 | 2977 |
2974 __ TryAllocate(compiler->float32x4_class(), | 2978 __ TryAllocate(compiler->float32x4_class(), |
2975 slow_path->entry_label(), | 2979 slow_path->entry_label(), |
2976 Assembler::kFarJump, | 2980 Assembler::kFarJump, |
2977 out_reg); | 2981 out_reg, |
| 2982 kNoRegister); |
2978 __ Bind(slow_path->exit_label()); | 2983 __ Bind(slow_path->exit_label()); |
2979 __ movups(FieldAddress(out_reg, Float32x4::value_offset()), value); | 2984 __ movups(FieldAddress(out_reg, Float32x4::value_offset()), value); |
2980 } | 2985 } |
2981 | 2986 |
2982 | 2987 |
2983 LocationSummary* UnboxFloat32x4Instr::MakeLocationSummary(bool opt) const { | 2988 LocationSummary* UnboxFloat32x4Instr::MakeLocationSummary(bool opt) const { |
2984 const intptr_t value_cid = value()->Type()->ToCid(); | 2989 const intptr_t value_cid = value()->Type()->ToCid(); |
2985 const intptr_t kNumInputs = 1; | 2990 const intptr_t kNumInputs = 1; |
2986 const intptr_t kNumTemps = value_cid == kFloat32x4Cid ? 0 : 1; | 2991 const intptr_t kNumTemps = value_cid == kFloat32x4Cid ? 0 : 1; |
2987 LocationSummary* summary = | 2992 LocationSummary* summary = |
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3061 void BoxInt32x4Instr::EmitNativeCode(FlowGraphCompiler* compiler) { | 3066 void BoxInt32x4Instr::EmitNativeCode(FlowGraphCompiler* compiler) { |
3062 BoxInt32x4SlowPath* slow_path = new BoxInt32x4SlowPath(this); | 3067 BoxInt32x4SlowPath* slow_path = new BoxInt32x4SlowPath(this); |
3063 compiler->AddSlowPathCode(slow_path); | 3068 compiler->AddSlowPathCode(slow_path); |
3064 | 3069 |
3065 Register out_reg = locs()->out().reg(); | 3070 Register out_reg = locs()->out().reg(); |
3066 XmmRegister value = locs()->in(0).fpu_reg(); | 3071 XmmRegister value = locs()->in(0).fpu_reg(); |
3067 | 3072 |
3068 __ TryAllocate(compiler->int32x4_class(), | 3073 __ TryAllocate(compiler->int32x4_class(), |
3069 slow_path->entry_label(), | 3074 slow_path->entry_label(), |
3070 Assembler::kFarJump, | 3075 Assembler::kFarJump, |
3071 out_reg); | 3076 out_reg, |
| 3077 kNoRegister); |
3072 __ Bind(slow_path->exit_label()); | 3078 __ Bind(slow_path->exit_label()); |
3073 __ movups(FieldAddress(out_reg, Int32x4::value_offset()), value); | 3079 __ movups(FieldAddress(out_reg, Int32x4::value_offset()), value); |
3074 } | 3080 } |
3075 | 3081 |
3076 | 3082 |
3077 LocationSummary* UnboxInt32x4Instr::MakeLocationSummary(bool opt) const { | 3083 LocationSummary* UnboxInt32x4Instr::MakeLocationSummary(bool opt) const { |
3078 const intptr_t value_cid = value()->Type()->ToCid(); | 3084 const intptr_t value_cid = value()->Type()->ToCid(); |
3079 const intptr_t kNumInputs = 1; | 3085 const intptr_t kNumInputs = 1; |
3080 const intptr_t kNumTemps = value_cid == kInt32x4Cid ? 0 : 1; | 3086 const intptr_t kNumTemps = value_cid == kInt32x4Cid ? 0 : 1; |
3081 LocationSummary* summary = | 3087 LocationSummary* summary = |
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4668 | 4674 |
4669 __ SmiTag(EAX); | 4675 __ SmiTag(EAX); |
4670 __ movl(out_reg, EAX); | 4676 __ movl(out_reg, EAX); |
4671 __ jmp(&done); | 4677 __ jmp(&done); |
4672 | 4678 |
4673 __ Bind(¬_smi); | 4679 __ Bind(¬_smi); |
4674 __ TryAllocate( | 4680 __ TryAllocate( |
4675 Class::ZoneHandle(Isolate::Current()->object_store()->mint_class()), | 4681 Class::ZoneHandle(Isolate::Current()->object_store()->mint_class()), |
4676 slow_path->entry_label(), | 4682 slow_path->entry_label(), |
4677 Assembler::kFarJump, | 4683 Assembler::kFarJump, |
4678 out_reg); | 4684 out_reg, |
| 4685 kNoRegister); |
4679 __ Bind(slow_path->exit_label()); | 4686 __ Bind(slow_path->exit_label()); |
4680 __ movsd(FieldAddress(out_reg, Mint::value_offset()), value); | 4687 __ movsd(FieldAddress(out_reg, Mint::value_offset()), value); |
4681 __ Bind(&done); | 4688 __ Bind(&done); |
4682 } | 4689 } |
4683 | 4690 |
4684 | 4691 |
4685 LocationSummary* BinaryMintOpInstr::MakeLocationSummary(bool opt) const { | 4692 LocationSummary* BinaryMintOpInstr::MakeLocationSummary(bool opt) const { |
4686 const intptr_t kNumInputs = 2; | 4693 const intptr_t kNumInputs = 2; |
4687 switch (op_kind()) { | 4694 switch (op_kind()) { |
4688 case Token::kBIT_AND: | 4695 case Token::kBIT_AND: |
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5227 PcDescriptors::kOther, | 5234 PcDescriptors::kOther, |
5228 locs()); | 5235 locs()); |
5229 __ Drop(2); // Discard type arguments and receiver. | 5236 __ Drop(2); // Discard type arguments and receiver. |
5230 } | 5237 } |
5231 | 5238 |
5232 } // namespace dart | 5239 } // namespace dart |
5233 | 5240 |
5234 #undef __ | 5241 #undef __ |
5235 | 5242 |
5236 #endif // defined TARGET_ARCH_IA32 | 5243 #endif // defined TARGET_ARCH_IA32 |
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