Track live instance and allocation counts for classes

runtime/vm/intermediate_language_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_ARM.
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/intermediate_language.h"
 
 #include "vm/dart_entry.h"
@@ skipping 2590 matching lines @@
   } else {
     __ orr(IP, left, ShifterOperand(right));
     __ tst(IP, ShifterOperand(kSmiTagMask));
   }
   __ b(deopt, EQ);
 }
 
 
 LocationSummary* BoxDoubleInstr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 1;
-  const intptr_t kNumTemps = 0;
+  const intptr_t kNumTemps = 1;
   LocationSummary* summary =
       new LocationSummary(kNumInputs,
                           kNumTemps,
                           LocationSummary::kCallOnSlowPath);
   summary->set_in(0, Location::RequiresFpuRegister());
+  summary->set_temp(0, Location::RequiresRegister());
   summary->set_out(Location::RequiresRegister());
   return summary;
 }
 
 
 class BoxDoubleSlowPath : public SlowPathCode {
  public:
   explicit BoxDoubleSlowPath(BoxDoubleInstr* instruction)
       : instruction_(instruction) { }
 
@@ skipping 26 matching lines @@
 
 void BoxDoubleInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
   BoxDoubleSlowPath* slow_path = new BoxDoubleSlowPath(this);
   compiler->AddSlowPathCode(slow_path);
 
   const Register out_reg = locs()->out().reg();
   const DRegister value = EvenDRegisterOf(locs()->in(0).fpu_reg());
 
   __ TryAllocate(compiler->double_class(),
                  slow_path->entry_label(),
-                 out_reg);
+                 out_reg,
+                 locs()->temp(0).reg());
   __ Bind(slow_path->exit_label());
   __ StoreDToOffset(value, out_reg, Double::value_offset() - kHeapObjectTag);
 }
 
 
 LocationSummary* UnboxDoubleInstr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 1;
   const intptr_t value_cid = value()->Type()->ToCid();
   const bool needs_temp = ((value_cid != kSmiCid) && (value_cid != kDoubleCid));
   const bool needs_writable_input = (value_cid == kSmiCid);
@@ skipping 35 matching lines @@
     __ mov(IP, ShifterOperand(value, ASR, 1));  // Copy and untag.
     __ vmovsr(STMP, IP);
     __ vcvtdi(result, STMP);
     __ Bind(&done);
   }
 }
 
 
 LocationSummary* BoxFloat32x4Instr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 1;
-  const intptr_t kNumTemps = 0;
+  const intptr_t kNumTemps = 1;
   LocationSummary* summary =
       new LocationSummary(kNumInputs,
                           kNumTemps,
                           LocationSummary::kCallOnSlowPath);
   summary->set_in(0, Location::RequiresFpuRegister());
+  summary->set_temp(0, Location::RequiresRegister());
   summary->set_out(Location::RequiresRegister());
   return summary;
 }
 
 
 class BoxFloat32x4SlowPath : public SlowPathCode {
  public:
   explicit BoxFloat32x4SlowPath(BoxFloat32x4Instr* instruction)
       : instruction_(instruction) { }
 
@@ skipping 28 matching lines @@
   BoxFloat32x4SlowPath* slow_path = new BoxFloat32x4SlowPath(this);
   compiler->AddSlowPathCode(slow_path);
 
   Register out_reg = locs()->out().reg();
   QRegister value = locs()->in(0).fpu_reg();
   DRegister value_even = EvenDRegisterOf(value);
   DRegister value_odd = OddDRegisterOf(value);
 
   __ TryAllocate(compiler->float32x4_class(),
                  slow_path->entry_label(),
-                 out_reg);
+                 out_reg,
+                 locs()->temp(0).reg());
   __ Bind(slow_path->exit_label());
 
   __ StoreDToOffset(value_even, out_reg,
       Float32x4::value_offset() - kHeapObjectTag);
   __ StoreDToOffset(value_odd, out_reg,
       Float32x4::value_offset() + 2*kWordSize - kHeapObjectTag);
 }
 
 
 LocationSummary* UnboxFloat32x4Instr::MakeLocationSummary() const {
@@ skipping 30 matching lines @@
   const DRegister result_odd = OddDRegisterOf(result);
   __ LoadDFromOffset(result_even, value,
       Float32x4::value_offset() - kHeapObjectTag);
   __ LoadDFromOffset(result_odd, value,
       Float32x4::value_offset() + 2*kWordSize - kHeapObjectTag);
 }
 
 
 LocationSummary* BoxInt32x4Instr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 1;
-  const intptr_t kNumTemps = 0;
+  const intptr_t kNumTemps = 1;
   LocationSummary* summary =
       new LocationSummary(kNumInputs,
                           kNumTemps,
                           LocationSummary::kCallOnSlowPath);
   summary->set_in(0, Location::RequiresFpuRegister());
+  summary->set_temp(0, Location::RequiresRegister());
   summary->set_out(Location::RequiresRegister());
   return summary;
 }
 
 
 class BoxInt32x4SlowPath : public SlowPathCode {
  public:
   explicit BoxInt32x4SlowPath(BoxInt32x4Instr* instruction)
       : instruction_(instruction) { }
 
@@ skipping 28 matching lines @@
   BoxInt32x4SlowPath* slow_path = new BoxInt32x4SlowPath(this);
   compiler->AddSlowPathCode(slow_path);
 
   Register out_reg = locs()->out().reg();
   QRegister value = locs()->in(0).fpu_reg();
   DRegister value_even = EvenDRegisterOf(value);
   DRegister value_odd = OddDRegisterOf(value);
 
   __ TryAllocate(compiler->int32x4_class(),
                  slow_path->entry_label(),
-                 out_reg);
+                 out_reg,
+                 locs()->temp(0).reg());
   __ Bind(slow_path->exit_label());
   __ StoreDToOffset(value_even, out_reg,
       Int32x4::value_offset() - kHeapObjectTag);
   __ StoreDToOffset(value_odd, out_reg,
       Int32x4::value_offset() + 2*kWordSize - kHeapObjectTag);
 }
 
 
 LocationSummary* UnboxInt32x4Instr::MakeLocationSummary() const {
   const intptr_t value_cid = value()->Type()->ToCid();
@@ skipping 1724 matching lines @@
   compiler->GenerateCall(token_pos(),
                          &label,
                          PcDescriptors::kOther,
                          locs());
   __ Drop(2);  // Discard type arguments and receiver.
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM