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Side by Side Diff: runtime/vm/assembler_ia32.cc

Issue 51653006: Track live instance and allocation counts for classes (Closed) Base URL: https://dart.googlecode.com/svn/branches/bleeding_edge/dart
Patch Set: Created 7 years, 1 month ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_IA32) 6 #if defined(TARGET_ARCH_IA32)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/code_generator.h" 9 #include "vm/code_generator.h"
10 #include "vm/heap.h" 10 #include "vm/heap.h"
11 #include "vm/heap_class_stats.h"
11 #include "vm/memory_region.h" 12 #include "vm/memory_region.h"
12 #include "vm/runtime_entry.h" 13 #include "vm/runtime_entry.h"
13 #include "vm/stack_frame.h" 14 #include "vm/stack_frame.h"
14 #include "vm/stub_code.h" 15 #include "vm/stub_code.h"
15 16
16 namespace dart { 17 namespace dart {
17 18
18 DEFINE_FLAG(bool, print_stop_message, true, "Print stop message."); 19 DEFINE_FLAG(bool, print_stop_message, true, "Print stop message.");
19 DEFINE_FLAG(bool, use_sse41, true, "Use SSE 4.1 if available"); 20 DEFINE_FLAG(bool, use_sse41, true, "Use SSE 4.1 if available");
20 DECLARE_FLAG(bool, inline_alloc); 21 DECLARE_FLAG(bool, inline_alloc);
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2245 while (label->HasNear()) { 2246 while (label->HasNear()) {
2246 intptr_t position = label->NearPosition(); 2247 intptr_t position = label->NearPosition();
2247 intptr_t offset = bound - (position + 1); 2248 intptr_t offset = bound - (position + 1);
2248 ASSERT(Utils::IsInt(8, offset)); 2249 ASSERT(Utils::IsInt(8, offset));
2249 buffer_.Store<int8_t>(position, offset); 2250 buffer_.Store<int8_t>(position, offset);
2250 } 2251 }
2251 label->BindTo(bound); 2252 label->BindTo(bound);
2252 } 2253 }
2253 2254
2254 2255
2256 // Updates the allocation count for cid.
2257 void Assembler::BumpAllocationCount(intptr_t cid,
2258 Register temp_reg) {
2259 ASSERT(temp_reg != kNoRegister);
2260 HeapClassStatistics* heap_class_stats =
2261 Isolate::Current()->heap_class_stats();
2262 // temp_reg gets address of class table pointer.
2263 movl(temp_reg, Address::Absolute(heap_class_stats->ClassStatsTableAddress()));
2264 // Offset into class table.
2265 const intptr_t offset = cid * sizeof(HeapClassData); // NOLINT
2266 // temp_reg points at HeapClassData for cid + offset to allocation count.
2267 leal(temp_reg, Address(temp_reg, offset));
2268 // Increment allocation count.
2269 addl(Address(temp_reg, HeapClassData::allocated_since_gc_offset()),
2270 Immediate(1));
2271 }
2272
2255 void Assembler::TryAllocate(const Class& cls, 2273 void Assembler::TryAllocate(const Class& cls,
2256 Label* failure, 2274 Label* failure,
2257 bool near_jump, 2275 bool near_jump,
2258 Register instance_reg) { 2276 Register instance_reg,
2277 Register temp_reg) {
2259 ASSERT(failure != NULL); 2278 ASSERT(failure != NULL);
2279 ASSERT(temp_reg != kNoRegister);
2260 if (FLAG_inline_alloc) { 2280 if (FLAG_inline_alloc) {
2261 Heap* heap = Isolate::Current()->heap(); 2281 Heap* heap = Isolate::Current()->heap();
2262 const intptr_t instance_size = cls.instance_size(); 2282 const intptr_t instance_size = cls.instance_size();
2263 movl(instance_reg, Address::Absolute(heap->TopAddress())); 2283 movl(instance_reg, Address::Absolute(heap->TopAddress()));
2264 addl(instance_reg, Immediate(instance_size)); 2284 addl(instance_reg, Immediate(instance_size));
2265 // instance_reg: potential next object start. 2285 // instance_reg: potential next object start.
2266 cmpl(instance_reg, Address::Absolute(heap->EndAddress())); 2286 cmpl(instance_reg, Address::Absolute(heap->EndAddress()));
2267 j(ABOVE_EQUAL, failure, near_jump); 2287 j(ABOVE_EQUAL, failure, near_jump);
2268 // Successfully allocated the object, now update top to point to 2288 // Successfully allocated the object, now update top to point to
2269 // next object start and store the class in the class field of object. 2289 // next object start and store the class in the class field of object.
2270 movl(Address::Absolute(heap->TopAddress()), instance_reg); 2290 movl(Address::Absolute(heap->TopAddress()), instance_reg);
2291 BumpAllocationCount(cls.id(), temp_reg);
2271 ASSERT(instance_size >= kHeapObjectTag); 2292 ASSERT(instance_size >= kHeapObjectTag);
2272 subl(instance_reg, Immediate(instance_size - kHeapObjectTag)); 2293 subl(instance_reg, Immediate(instance_size - kHeapObjectTag));
2273 uword tags = 0; 2294 uword tags = 0;
2274 tags = RawObject::SizeTag::update(instance_size, tags); 2295 tags = RawObject::SizeTag::update(instance_size, tags);
2275 ASSERT(cls.id() != kIllegalCid); 2296 ASSERT(cls.id() != kIllegalCid);
2276 tags = RawObject::ClassIdTag::update(cls.id(), tags); 2297 tags = RawObject::ClassIdTag::update(cls.id(), tags);
2277 movl(FieldAddress(instance_reg, Object::tags_offset()), Immediate(tags)); 2298 movl(FieldAddress(instance_reg, Object::tags_offset()), Immediate(tags));
2278 } else { 2299 } else {
2279 jmp(failure); 2300 jmp(failure);
2280 } 2301 }
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2496 2517
2497 const char* Assembler::FpuRegisterName(FpuRegister reg) { 2518 const char* Assembler::FpuRegisterName(FpuRegister reg) {
2498 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters)); 2519 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters));
2499 return xmm_reg_names[reg]; 2520 return xmm_reg_names[reg];
2500 } 2521 }
2501 2522
2502 2523
2503 } // namespace dart 2524 } // namespace dart
2504 2525
2505 #endif // defined TARGET_ARCH_IA32 2526 #endif // defined TARGET_ARCH_IA32
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