Track live instance and allocation counts for classes

runtime/vm/intrinsifier_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_MIPS.
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/intrinsifier.h"
 
 #include "vm/assembler.h"
@@ skipping 53 matching lines @@
   // T1: potential next object start.
   // T2: allocation size.
   __ LoadImmediate(T4, heap->TopAddress());
   __ lw(T4, Address(T4, 0));
   __ BranchUnsignedGreaterEqual(T1, T4, &fall_through);
 
   // Successfully allocated the object(s), now update top to point to
   // next object start and initialize the object.
   __ sw(T1, Address(T3, 0));
   __ addiu(T0, T0, Immediate(kHeapObjectTag));
+  __ UpdateAllocationStatsWithSize(kArrayCid, T2, T4);
 
   // Initialize the tags.
   // T0: new object start as a tagged pointer.
   // T1: new object end address.
   // T2: allocation size.
   {
     Label overflow, done;
     const intptr_t shift = RawObject::kSizeTagBit - kObjectAlignmentLog2;
     const Class& cls = Class::Handle(isolate->object_store()->array_class());
 
@@ skipping 215 matching lines @@
       FieldAddress(V0, GrowableObjectArray::data_offset()),
       T1);
 
   // V0: new growable array object start as a tagged pointer.
   // Store the type argument field in the growable array object.
   __ lw(T1, Address(SP, kTypeArgumentsOffset));  // Type argument.
   __ StoreIntoObjectNoBarrier(
       V0,
       FieldAddress(V0, GrowableObjectArray::type_arguments_offset()),
       T1);
-
+  __ UpdateAllocationStats(kGrowableObjectArrayCid, T1);
   // Set the length field in the growable array object to 0.
   __ Ret();  // Returns the newly allocated object in V0.
   __ delay_slot()->sw(ZR,
       FieldAddress(V0, GrowableObjectArray::length_offset()));
 
   __ Bind(&fall_through);
 }
 
 
 void Intrinsifier::GrowableList_getLength(Assembler* assembler) {
@@ skipping 171 matching lines @@
   /* T2: allocation size. */                                                   \
   __ LoadImmediate(T3, heap->EndAddress());                                    \
   __ lw(T3, Address(T3, 0));                                                   \
   __ BranchUnsignedGreaterEqual(T1, T3, &fall_through);                        \
                                                                                \
   /* Successfully allocated the object(s), now update top to point to */       \
   /* next object start and initialize the object. */                           \
   __ LoadImmediate(T3, heap->TopAddress());                                    \
   __ sw(T1, Address(T3, 0));                                                   \
   __ AddImmediate(V0, kHeapObjectTag);                                         \
-                                                                               \
+  __ UpdateAllocationStatsWithSize(cid, T2, T4);                               \
   /* Initialize the tags. */                                                   \
   /* V0: new object start as a tagged pointer. */                              \
   /* T1: new object end address. */                                            \
   /* T2: allocation size. */                                                   \
   {                                                                            \
     Label size_tag_overflow, done;                                             \
     __ BranchUnsignedGreater(T2, RawObject::SizeTag::kMaxSizeTag,              \
                              &size_tag_overflow);                              \
     __ b(&done);                                                               \
     __ delay_slot()->sll(T2, T2,                                               \
@@ skipping 335 matching lines @@
   __ subu(T4, ZR, T0);  // T4 <- -T0
   __ addiu(T4, T4, Immediate(32));  // T4 <- 32 - T0
   __ sllv(T3, T3, T4);  // T3 <- T3 << T4
   __ and_(T3, T3, T1);  // T3 <- T3 & T1
   __ srlv(T3, T3, T4);  // T3 <- T3 >> T4
   // Now T3 has the bits that fall off of T1 on a left shift.
   __ sllv(T0, T1, T0);  // T0 gets low bits.
 
   const Class& mint_class = Class::Handle(
       Isolate::Current()->object_store()->mint_class());
-  __ TryAllocate(mint_class, &fall_through, V0);
+  __ TryAllocate(mint_class, &fall_through, V0, T1);
 
   __ sw(T0, FieldAddress(V0, Mint::value_offset()));
   __ Ret();
   __ delay_slot()->sw(T3, FieldAddress(V0, Mint::value_offset() + kWordSize));
   __ Bind(&fall_through);
 }
 
 
 static void Get64SmiOrMint(Assembler* assembler,
                            Register res_hi,
@@ skipping 319 matching lines @@
   __ lwc1(F1, FieldAddress(T0, Double::value_offset() + kWordSize));
   switch (kind) {
     case Token::kADD: __ addd(D0, D0, D1); break;
     case Token::kSUB: __ subd(D0, D0, D1); break;
     case Token::kMUL: __ muld(D0, D0, D1); break;
     case Token::kDIV: __ divd(D0, D0, D1); break;
     default: UNREACHABLE();
   }
   const Class& double_class = Class::Handle(
       Isolate::Current()->object_store()->double_class());
-  __ TryAllocate(double_class, &fall_through, V0);  // Result register.
+  __ TryAllocate(double_class, &fall_through, V0, T1);  // Result register.
   __ swc1(F0, FieldAddress(V0, Double::value_offset()));
   __ Ret();
   __ delay_slot()->swc1(F1,
                         FieldAddress(V0, Double::value_offset() + kWordSize));
   __ Bind(&fall_through);
 }
 
 
 void Intrinsifier::Double_add(Assembler* assembler) {
   return DoubleArithmeticOperations(assembler, Token::kADD);
@@ skipping 27 matching lines @@
   __ SmiUntag(T0);
   __ mtc1(T0, F4);
   __ cvtdw(D1, F4);
 
   __ lw(T0, Address(SP, 1 * kWordSize));
   __ lwc1(F0, FieldAddress(T0, Double::value_offset()));
   __ lwc1(F1, FieldAddress(T0, Double::value_offset() + kWordSize));
   __ muld(D0, D0, D1);
   const Class& double_class = Class::Handle(
       Isolate::Current()->object_store()->double_class());
-  __ TryAllocate(double_class, &fall_through, V0);  // Result register.
+  __ TryAllocate(double_class, &fall_through, V0, T1);  // Result register.
   __ swc1(F0, FieldAddress(V0, Double::value_offset()));
   __ Ret();
   __ delay_slot()->swc1(F1,
                         FieldAddress(V0, Double::value_offset() + kWordSize));
   __ Bind(&fall_through);
 }
 
 
 void Intrinsifier::Double_fromInteger(Assembler* assembler) {
   Label fall_through;
 
   __ lw(T0, Address(SP, 0 * kWordSize));
   __ andi(CMPRES1, T0, Immediate(kSmiTagMask));
   __ bne(T0, ZR, &fall_through);
 
   // Is Smi.
   __ SmiUntag(T0);
   __ mtc1(T0, F4);
   __ cvtdw(D0, F4);
   const Class& double_class = Class::Handle(
       Isolate::Current()->object_store()->double_class());
-  __ TryAllocate(double_class, &fall_through, V0);  // Result register.
+  __ TryAllocate(double_class, &fall_through, V0, T1);  // Result register.
   __ swc1(F0, FieldAddress(V0, Double::value_offset()));
   __ Ret();
   __ delay_slot()->swc1(F1,
                         FieldAddress(V0, Double::value_offset() + kWordSize));
   __ Bind(&fall_through);
 }
 
 
 void Intrinsifier::Double_getIsNaN(Assembler* assembler) {
   Label is_true;
@@ skipping 65 matching lines @@
 
 void Intrinsifier::Math_sqrt(Assembler* assembler) {
   Label fall_through, is_smi, double_op;
   TestLastArgumentIsDouble(assembler, &is_smi, &fall_through);
   // Argument is double and is in T0.
   __ LoadDFromOffset(D1, T0, Double::value_offset() - kHeapObjectTag);
   __ Bind(&double_op);
   __ sqrtd(D0, D1);
   const Class& double_class = Class::Handle(
       Isolate::Current()->object_store()->double_class());
-  __ TryAllocate(double_class, &fall_through, V0);  // Result register.
+  __ TryAllocate(double_class, &fall_through, V0, T1);  // Result register.
   __ swc1(F0, FieldAddress(V0, Double::value_offset()));
   __ Ret();
   __ delay_slot()->swc1(F1,
                         FieldAddress(V0, Double::value_offset() + kWordSize));
 
   __ Bind(&is_smi);
   __ SmiUntag(T0);
   __ mtc1(T0, F2);
   __ b(&double_op);
   __ delay_slot()->cvtdw(D1, F2);
@@ skipping 228 matching lines @@
   // T3: heap->TopAddress().
   __ LoadImmediate(T4, heap->EndAddress());
   __ lw(T4, Address(T4, 0));
   __ BranchUnsignedGreaterEqual(T1, T4, failure);
 
   // Successfully allocated the object(s), now update top to point to
   // next object start and initialize the object.
   __ sw(T1, Address(T3, 0));
   __ AddImmediate(V0, kHeapObjectTag);
 
+  __ UpdateAllocationStatsWithSize(kOneByteStringCid, T2, T3);
+
   // Initialize the tags.
   // V0: new object start as a tagged pointer.
   // T1: new object end address.
   // T2: allocation size.
   {
     Label overflow, done;
     const intptr_t shift = RawObject::kSizeTagBit - kObjectAlignmentLog2;
     const Class& cls =
         Class::Handle(isolate->object_store()->one_byte_string_class());
 
@@ skipping 163 matching lines @@
 }
 
 
 void Intrinsifier::TwoByteString_equality(Assembler* assembler) {
   StringEquality(assembler, kTwoByteStringCid);
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS