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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_IA32. | 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_IA32. |
6 #if defined(TARGET_ARCH_IA32) | 6 #if defined(TARGET_ARCH_IA32) |
7 | 7 |
8 #include "vm/intermediate_language.h" | 8 #include "vm/intermediate_language.h" |
9 | 9 |
10 #include "vm/dart_entry.h" | 10 #include "vm/dart_entry.h" |
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1670 Register temp2 = locs()->temp(1).reg(); | 1670 Register temp2 = locs()->temp(1).reg(); |
1671 | 1671 |
1672 if (is_initialization_) { | 1672 if (is_initialization_) { |
1673 StoreInstanceFieldSlowPath* slow_path = | 1673 StoreInstanceFieldSlowPath* slow_path = |
1674 new StoreInstanceFieldSlowPath(this); | 1674 new StoreInstanceFieldSlowPath(this); |
1675 compiler->AddSlowPathCode(slow_path); | 1675 compiler->AddSlowPathCode(slow_path); |
1676 | 1676 |
1677 __ TryAllocate(compiler->double_class(), | 1677 __ TryAllocate(compiler->double_class(), |
1678 slow_path->entry_label(), | 1678 slow_path->entry_label(), |
1679 Assembler::kFarJump, | 1679 Assembler::kFarJump, |
1680 temp); | 1680 temp, |
| 1681 temp2); |
1681 __ Bind(slow_path->exit_label()); | 1682 __ Bind(slow_path->exit_label()); |
1682 __ movl(temp2, temp); | 1683 __ movl(temp2, temp); |
1683 __ StoreIntoObject(instance_reg, | 1684 __ StoreIntoObject(instance_reg, |
1684 FieldAddress(instance_reg, field().Offset()), | 1685 FieldAddress(instance_reg, field().Offset()), |
1685 temp2); | 1686 temp2); |
1686 } else { | 1687 } else { |
1687 __ movl(temp, FieldAddress(instance_reg, field().Offset())); | 1688 __ movl(temp, FieldAddress(instance_reg, field().Offset())); |
1688 } | 1689 } |
1689 __ movsd(FieldAddress(temp, Double::value_offset()), value); | 1690 __ movsd(FieldAddress(temp, Double::value_offset()), value); |
1690 return; | 1691 return; |
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1719 compiler->AddSlowPathCode(slow_path); | 1720 compiler->AddSlowPathCode(slow_path); |
1720 | 1721 |
1721 if (!compiler->is_optimizing()) { | 1722 if (!compiler->is_optimizing()) { |
1722 locs()->live_registers()->Add(locs()->in(0)); | 1723 locs()->live_registers()->Add(locs()->in(0)); |
1723 locs()->live_registers()->Add(locs()->in(1)); | 1724 locs()->live_registers()->Add(locs()->in(1)); |
1724 } | 1725 } |
1725 | 1726 |
1726 __ TryAllocate(compiler->double_class(), | 1727 __ TryAllocate(compiler->double_class(), |
1727 slow_path->entry_label(), | 1728 slow_path->entry_label(), |
1728 Assembler::kFarJump, | 1729 Assembler::kFarJump, |
1729 temp); | 1730 temp, |
| 1731 temp2); |
1730 __ Bind(slow_path->exit_label()); | 1732 __ Bind(slow_path->exit_label()); |
1731 __ movl(temp2, temp); | 1733 __ movl(temp2, temp); |
1732 __ StoreIntoObject(instance_reg, | 1734 __ StoreIntoObject(instance_reg, |
1733 FieldAddress(instance_reg, field().Offset()), | 1735 FieldAddress(instance_reg, field().Offset()), |
1734 temp2); | 1736 temp2); |
1735 | 1737 |
1736 __ Bind(©_payload); | 1738 __ Bind(©_payload); |
1737 __ movsd(fpu_temp, FieldAddress(value_reg, Double::value_offset())); | 1739 __ movsd(fpu_temp, FieldAddress(value_reg, Double::value_offset())); |
1738 __ movsd(FieldAddress(temp, Double::value_offset()), fpu_temp); | 1740 __ movsd(FieldAddress(temp, Double::value_offset()), fpu_temp); |
1739 __ jmp(&skip_store); | 1741 __ jmp(&skip_store); |
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1967 BoxDoubleSlowPath* slow_path = new BoxDoubleSlowPath(this); | 1969 BoxDoubleSlowPath* slow_path = new BoxDoubleSlowPath(this); |
1968 compiler->AddSlowPathCode(slow_path); | 1970 compiler->AddSlowPathCode(slow_path); |
1969 | 1971 |
1970 if (!compiler->is_optimizing()) { | 1972 if (!compiler->is_optimizing()) { |
1971 locs()->live_registers()->Add(locs()->in(0)); | 1973 locs()->live_registers()->Add(locs()->in(0)); |
1972 } | 1974 } |
1973 | 1975 |
1974 __ TryAllocate(compiler->double_class(), | 1976 __ TryAllocate(compiler->double_class(), |
1975 slow_path->entry_label(), | 1977 slow_path->entry_label(), |
1976 Assembler::kFarJump, | 1978 Assembler::kFarJump, |
1977 result); | 1979 result, |
| 1980 temp); |
1978 __ Bind(slow_path->exit_label()); | 1981 __ Bind(slow_path->exit_label()); |
1979 __ movl(temp, FieldAddress(instance_reg, offset_in_bytes())); | 1982 __ movl(temp, FieldAddress(instance_reg, offset_in_bytes())); |
1980 __ movsd(value, FieldAddress(temp, Double::value_offset())); | 1983 __ movsd(value, FieldAddress(temp, Double::value_offset())); |
1981 __ movsd(FieldAddress(result, Double::value_offset()), value); | 1984 __ movsd(FieldAddress(result, Double::value_offset()), value); |
1982 __ jmp(&done); | 1985 __ jmp(&done); |
1983 __ Bind(&load_pointer); | 1986 __ Bind(&load_pointer); |
1984 } | 1987 } |
1985 __ movl(result, FieldAddress(instance_reg, offset_in_bytes())); | 1988 __ movl(result, FieldAddress(instance_reg, offset_in_bytes())); |
1986 __ Bind(&done); | 1989 __ Bind(&done); |
1987 } | 1990 } |
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2850 void BoxDoubleInstr::EmitNativeCode(FlowGraphCompiler* compiler) { | 2853 void BoxDoubleInstr::EmitNativeCode(FlowGraphCompiler* compiler) { |
2851 BoxDoubleSlowPath* slow_path = new BoxDoubleSlowPath(this); | 2854 BoxDoubleSlowPath* slow_path = new BoxDoubleSlowPath(this); |
2852 compiler->AddSlowPathCode(slow_path); | 2855 compiler->AddSlowPathCode(slow_path); |
2853 | 2856 |
2854 Register out_reg = locs()->out().reg(); | 2857 Register out_reg = locs()->out().reg(); |
2855 XmmRegister value = locs()->in(0).fpu_reg(); | 2858 XmmRegister value = locs()->in(0).fpu_reg(); |
2856 | 2859 |
2857 __ TryAllocate(compiler->double_class(), | 2860 __ TryAllocate(compiler->double_class(), |
2858 slow_path->entry_label(), | 2861 slow_path->entry_label(), |
2859 Assembler::kFarJump, | 2862 Assembler::kFarJump, |
2860 out_reg); | 2863 out_reg, |
| 2864 kNoRegister); |
2861 __ Bind(slow_path->exit_label()); | 2865 __ Bind(slow_path->exit_label()); |
2862 __ movsd(FieldAddress(out_reg, Double::value_offset()), value); | 2866 __ movsd(FieldAddress(out_reg, Double::value_offset()), value); |
2863 } | 2867 } |
2864 | 2868 |
2865 | 2869 |
2866 LocationSummary* UnboxDoubleInstr::MakeLocationSummary(bool opt) const { | 2870 LocationSummary* UnboxDoubleInstr::MakeLocationSummary(bool opt) const { |
2867 const intptr_t kNumInputs = 1; | 2871 const intptr_t kNumInputs = 1; |
2868 const intptr_t value_cid = value()->Type()->ToCid(); | 2872 const intptr_t value_cid = value()->Type()->ToCid(); |
2869 const bool needs_temp = ((value_cid != kSmiCid) && (value_cid != kDoubleCid)); | 2873 const bool needs_temp = ((value_cid != kSmiCid) && (value_cid != kDoubleCid)); |
2870 const bool needs_writable_input = (value_cid == kSmiCid); | 2874 const bool needs_writable_input = (value_cid == kSmiCid); |
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2957 void BoxFloat32x4Instr::EmitNativeCode(FlowGraphCompiler* compiler) { | 2961 void BoxFloat32x4Instr::EmitNativeCode(FlowGraphCompiler* compiler) { |
2958 BoxFloat32x4SlowPath* slow_path = new BoxFloat32x4SlowPath(this); | 2962 BoxFloat32x4SlowPath* slow_path = new BoxFloat32x4SlowPath(this); |
2959 compiler->AddSlowPathCode(slow_path); | 2963 compiler->AddSlowPathCode(slow_path); |
2960 | 2964 |
2961 Register out_reg = locs()->out().reg(); | 2965 Register out_reg = locs()->out().reg(); |
2962 XmmRegister value = locs()->in(0).fpu_reg(); | 2966 XmmRegister value = locs()->in(0).fpu_reg(); |
2963 | 2967 |
2964 __ TryAllocate(compiler->float32x4_class(), | 2968 __ TryAllocate(compiler->float32x4_class(), |
2965 slow_path->entry_label(), | 2969 slow_path->entry_label(), |
2966 Assembler::kFarJump, | 2970 Assembler::kFarJump, |
2967 out_reg); | 2971 out_reg, |
| 2972 kNoRegister); |
2968 __ Bind(slow_path->exit_label()); | 2973 __ Bind(slow_path->exit_label()); |
2969 __ movups(FieldAddress(out_reg, Float32x4::value_offset()), value); | 2974 __ movups(FieldAddress(out_reg, Float32x4::value_offset()), value); |
2970 } | 2975 } |
2971 | 2976 |
2972 | 2977 |
2973 LocationSummary* UnboxFloat32x4Instr::MakeLocationSummary(bool opt) const { | 2978 LocationSummary* UnboxFloat32x4Instr::MakeLocationSummary(bool opt) const { |
2974 const intptr_t value_cid = value()->Type()->ToCid(); | 2979 const intptr_t value_cid = value()->Type()->ToCid(); |
2975 const intptr_t kNumInputs = 1; | 2980 const intptr_t kNumInputs = 1; |
2976 const intptr_t kNumTemps = value_cid == kFloat32x4Cid ? 0 : 1; | 2981 const intptr_t kNumTemps = value_cid == kFloat32x4Cid ? 0 : 1; |
2977 LocationSummary* summary = | 2982 LocationSummary* summary = |
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3051 void BoxInt32x4Instr::EmitNativeCode(FlowGraphCompiler* compiler) { | 3056 void BoxInt32x4Instr::EmitNativeCode(FlowGraphCompiler* compiler) { |
3052 BoxInt32x4SlowPath* slow_path = new BoxInt32x4SlowPath(this); | 3057 BoxInt32x4SlowPath* slow_path = new BoxInt32x4SlowPath(this); |
3053 compiler->AddSlowPathCode(slow_path); | 3058 compiler->AddSlowPathCode(slow_path); |
3054 | 3059 |
3055 Register out_reg = locs()->out().reg(); | 3060 Register out_reg = locs()->out().reg(); |
3056 XmmRegister value = locs()->in(0).fpu_reg(); | 3061 XmmRegister value = locs()->in(0).fpu_reg(); |
3057 | 3062 |
3058 __ TryAllocate(compiler->int32x4_class(), | 3063 __ TryAllocate(compiler->int32x4_class(), |
3059 slow_path->entry_label(), | 3064 slow_path->entry_label(), |
3060 Assembler::kFarJump, | 3065 Assembler::kFarJump, |
3061 out_reg); | 3066 out_reg, |
| 3067 kNoRegister); |
3062 __ Bind(slow_path->exit_label()); | 3068 __ Bind(slow_path->exit_label()); |
3063 __ movups(FieldAddress(out_reg, Int32x4::value_offset()), value); | 3069 __ movups(FieldAddress(out_reg, Int32x4::value_offset()), value); |
3064 } | 3070 } |
3065 | 3071 |
3066 | 3072 |
3067 LocationSummary* UnboxInt32x4Instr::MakeLocationSummary(bool opt) const { | 3073 LocationSummary* UnboxInt32x4Instr::MakeLocationSummary(bool opt) const { |
3068 const intptr_t value_cid = value()->Type()->ToCid(); | 3074 const intptr_t value_cid = value()->Type()->ToCid(); |
3069 const intptr_t kNumInputs = 1; | 3075 const intptr_t kNumInputs = 1; |
3070 const intptr_t kNumTemps = value_cid == kInt32x4Cid ? 0 : 1; | 3076 const intptr_t kNumTemps = value_cid == kInt32x4Cid ? 0 : 1; |
3071 LocationSummary* summary = | 3077 LocationSummary* summary = |
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4675 | 4681 |
4676 __ SmiTag(EAX); | 4682 __ SmiTag(EAX); |
4677 __ movl(out_reg, EAX); | 4683 __ movl(out_reg, EAX); |
4678 __ jmp(&done); | 4684 __ jmp(&done); |
4679 | 4685 |
4680 __ Bind(¬_smi); | 4686 __ Bind(¬_smi); |
4681 __ TryAllocate( | 4687 __ TryAllocate( |
4682 Class::ZoneHandle(Isolate::Current()->object_store()->mint_class()), | 4688 Class::ZoneHandle(Isolate::Current()->object_store()->mint_class()), |
4683 slow_path->entry_label(), | 4689 slow_path->entry_label(), |
4684 Assembler::kFarJump, | 4690 Assembler::kFarJump, |
4685 out_reg); | 4691 out_reg, |
| 4692 kNoRegister); |
4686 __ Bind(slow_path->exit_label()); | 4693 __ Bind(slow_path->exit_label()); |
4687 __ movsd(FieldAddress(out_reg, Mint::value_offset()), value); | 4694 __ movsd(FieldAddress(out_reg, Mint::value_offset()), value); |
4688 __ Bind(&done); | 4695 __ Bind(&done); |
4689 } | 4696 } |
4690 | 4697 |
4691 | 4698 |
4692 LocationSummary* BinaryMintOpInstr::MakeLocationSummary(bool opt) const { | 4699 LocationSummary* BinaryMintOpInstr::MakeLocationSummary(bool opt) const { |
4693 const intptr_t kNumInputs = 2; | 4700 const intptr_t kNumInputs = 2; |
4694 switch (op_kind()) { | 4701 switch (op_kind()) { |
4695 case Token::kBIT_AND: | 4702 case Token::kBIT_AND: |
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5234 PcDescriptors::kOther, | 5241 PcDescriptors::kOther, |
5235 locs()); | 5242 locs()); |
5236 __ Drop(2); // Discard type arguments and receiver. | 5243 __ Drop(2); // Discard type arguments and receiver. |
5237 } | 5244 } |
5238 | 5245 |
5239 } // namespace dart | 5246 } // namespace dart |
5240 | 5247 |
5241 #undef __ | 5248 #undef __ |
5242 | 5249 |
5243 #endif // defined TARGET_ARCH_IA32 | 5250 #endif // defined TARGET_ARCH_IA32 |
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