Generate some intrinsics using our IR.

runtime/vm/intermediate_language_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_MIPS.
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/intermediate_language.h"
 
 #include "vm/dart_entry.h"
@@ skipping 70 matching lines @@
 }
 
 
 // Attempt optimized compilation at return instruction instead of at the entry.
 // The entry needs to be patchable, no inlined objects are allowed in the area
 // that will be overwritten by the patch instructions: a branch macro sequence.
 void ReturnInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
   __ TraceSimMsg("ReturnInstr");
   Register result = locs()->in(0).reg();
   ASSERT(result == V0);
+
+  if (is_intrinsic_) {
+    // Intrinsics don't have a frame.
+    __ Ret();
+    return;
+  }
+
+
 #if defined(DEBUG)
   Label stack_ok;
   __ Comment("Stack Check");
   __ TraceSimMsg("Stack Check");
   const intptr_t fp_sp_dist =
       (kFirstLocalSlotFromFp + 1 - compiler->StackSize()) * kWordSize;
   ASSERT(fp_sp_dist <= 0);
   __ subu(CMPRES1, SP, FP);
 
   __ BranchEqual(CMPRES1, fp_sp_dist, &stack_ok);
@@ skipping 4710 matching lines @@
   compiler->GenerateCall(token_pos(), &label, stub_kind_, locs());
 #if defined(DEBUG)
   __ LoadImmediate(S4, kInvalidObjectPointer);
   __ LoadImmediate(S5, kInvalidObjectPointer);
 #endif
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS