Generate some intrinsics using our IR.

runtime/vm/flow_graph_compiler_arm64.cc

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_ARM64.
 #if defined(TARGET_ARCH_ARM64)
 
 #include "vm/flow_graph_compiler.h"
 
 #include "vm/ast_printer.h"
@@ skipping 39 matching lines @@
 bool FlowGraphCompiler::SupportsUnboxedSimd128() {
   return FLAG_enable_simd_inline;
 }
 
 
 bool FlowGraphCompiler::SupportsSinCos() {
   return false;
 }
 
 
+void FlowGraphCompiler::EnterIntrinsicMode() {
+  ASSERT(!intrinsic_mode());
+  intrinsic_mode_ = true;
+  assembler()->set_allow_constant_pool(false);
+}
+
+
+void FlowGraphCompiler::ExitIntrinsicMode() {
+  ASSERT(intrinsic_mode());
+  intrinsic_mode_ = false;
+  assembler()->set_allow_constant_pool(true);
+}
+
+
 RawDeoptInfo* CompilerDeoptInfo::CreateDeoptInfo(FlowGraphCompiler* compiler,
                                                  DeoptInfoBuilder* builder,
                                                  const Array& deopt_table) {
   if (deopt_env_ == NULL) {
     return DeoptInfo::null();
   }
 
   intptr_t stack_height = compiler->StackSize();
   AllocateIncomingParametersRecursive(deopt_env_, &stack_height);
 
@@ skipping 1445 matching lines @@
   MoveOperands* move = moves_[index];
   const Location source = move->src();
   const Location destination = move->dest();
 
   if (source.IsRegister()) {
     if (destination.IsRegister()) {
       __ mov(destination.reg(), source.reg());
     } else {
       ASSERT(destination.IsStackSlot());
       const intptr_t dest_offset = destination.ToStackSlotOffset();
-      __ StoreToOffset(source.reg(), FP, dest_offset, PP);
+      __ StoreToOffset(source.reg(), destination.base_reg(), dest_offset, PP);
     }
   } else if (source.IsStackSlot()) {
     if (destination.IsRegister()) {
       const intptr_t source_offset = source.ToStackSlotOffset();
-      __ LoadFromOffset(destination.reg(), FP, source_offset, PP);
+      __ LoadFromOffset(
+          destination.reg(), source.base_reg(), source_offset, PP);
     } else {
       ASSERT(destination.IsStackSlot());
       const intptr_t source_offset = source.ToStackSlotOffset();
       const intptr_t dest_offset = destination.ToStackSlotOffset();
-      __ LoadFromOffset(TMP, FP, source_offset, PP);
-      __ StoreToOffset(TMP, FP, dest_offset, PP);
+      ScratchRegisterScope tmp(this, kNoRegister);
+      __ LoadFromOffset(tmp.reg(), source.base_reg(), source_offset, PP);
+      __ StoreToOffset(tmp.reg(), destination.base_reg(), dest_offset, PP);
     }
   } else if (source.IsFpuRegister()) {
     if (destination.IsFpuRegister()) {
       __ vmov(destination.fpu_reg(), source.fpu_reg());
     } else {
       if (destination.IsDoubleStackSlot()) {
         const intptr_t dest_offset = destination.ToStackSlotOffset();
         VRegister src = source.fpu_reg();
-        __ StoreDToOffset(src, FP, dest_offset, PP);
+        __ StoreDToOffset(src, destination.base_reg(), dest_offset, PP);
       } else {
         ASSERT(destination.IsQuadStackSlot());
         const intptr_t dest_offset = destination.ToStackSlotOffset();
-        __ StoreQToOffset(source.fpu_reg(), FP, dest_offset, PP);
+        __ StoreQToOffset(
+            source.fpu_reg(), destination.base_reg(), dest_offset, PP);
       }
     }
   } else if (source.IsDoubleStackSlot()) {
     if (destination.IsFpuRegister()) {
-      const intptr_t dest_offset = source.ToStackSlotOffset();
+      const intptr_t source_offset = source.ToStackSlotOffset();
       const VRegister dst = destination.fpu_reg();
-      __ LoadDFromOffset(dst, FP, dest_offset, PP);
+      __ LoadDFromOffset(dst, source.base_reg(), source_offset, PP);
     } else {
       ASSERT(destination.IsDoubleStackSlot());
       const intptr_t source_offset = source.ToStackSlotOffset();
       const intptr_t dest_offset = destination.ToStackSlotOffset();
-      __ LoadDFromOffset(VTMP, FP, source_offset, PP);
-      __ StoreDToOffset(VTMP, FP, dest_offset, PP);
+      __ LoadDFromOffset(VTMP, source.base_reg(), source_offset, PP);
+      __ StoreDToOffset(VTMP, destination.base_reg(), dest_offset, PP);
     }
   } else if (source.IsQuadStackSlot()) {
     if (destination.IsFpuRegister()) {
-      const intptr_t dest_offset = source.ToStackSlotOffset();
-      __ LoadQFromOffset(destination.fpu_reg(), FP, dest_offset, PP);
+      const intptr_t source_offset = source.ToStackSlotOffset();
+      __ LoadQFromOffset(
+          destination.fpu_reg(), source.base_reg(), source_offset, PP);
     } else {
       ASSERT(destination.IsQuadStackSlot());
       const intptr_t source_offset = source.ToStackSlotOffset();
       const intptr_t dest_offset = destination.ToStackSlotOffset();
-      __ LoadQFromOffset(VTMP, FP, source_offset, PP);
-      __ StoreQToOffset(VTMP, FP, dest_offset, PP);
+      __ LoadQFromOffset(VTMP, source.base_reg(), source_offset, PP);
+      __ StoreQToOffset(VTMP, destination.base_reg(), dest_offset, PP);
     }
   } else {
     ASSERT(source.IsConstant());
     const Object& constant = source.constant();
     if (destination.IsRegister()) {
       __ LoadObject(destination.reg(), constant, PP);
     } else if (destination.IsFpuRegister()) {
       const VRegister dst = destination.fpu_reg();
       if (Utils::DoublesBitEqual(Double::Cast(constant).value(), 0.0)) {
         __ veor(dst, dst, dst);
       } else {
-        __ LoadObject(TMP, constant, PP);
-        __ LoadDFieldFromOffset(dst, TMP, Double::value_offset(), PP);
+        ScratchRegisterScope tmp(this, kNoRegister);
+        __ LoadObject(tmp.reg(), constant, PP);
+        __ LoadDFieldFromOffset(dst, tmp.reg(), Double::value_offset(), PP);
       }
     } else if (destination.IsDoubleStackSlot()) {
       if (Utils::DoublesBitEqual(Double::Cast(constant).value(), 0.0)) {
         __ veor(VTMP, VTMP, VTMP);
       } else {
-        __ LoadObject(TMP, constant, PP);
-        __ LoadDFieldFromOffset(VTMP, TMP, Double::value_offset(), PP);
+        ScratchRegisterScope tmp(this, kNoRegister);
+        __ LoadObject(tmp.reg(), constant, PP);
+        __ LoadDFieldFromOffset(VTMP, tmp.reg(), Double::value_offset(), PP);
       }
       const intptr_t dest_offset = destination.ToStackSlotOffset();
-      __ StoreDToOffset(VTMP, FP, dest_offset, PP);
+      __ StoreDToOffset(VTMP, destination.base_reg(), dest_offset, PP);
     } else {
       ASSERT(destination.IsStackSlot());
       const intptr_t dest_offset = destination.ToStackSlotOffset();
-      __ LoadObject(TMP, constant, PP);
-      __ StoreToOffset(TMP, FP, dest_offset, PP);
+      ScratchRegisterScope tmp(this, kNoRegister);
+      __ LoadObject(tmp.reg(), constant, PP);
+      __ StoreToOffset(tmp.reg(), destination.base_reg(), dest_offset, PP);
     }
   }
 
   move->Eliminate();
 }
 
 
 void ParallelMoveResolver::EmitSwap(int index) {
   MoveOperands* move = moves_[index];
   const Location source = move->src();
   const Location destination = move->dest();
 
   if (source.IsRegister() && destination.IsRegister()) {
     ASSERT(source.reg() != TMP);
     ASSERT(destination.reg() != TMP);
     __ mov(TMP, source.reg());
     __ mov(source.reg(), destination.reg());
     __ mov(destination.reg(), TMP);
   } else if (source.IsRegister() && destination.IsStackSlot()) {
-    Exchange(source.reg(), destination.ToStackSlotOffset());
+    Exchange(source.reg(),
+             destination.base_reg(), destination.ToStackSlotOffset());
   } else if (source.IsStackSlot() && destination.IsRegister()) {
-    Exchange(destination.reg(), source.ToStackSlotOffset());
+    Exchange(destination.reg(),
+             source.base_reg(), source.ToStackSlotOffset());
   } else if (source.IsStackSlot() && destination.IsStackSlot()) {
-    Exchange(source.ToStackSlotOffset(), destination.ToStackSlotOffset());
+    Exchange(source.base_reg(), source.ToStackSlotOffset(),
+             destination.base_reg(), destination.ToStackSlotOffset());
   } else if (source.IsFpuRegister() && destination.IsFpuRegister()) {
     const VRegister dst = destination.fpu_reg();
     const VRegister src = source.fpu_reg();
     __ fmovdd(VTMP, src);
     __ fmovdd(src, dst);
     __ fmovdd(dst, VTMP);
   } else if (source.IsFpuRegister() || destination.IsFpuRegister()) {
     ASSERT(destination.IsDoubleStackSlot() ||
            destination.IsQuadStackSlot() ||
            source.IsDoubleStackSlot() ||
@@ skipping 42 matching lines @@
       moves_[i]->set_src(destination);
     } else if (other_move.Blocks(destination)) {
       moves_[i]->set_src(source);
     }
   }
 }
 
 
 void ParallelMoveResolver::MoveMemoryToMemory(const Address& dst,
                                               const Address& src) {
-  UNIMPLEMENTED();
+  UNREACHABLE();
 }
 
 
 void ParallelMoveResolver::StoreObject(const Address& dst, const Object& obj) {
-  UNIMPLEMENTED();
+  UNREACHABLE();
 }
 
 
 // Do not call or implement this function. Instead, use the form below that
 // uses an offset from the frame pointer instead of an Address.
 void ParallelMoveResolver::Exchange(Register reg, const Address& mem) {
   UNREACHABLE();
 }
 
 
 // Do not call or implement this function. Instead, use the form below that
 // uses offsets from the frame pointer instead of Addresses.
 void ParallelMoveResolver::Exchange(const Address& mem1, const Address& mem2) {
   UNREACHABLE();
 }
 
 
-void ParallelMoveResolver::Exchange(Register reg, intptr_t stack_offset) {
-  UNIMPLEMENTED();
+void ParallelMoveResolver::Exchange(Register reg,
+                                    Register base_reg,
+                                    intptr_t stack_offset) {
+  ScratchRegisterScope tmp(this, kNoRegister);
+  __ mov(tmp.reg(), reg);
+  __ LoadFromOffset(reg, base_reg, stack_offset, PP);
+  __ StoreToOffset(tmp.reg(), base_reg, stack_offset, PP);
 }
 
 
-void ParallelMoveResolver::Exchange(intptr_t stack_offset1,
+void ParallelMoveResolver::Exchange(Register base_reg1,
+                                    intptr_t stack_offset1,
+                                    Register base_reg2,
                                     intptr_t stack_offset2) {
-  UNIMPLEMENTED();
+  ScratchRegisterScope tmp1(this, kNoRegister);
+  ScratchRegisterScope tmp2(this, tmp1.reg());
+  __ LoadFromOffset(tmp1.reg(), base_reg1, stack_offset1, PP);
+  __ LoadFromOffset(tmp2.reg(), base_reg2, stack_offset2, PP);
+  __ StoreToOffset(tmp1.reg(), base_reg2, stack_offset2, PP);
+  __ StoreToOffset(tmp2.reg(), base_reg1, stack_offset1, PP);
 }
 
 
 void ParallelMoveResolver::SpillScratch(Register reg) {
-  UNIMPLEMENTED();
+  __ Push(reg);
 }
 
 
 void ParallelMoveResolver::RestoreScratch(Register reg) {
-  UNIMPLEMENTED();
+  __ Pop(reg);
 }
 
 
 void ParallelMoveResolver::SpillFpuScratch(FpuRegister reg) {
-  UNIMPLEMENTED();
+  __ PushDouble(reg);
 }
 
 
 void ParallelMoveResolver::RestoreFpuScratch(FpuRegister reg) {
-  UNIMPLEMENTED();
+  __ PopDouble(reg);
 }
 
 
 #undef __
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM64