OLD | NEW |
1 ; This tries to be a comprehensive test of i64 operations, in | 1 ; This tries to be a comprehensive test of i64 operations, in |
2 ; particular the patterns for lowering i64 operations into constituent | 2 ; particular the patterns for lowering i64 operations into constituent |
3 ; i32 operations on x86-32. | 3 ; i32 operations on x86-32. |
4 | 4 |
5 ; RUN: %llvm2ice -O2 --verbose none %s | FileCheck %s | 5 ; RUN: %llvm2ice -O2 --verbose none %s | FileCheck %s |
6 ; RUN: %llvm2ice -Om1 --verbose none %s | FileCheck --check-prefix=OPTM1 %s | 6 ; RUN: %llvm2ice -Om1 --verbose none %s | FileCheck --check-prefix=OPTM1 %s |
7 ; RUN: %llvm2ice -O2 --verbose none %s \ | 7 ; RUN: %llvm2ice -O2 --verbose none %s \ |
8 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj | 8 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj |
9 ; RUN: %llvm2ice -Om1 --verbose none %s \ | 9 ; RUN: %llvm2ice -Om1 --verbose none %s \ |
10 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj | 10 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj |
(...skipping 14 matching lines...) Expand all Loading... |
25 | 25 |
26 define internal i32 @pass64BitArg(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f
) { | 26 define internal i32 @pass64BitArg(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f
) { |
27 entry: | 27 entry: |
28 %call = call i32 @ignore64BitArgNoInline(i64 %a, i32 123, i64 %b) | 28 %call = call i32 @ignore64BitArgNoInline(i64 %a, i32 123, i64 %b) |
29 %call1 = call i32 @ignore64BitArgNoInline(i64 %c, i32 123, i64 %d) | 29 %call1 = call i32 @ignore64BitArgNoInline(i64 %c, i32 123, i64 %d) |
30 %call2 = call i32 @ignore64BitArgNoInline(i64 %e, i32 123, i64 %f) | 30 %call2 = call i32 @ignore64BitArgNoInline(i64 %e, i32 123, i64 %f) |
31 %add = add i32 %call1, %call | 31 %add = add i32 %call1, %call |
32 %add3 = add i32 %add, %call2 | 32 %add3 = add i32 %add, %call2 |
33 ret i32 %add3 | 33 ret i32 %add3 |
34 } | 34 } |
35 ; CHECK: pass64BitArg: | 35 ; CHECK-LABEL: pass64BitArg |
36 ; CHECK: sub esp | 36 ; CHECK: sub esp |
37 ; CHECK: mov dword ptr [esp+4] | 37 ; CHECK: mov dword ptr [esp+4] |
38 ; CHECK: mov dword ptr [esp] | 38 ; CHECK: mov dword ptr [esp] |
39 ; CHECK: mov dword ptr [esp+8], 123 | 39 ; CHECK: mov dword ptr [esp+8], 123 |
40 ; CHECK: mov dword ptr [esp+16] | 40 ; CHECK: mov dword ptr [esp+16] |
41 ; CHECK: mov dword ptr [esp+12] | 41 ; CHECK: mov dword ptr [esp+12] |
42 ; CHECK: call ignore64BitArgNoInline | 42 ; CHECK: call ignore64BitArgNoInline |
43 ; CHECK sub esp | 43 ; CHECK sub esp |
44 ; CHECK: mov dword ptr [esp+4] | 44 ; CHECK: mov dword ptr [esp+4] |
45 ; CHECK: mov dword ptr [esp] | 45 ; CHECK: mov dword ptr [esp] |
46 ; CHECK: mov dword ptr [esp+8], 123 | 46 ; CHECK: mov dword ptr [esp+8], 123 |
47 ; CHECK: mov dword ptr [esp+16] | 47 ; CHECK: mov dword ptr [esp+16] |
48 ; CHECK: mov dword ptr [esp+12] | 48 ; CHECK: mov dword ptr [esp+12] |
49 ; CHECK: call ignore64BitArgNoInline | 49 ; CHECK: call ignore64BitArgNoInline |
50 ; CHECK: sub esp | 50 ; CHECK: sub esp |
51 ; CHECK: mov dword ptr [esp+4] | 51 ; CHECK: mov dword ptr [esp+4] |
52 ; CHECK: mov dword ptr [esp] | 52 ; CHECK: mov dword ptr [esp] |
53 ; CHECK: mov dword ptr [esp+8], 123 | 53 ; CHECK: mov dword ptr [esp+8], 123 |
54 ; CHECK: mov dword ptr [esp+16] | 54 ; CHECK: mov dword ptr [esp+16] |
55 ; CHECK: mov dword ptr [esp+12] | 55 ; CHECK: mov dword ptr [esp+12] |
56 ; CHECK: call ignore64BitArgNoInline | 56 ; CHECK: call ignore64BitArgNoInline |
57 ; | 57 ; |
58 ; OPTM1: pass64BitArg: | 58 ; OPTM1-LABEL: pass64BitArg |
59 ; OPTM1: sub esp | 59 ; OPTM1: sub esp |
60 ; OPTM1: mov dword ptr [esp+4] | 60 ; OPTM1: mov dword ptr [esp+4] |
61 ; OPTM1: mov dword ptr [esp] | 61 ; OPTM1: mov dword ptr [esp] |
62 ; OPTM1: mov dword ptr [esp+8], 123 | 62 ; OPTM1: mov dword ptr [esp+8], 123 |
63 ; OPTM1: mov dword ptr [esp+16] | 63 ; OPTM1: mov dword ptr [esp+16] |
64 ; OPTM1: mov dword ptr [esp+12] | 64 ; OPTM1: mov dword ptr [esp+12] |
65 ; OPTM1: call ignore64BitArgNoInline | 65 ; OPTM1: call ignore64BitArgNoInline |
66 ; OPTM1 sub esp | 66 ; OPTM1 sub esp |
67 ; OPTM1: mov dword ptr [esp+4] | 67 ; OPTM1: mov dword ptr [esp+4] |
68 ; OPTM1: mov dword ptr [esp] | 68 ; OPTM1: mov dword ptr [esp] |
69 ; OPTM1: mov dword ptr [esp+8], 123 | 69 ; OPTM1: mov dword ptr [esp+8], 123 |
70 ; OPTM1: mov dword ptr [esp+16] | 70 ; OPTM1: mov dword ptr [esp+16] |
71 ; OPTM1: mov dword ptr [esp+12] | 71 ; OPTM1: mov dword ptr [esp+12] |
72 ; OPTM1: call ignore64BitArgNoInline | 72 ; OPTM1: call ignore64BitArgNoInline |
73 ; OPTM1: sub esp | 73 ; OPTM1: sub esp |
74 ; OPTM1: mov dword ptr [esp+4] | 74 ; OPTM1: mov dword ptr [esp+4] |
75 ; OPTM1: mov dword ptr [esp] | 75 ; OPTM1: mov dword ptr [esp] |
76 ; OPTM1: mov dword ptr [esp+8], 123 | 76 ; OPTM1: mov dword ptr [esp+8], 123 |
77 ; OPTM1: mov dword ptr [esp+16] | 77 ; OPTM1: mov dword ptr [esp+16] |
78 ; OPTM1: mov dword ptr [esp+12] | 78 ; OPTM1: mov dword ptr [esp+12] |
79 ; OPTM1: call ignore64BitArgNoInline | 79 ; OPTM1: call ignore64BitArgNoInline |
80 | 80 |
81 declare i32 @ignore64BitArgNoInline(i64, i32, i64) | 81 declare i32 @ignore64BitArgNoInline(i64, i32, i64) |
82 | 82 |
83 define internal i32 @pass64BitConstArg(i64 %a, i64 %b) { | 83 define internal i32 @pass64BitConstArg(i64 %a, i64 %b) { |
84 entry: | 84 entry: |
85 %call = call i32 @ignore64BitArgNoInline(i64 %a, i32 123, i64 -240105309230672
5256) | 85 %call = call i32 @ignore64BitArgNoInline(i64 %a, i32 123, i64 -240105309230672
5256) |
86 ret i32 %call | 86 ret i32 %call |
87 } | 87 } |
88 ; CHECK: pass64BitConstArg: | 88 ; CHECK-LABEL: pass64BitConstArg |
89 ; CHECK: sub esp | 89 ; CHECK: sub esp |
90 ; CHECK: mov dword ptr [esp+4] | 90 ; CHECK: mov dword ptr [esp+4] |
91 ; CHECK-NEXT: mov dword ptr [esp] | 91 ; CHECK-NEXT: mov dword ptr [esp] |
92 ; CHECK-NEXT: mov dword ptr [esp+8], 123 | 92 ; CHECK-NEXT: mov dword ptr [esp+8], 123 |
93 ; CHECK-NEXT: mov dword ptr [esp+16], 3735928559 | 93 ; CHECK-NEXT: mov dword ptr [esp+16], 3735928559 |
94 ; CHECK-NEXT: mov dword ptr [esp+12], 305419896 | 94 ; CHECK-NEXT: mov dword ptr [esp+12], 305419896 |
95 ; CHECK-NEXT: call ignore64BitArgNoInline | 95 ; CHECK-NEXT: call ignore64BitArgNoInline |
96 ; | 96 ; |
97 ; OPTM1: pass64BitConstArg: | 97 ; OPTM1-LABEL: pass64BitConstArg |
98 ; OPTM1: sub esp | 98 ; OPTM1: sub esp |
99 ; OPTM1: mov dword ptr [esp+4] | 99 ; OPTM1: mov dword ptr [esp+4] |
100 ; OPTM1-NEXT: mov dword ptr [esp] | 100 ; OPTM1-NEXT: mov dword ptr [esp] |
101 ; OPTM1-NEXT: mov dword ptr [esp+8], 123 | 101 ; OPTM1-NEXT: mov dword ptr [esp+8], 123 |
102 ; OPTM1-NEXT: mov dword ptr [esp+16], 3735928559 | 102 ; OPTM1-NEXT: mov dword ptr [esp+16], 3735928559 |
103 ; OPTM1-NEXT: mov dword ptr [esp+12], 305419896 | 103 ; OPTM1-NEXT: mov dword ptr [esp+12], 305419896 |
104 ; OPTM1-NEXT: call ignore64BitArgNoInline | 104 ; OPTM1-NEXT: call ignore64BitArgNoInline |
105 | 105 |
106 define internal i64 @return64BitArg(i64 %a) { | 106 define internal i64 @return64BitArg(i64 %a) { |
107 entry: | 107 entry: |
108 ret i64 %a | 108 ret i64 %a |
109 } | 109 } |
110 ; CHECK: return64BitArg: | 110 ; CHECK-LABEL: return64BitArg |
111 ; CHECK: mov {{.*}}, dword ptr [esp+4] | 111 ; CHECK: mov {{.*}}, dword ptr [esp+4] |
112 ; CHECK: mov {{.*}}, dword ptr [esp+8] | 112 ; CHECK: mov {{.*}}, dword ptr [esp+8] |
113 ; CHECK: ret | 113 ; CHECK: ret |
114 ; | 114 ; |
115 ; OPTM1: return64BitArg: | 115 ; OPTM1-LABEL: return64BitArg |
116 ; OPTM1: mov {{.*}}, dword ptr [esp+4] | 116 ; OPTM1: mov {{.*}}, dword ptr [esp+4] |
117 ; OPTM1: mov {{.*}}, dword ptr [esp+8] | 117 ; OPTM1: mov {{.*}}, dword ptr [esp+8] |
118 ; OPTM1: ret | 118 ; OPTM1: ret |
119 | 119 |
120 define internal i64 @return64BitConst() { | 120 define internal i64 @return64BitConst() { |
121 entry: | 121 entry: |
122 ret i64 -2401053092306725256 | 122 ret i64 -2401053092306725256 |
123 } | 123 } |
124 ; CHECK: return64BitConst: | 124 ; CHECK-LABEL: return64BitConst |
125 ; CHECK: mov eax, 305419896 | 125 ; CHECK: mov eax, 305419896 |
126 ; CHECK: mov edx, 3735928559 | 126 ; CHECK: mov edx, 3735928559 |
127 ; CHECK: ret | 127 ; CHECK: ret |
128 ; | 128 ; |
129 ; OPTM1: return64BitConst: | 129 ; OPTM1-LABEL: return64BitConst |
130 ; OPTM1: mov eax, 305419896 | 130 ; OPTM1: mov eax, 305419896 |
131 ; OPTM1: mov edx, 3735928559 | 131 ; OPTM1: mov edx, 3735928559 |
132 ; OPTM1: ret | 132 ; OPTM1: ret |
133 | 133 |
134 define internal i64 @add64BitSigned(i64 %a, i64 %b) { | 134 define internal i64 @add64BitSigned(i64 %a, i64 %b) { |
135 entry: | 135 entry: |
136 %add = add i64 %b, %a | 136 %add = add i64 %b, %a |
137 ret i64 %add | 137 ret i64 %add |
138 } | 138 } |
139 ; CHECK: add64BitSigned: | 139 ; CHECK-LABEL: add64BitSigned |
140 ; CHECK: add | 140 ; CHECK: add |
141 ; CHECK: adc | 141 ; CHECK: adc |
142 ; CHECK: ret | 142 ; CHECK: ret |
143 ; | 143 ; |
144 ; OPTM1: add64BitSigned: | 144 ; OPTM1-LABEL: add64BitSigned |
145 ; OPTM1: add | 145 ; OPTM1: add |
146 ; OPTM1: adc | 146 ; OPTM1: adc |
147 ; OPTM1: ret | 147 ; OPTM1: ret |
148 | 148 |
149 define internal i64 @add64BitUnsigned(i64 %a, i64 %b) { | 149 define internal i64 @add64BitUnsigned(i64 %a, i64 %b) { |
150 entry: | 150 entry: |
151 %add = add i64 %b, %a | 151 %add = add i64 %b, %a |
152 ret i64 %add | 152 ret i64 %add |
153 } | 153 } |
154 ; CHECK: add64BitUnsigned: | 154 ; CHECK-LABEL: add64BitUnsigned |
155 ; CHECK: add | 155 ; CHECK: add |
156 ; CHECK: adc | 156 ; CHECK: adc |
157 ; CHECK: ret | 157 ; CHECK: ret |
158 ; | 158 ; |
159 ; OPTM1: add64BitUnsigned: | 159 ; OPTM1-LABEL: add64BitUnsigned |
160 ; OPTM1: add | 160 ; OPTM1: add |
161 ; OPTM1: adc | 161 ; OPTM1: adc |
162 ; OPTM1: ret | 162 ; OPTM1: ret |
163 | 163 |
164 define internal i64 @sub64BitSigned(i64 %a, i64 %b) { | 164 define internal i64 @sub64BitSigned(i64 %a, i64 %b) { |
165 entry: | 165 entry: |
166 %sub = sub i64 %a, %b | 166 %sub = sub i64 %a, %b |
167 ret i64 %sub | 167 ret i64 %sub |
168 } | 168 } |
169 ; CHECK: sub64BitSigned: | 169 ; CHECK-LABEL: sub64BitSigned |
170 ; CHECK: sub | 170 ; CHECK: sub |
171 ; CHECK: sbb | 171 ; CHECK: sbb |
172 ; CHECK: ret | 172 ; CHECK: ret |
173 ; | 173 ; |
174 ; OPTM1: sub64BitSigned: | 174 ; OPTM1-LABEL: sub64BitSigned |
175 ; OPTM1: sub | 175 ; OPTM1: sub |
176 ; OPTM1: sbb | 176 ; OPTM1: sbb |
177 ; OPTM1: ret | 177 ; OPTM1: ret |
178 | 178 |
179 define internal i64 @sub64BitUnsigned(i64 %a, i64 %b) { | 179 define internal i64 @sub64BitUnsigned(i64 %a, i64 %b) { |
180 entry: | 180 entry: |
181 %sub = sub i64 %a, %b | 181 %sub = sub i64 %a, %b |
182 ret i64 %sub | 182 ret i64 %sub |
183 } | 183 } |
184 ; CHECK: sub64BitUnsigned: | 184 ; CHECK-LABEL: sub64BitUnsigned |
185 ; CHECK: sub | 185 ; CHECK: sub |
186 ; CHECK: sbb | 186 ; CHECK: sbb |
187 ; CHECK: ret | 187 ; CHECK: ret |
188 ; | 188 ; |
189 ; OPTM1: sub64BitUnsigned: | 189 ; OPTM1-LABEL: sub64BitUnsigned |
190 ; OPTM1: sub | 190 ; OPTM1: sub |
191 ; OPTM1: sbb | 191 ; OPTM1: sbb |
192 ; OPTM1: ret | 192 ; OPTM1: ret |
193 | 193 |
194 define internal i64 @mul64BitSigned(i64 %a, i64 %b) { | 194 define internal i64 @mul64BitSigned(i64 %a, i64 %b) { |
195 entry: | 195 entry: |
196 %mul = mul i64 %b, %a | 196 %mul = mul i64 %b, %a |
197 ret i64 %mul | 197 ret i64 %mul |
198 } | 198 } |
199 ; CHECK: mul64BitSigned: | 199 ; CHECK-LABEL: mul64BitSigned |
200 ; CHECK: imul | 200 ; CHECK: imul |
201 ; CHECK: imul | 201 ; CHECK: imul |
202 ; CHECK: mul | 202 ; CHECK: mul |
203 ; CHECK: add | 203 ; CHECK: add |
204 ; CHECK: add | 204 ; CHECK: add |
205 ; CHECK: ret | 205 ; CHECK: ret |
206 ; | 206 ; |
207 ; OPTM1: mul64BitSigned: | 207 ; OPTM1-LABEL: mul64BitSigned |
208 ; OPTM1: imul | 208 ; OPTM1: imul |
209 ; OPTM1: imul | 209 ; OPTM1: imul |
210 ; OPTM1: mul | 210 ; OPTM1: mul |
211 ; OPTM1: add | 211 ; OPTM1: add |
212 ; OPTM1: add | 212 ; OPTM1: add |
213 ; OPTM1: ret | 213 ; OPTM1: ret |
214 | 214 |
215 define internal i64 @mul64BitUnsigned(i64 %a, i64 %b) { | 215 define internal i64 @mul64BitUnsigned(i64 %a, i64 %b) { |
216 entry: | 216 entry: |
217 %mul = mul i64 %b, %a | 217 %mul = mul i64 %b, %a |
218 ret i64 %mul | 218 ret i64 %mul |
219 } | 219 } |
220 ; CHECK: mul64BitUnsigned: | 220 ; CHECK-LABEL: mul64BitUnsigned |
221 ; CHECK: imul | 221 ; CHECK: imul |
222 ; CHECK: imul | 222 ; CHECK: imul |
223 ; CHECK: mul | 223 ; CHECK: mul |
224 ; CHECK: add | 224 ; CHECK: add |
225 ; CHECK: add | 225 ; CHECK: add |
226 ; CHECK: ret | 226 ; CHECK: ret |
227 ; | 227 ; |
228 ; OPTM1: mul64BitUnsigned: | 228 ; OPTM1-LABEL: mul64BitUnsigned |
229 ; OPTM1: imul | 229 ; OPTM1: imul |
230 ; OPTM1: imul | 230 ; OPTM1: imul |
231 ; OPTM1: mul | 231 ; OPTM1: mul |
232 ; OPTM1: add | 232 ; OPTM1: add |
233 ; OPTM1: add | 233 ; OPTM1: add |
234 ; OPTM1: ret | 234 ; OPTM1: ret |
235 | 235 |
236 define internal i64 @div64BitSigned(i64 %a, i64 %b) { | 236 define internal i64 @div64BitSigned(i64 %a, i64 %b) { |
237 entry: | 237 entry: |
238 %div = sdiv i64 %a, %b | 238 %div = sdiv i64 %a, %b |
239 ret i64 %div | 239 ret i64 %div |
240 } | 240 } |
241 ; CHECK: div64BitSigned: | 241 ; CHECK-LABEL: div64BitSigned |
242 ; CHECK: call __divdi3 | 242 ; CHECK: call __divdi3 |
243 ; CHECK: ret | 243 ; CHECK: ret |
244 ; | 244 ; |
245 ; OPTM1: div64BitSigned: | 245 ; OPTM1-LABEL: div64BitSigned |
246 ; OPTM1: call __divdi3 | 246 ; OPTM1: call __divdi3 |
247 ; OPTM1: ret | 247 ; OPTM1: ret |
248 | 248 |
249 define internal i64 @div64BitSignedConst(i64 %a) { | 249 define internal i64 @div64BitSignedConst(i64 %a) { |
250 entry: | 250 entry: |
251 %div = sdiv i64 %a, 12345678901234 | 251 %div = sdiv i64 %a, 12345678901234 |
252 ret i64 %div | 252 ret i64 %div |
253 } | 253 } |
254 ; CHECK-LABEL: div64BitSignedConst: | 254 ; CHECK-LABEL: div64BitSignedConst |
255 ; CHECK: mov dword ptr [esp+12], 2874 | 255 ; CHECK: mov dword ptr [esp+12], 2874 |
256 ; CHECK: mov dword ptr [esp+8], 1942892530 | 256 ; CHECK: mov dword ptr [esp+8], 1942892530 |
257 ; CHECK: call __divdi3 | 257 ; CHECK: call __divdi3 |
258 ; CHECK: ret | 258 ; CHECK: ret |
259 ; | 259 ; |
260 ; OPTM1-LABEL: div64BitSignedConst: | 260 ; OPTM1-LABEL: div64BitSignedConst |
261 ; OPTM1: mov dword ptr [esp+12], 2874 | 261 ; OPTM1: mov dword ptr [esp+12], 2874 |
262 ; OPTM1: mov dword ptr [esp+8], 1942892530 | 262 ; OPTM1: mov dword ptr [esp+8], 1942892530 |
263 ; OPTM1: call __divdi3 | 263 ; OPTM1: call __divdi3 |
264 ; OPTM1: ret | 264 ; OPTM1: ret |
265 | 265 |
266 define internal i64 @div64BitUnsigned(i64 %a, i64 %b) { | 266 define internal i64 @div64BitUnsigned(i64 %a, i64 %b) { |
267 entry: | 267 entry: |
268 %div = udiv i64 %a, %b | 268 %div = udiv i64 %a, %b |
269 ret i64 %div | 269 ret i64 %div |
270 } | 270 } |
271 ; CHECK: div64BitUnsigned: | 271 ; CHECK-LABEL: div64BitUnsigned |
272 ; CHECK: call __udivdi3 | 272 ; CHECK: call __udivdi3 |
273 ; CHECK: ret | 273 ; CHECK: ret |
274 ; | 274 ; |
275 ; OPTM1: div64BitUnsigned: | 275 ; OPTM1-LABEL: div64BitUnsigned |
276 ; OPTM1: call __udivdi3 | 276 ; OPTM1: call __udivdi3 |
277 ; OPTM1: ret | 277 ; OPTM1: ret |
278 | 278 |
279 define internal i64 @rem64BitSigned(i64 %a, i64 %b) { | 279 define internal i64 @rem64BitSigned(i64 %a, i64 %b) { |
280 entry: | 280 entry: |
281 %rem = srem i64 %a, %b | 281 %rem = srem i64 %a, %b |
282 ret i64 %rem | 282 ret i64 %rem |
283 } | 283 } |
284 ; CHECK: rem64BitSigned: | 284 ; CHECK-LABEL: rem64BitSigned |
285 ; CHECK: call __moddi3 | 285 ; CHECK: call __moddi3 |
286 ; CHECK: ret | 286 ; CHECK: ret |
287 ; | 287 ; |
288 ; OPTM1: rem64BitSigned: | 288 ; OPTM1-LABEL: rem64BitSigned |
289 ; OPTM1: call __moddi3 | 289 ; OPTM1: call __moddi3 |
290 ; OPTM1: ret | 290 ; OPTM1: ret |
291 | 291 |
292 define internal i64 @rem64BitUnsigned(i64 %a, i64 %b) { | 292 define internal i64 @rem64BitUnsigned(i64 %a, i64 %b) { |
293 entry: | 293 entry: |
294 %rem = urem i64 %a, %b | 294 %rem = urem i64 %a, %b |
295 ret i64 %rem | 295 ret i64 %rem |
296 } | 296 } |
297 ; CHECK: rem64BitUnsigned: | 297 ; CHECK-LABEL: rem64BitUnsigned |
298 ; CHECK: call __umoddi3 | 298 ; CHECK: call __umoddi3 |
299 ; CHECK: ret | 299 ; CHECK: ret |
300 ; | 300 ; |
301 ; OPTM1: rem64BitUnsigned: | 301 ; OPTM1-LABEL: rem64BitUnsigned |
302 ; OPTM1: call __umoddi3 | 302 ; OPTM1: call __umoddi3 |
303 ; OPTM1: ret | 303 ; OPTM1: ret |
304 | 304 |
305 define internal i64 @shl64BitSigned(i64 %a, i64 %b) { | 305 define internal i64 @shl64BitSigned(i64 %a, i64 %b) { |
306 entry: | 306 entry: |
307 %shl = shl i64 %a, %b | 307 %shl = shl i64 %a, %b |
308 ret i64 %shl | 308 ret i64 %shl |
309 } | 309 } |
310 ; CHECK: shl64BitSigned: | 310 ; CHECK-LABEL: shl64BitSigned |
311 ; CHECK: shld | 311 ; CHECK: shld |
312 ; CHECK: shl e | 312 ; CHECK: shl e |
313 ; CHECK: test {{.*}}, 32 | 313 ; CHECK: test {{.*}}, 32 |
314 ; CHECK: je | 314 ; CHECK: je |
315 ; | 315 ; |
316 ; OPTM1: shl64BitSigned: | 316 ; OPTM1-LABEL: shl64BitSigned |
317 ; OPTM1: shld | 317 ; OPTM1: shld |
318 ; OPTM1: shl e | 318 ; OPTM1: shl e |
319 ; OPTM1: test {{.*}}, 32 | 319 ; OPTM1: test {{.*}}, 32 |
320 ; OPTM1: je | 320 ; OPTM1: je |
321 | 321 |
322 define internal i64 @shl64BitUnsigned(i64 %a, i64 %b) { | 322 define internal i64 @shl64BitUnsigned(i64 %a, i64 %b) { |
323 entry: | 323 entry: |
324 %shl = shl i64 %a, %b | 324 %shl = shl i64 %a, %b |
325 ret i64 %shl | 325 ret i64 %shl |
326 } | 326 } |
327 ; CHECK: shl64BitUnsigned: | 327 ; CHECK-LABEL: shl64BitUnsigned |
328 ; CHECK: shld | 328 ; CHECK: shld |
329 ; CHECK: shl e | 329 ; CHECK: shl e |
330 ; CHECK: test {{.*}}, 32 | 330 ; CHECK: test {{.*}}, 32 |
331 ; CHECK: je | 331 ; CHECK: je |
332 ; | 332 ; |
333 ; OPTM1: shl64BitUnsigned: | 333 ; OPTM1-LABEL: shl64BitUnsigned |
334 ; OPTM1: shld | 334 ; OPTM1: shld |
335 ; OPTM1: shl e | 335 ; OPTM1: shl e |
336 ; OPTM1: test {{.*}}, 32 | 336 ; OPTM1: test {{.*}}, 32 |
337 ; OPTM1: je | 337 ; OPTM1: je |
338 | 338 |
339 define internal i64 @shr64BitSigned(i64 %a, i64 %b) { | 339 define internal i64 @shr64BitSigned(i64 %a, i64 %b) { |
340 entry: | 340 entry: |
341 %shr = ashr i64 %a, %b | 341 %shr = ashr i64 %a, %b |
342 ret i64 %shr | 342 ret i64 %shr |
343 } | 343 } |
344 ; CHECK: shr64BitSigned: | 344 ; CHECK-LABEL: shr64BitSigned |
345 ; CHECK: shrd | 345 ; CHECK: shrd |
346 ; CHECK: sar | 346 ; CHECK: sar |
347 ; CHECK: test {{.*}}, 32 | 347 ; CHECK: test {{.*}}, 32 |
348 ; CHECK: je | 348 ; CHECK: je |
349 ; CHECK: sar {{.*}}, 31 | 349 ; CHECK: sar {{.*}}, 31 |
350 ; | 350 ; |
351 ; OPTM1: shr64BitSigned: | 351 ; OPTM1-LABEL: shr64BitSigned |
352 ; OPTM1: shrd | 352 ; OPTM1: shrd |
353 ; OPTM1: sar | 353 ; OPTM1: sar |
354 ; OPTM1: test {{.*}}, 32 | 354 ; OPTM1: test {{.*}}, 32 |
355 ; OPTM1: je | 355 ; OPTM1: je |
356 ; OPTM1: sar {{.*}}, 31 | 356 ; OPTM1: sar {{.*}}, 31 |
357 | 357 |
358 define internal i64 @shr64BitUnsigned(i64 %a, i64 %b) { | 358 define internal i64 @shr64BitUnsigned(i64 %a, i64 %b) { |
359 entry: | 359 entry: |
360 %shr = lshr i64 %a, %b | 360 %shr = lshr i64 %a, %b |
361 ret i64 %shr | 361 ret i64 %shr |
362 } | 362 } |
363 ; CHECK: shr64BitUnsigned: | 363 ; CHECK-LABEL: shr64BitUnsigned |
364 ; CHECK: shrd | 364 ; CHECK: shrd |
365 ; CHECK: shr | 365 ; CHECK: shr |
366 ; CHECK: test {{.*}}, 32 | 366 ; CHECK: test {{.*}}, 32 |
367 ; CHECK: je | 367 ; CHECK: je |
368 ; | 368 ; |
369 ; OPTM1: shr64BitUnsigned: | 369 ; OPTM1-LABEL: shr64BitUnsigned |
370 ; OPTM1: shrd | 370 ; OPTM1: shrd |
371 ; OPTM1: shr | 371 ; OPTM1: shr |
372 ; OPTM1: test {{.*}}, 32 | 372 ; OPTM1: test {{.*}}, 32 |
373 ; OPTM1: je | 373 ; OPTM1: je |
374 | 374 |
375 define internal i64 @and64BitSigned(i64 %a, i64 %b) { | 375 define internal i64 @and64BitSigned(i64 %a, i64 %b) { |
376 entry: | 376 entry: |
377 %and = and i64 %b, %a | 377 %and = and i64 %b, %a |
378 ret i64 %and | 378 ret i64 %and |
379 } | 379 } |
380 ; CHECK: and64BitSigned: | 380 ; CHECK-LABEL: and64BitSigned |
381 ; CHECK: and | 381 ; CHECK: and |
382 ; CHECK: and | 382 ; CHECK: and |
383 ; | 383 ; |
384 ; OPTM1: and64BitSigned: | 384 ; OPTM1-LABEL: and64BitSigned |
385 ; OPTM1: and | 385 ; OPTM1: and |
386 ; OPTM1: and | 386 ; OPTM1: and |
387 | 387 |
388 define internal i64 @and64BitUnsigned(i64 %a, i64 %b) { | 388 define internal i64 @and64BitUnsigned(i64 %a, i64 %b) { |
389 entry: | 389 entry: |
390 %and = and i64 %b, %a | 390 %and = and i64 %b, %a |
391 ret i64 %and | 391 ret i64 %and |
392 } | 392 } |
393 ; CHECK: and64BitUnsigned: | 393 ; CHECK-LABEL: and64BitUnsigned |
394 ; CHECK: and | 394 ; CHECK: and |
395 ; CHECK: and | 395 ; CHECK: and |
396 ; | 396 ; |
397 ; OPTM1: and64BitUnsigned: | 397 ; OPTM1-LABEL: and64BitUnsigned |
398 ; OPTM1: and | 398 ; OPTM1: and |
399 ; OPTM1: and | 399 ; OPTM1: and |
400 | 400 |
401 define internal i64 @or64BitSigned(i64 %a, i64 %b) { | 401 define internal i64 @or64BitSigned(i64 %a, i64 %b) { |
402 entry: | 402 entry: |
403 %or = or i64 %b, %a | 403 %or = or i64 %b, %a |
404 ret i64 %or | 404 ret i64 %or |
405 } | 405 } |
406 ; CHECK: or64BitSigned: | 406 ; CHECK-LABEL: or64BitSigned |
407 ; CHECK: or | 407 ; CHECK: or |
408 ; CHECK: or | 408 ; CHECK: or |
409 ; | 409 ; |
410 ; OPTM1: or64BitSigned: | 410 ; OPTM1-LABEL: or64BitSigned |
411 ; OPTM1: or | 411 ; OPTM1: or |
412 ; OPTM1: or | 412 ; OPTM1: or |
413 | 413 |
414 define internal i64 @or64BitUnsigned(i64 %a, i64 %b) { | 414 define internal i64 @or64BitUnsigned(i64 %a, i64 %b) { |
415 entry: | 415 entry: |
416 %or = or i64 %b, %a | 416 %or = or i64 %b, %a |
417 ret i64 %or | 417 ret i64 %or |
418 } | 418 } |
419 ; CHECK: or64BitUnsigned: | 419 ; CHECK-LABEL: or64BitUnsigned |
420 ; CHECK: or | 420 ; CHECK: or |
421 ; CHECK: or | 421 ; CHECK: or |
422 ; | 422 ; |
423 ; OPTM1: or64BitUnsigned: | 423 ; OPTM1-LABEL: or64BitUnsigned |
424 ; OPTM1: or | 424 ; OPTM1: or |
425 ; OPTM1: or | 425 ; OPTM1: or |
426 | 426 |
427 define internal i64 @xor64BitSigned(i64 %a, i64 %b) { | 427 define internal i64 @xor64BitSigned(i64 %a, i64 %b) { |
428 entry: | 428 entry: |
429 %xor = xor i64 %b, %a | 429 %xor = xor i64 %b, %a |
430 ret i64 %xor | 430 ret i64 %xor |
431 } | 431 } |
432 ; CHECK: xor64BitSigned: | 432 ; CHECK-LABEL: xor64BitSigned |
433 ; CHECK: xor | 433 ; CHECK: xor |
434 ; CHECK: xor | 434 ; CHECK: xor |
435 ; | 435 ; |
436 ; OPTM1: xor64BitSigned: | 436 ; OPTM1-LABEL: xor64BitSigned |
437 ; OPTM1: xor | 437 ; OPTM1: xor |
438 ; OPTM1: xor | 438 ; OPTM1: xor |
439 | 439 |
440 define internal i64 @xor64BitUnsigned(i64 %a, i64 %b) { | 440 define internal i64 @xor64BitUnsigned(i64 %a, i64 %b) { |
441 entry: | 441 entry: |
442 %xor = xor i64 %b, %a | 442 %xor = xor i64 %b, %a |
443 ret i64 %xor | 443 ret i64 %xor |
444 } | 444 } |
445 ; CHECK: xor64BitUnsigned: | 445 ; CHECK-LABEL: xor64BitUnsigned |
446 ; CHECK: xor | 446 ; CHECK: xor |
447 ; CHECK: xor | 447 ; CHECK: xor |
448 ; | 448 ; |
449 ; OPTM1: xor64BitUnsigned: | 449 ; OPTM1-LABEL: xor64BitUnsigned |
450 ; OPTM1: xor | 450 ; OPTM1: xor |
451 ; OPTM1: xor | 451 ; OPTM1: xor |
452 | 452 |
453 define internal i32 @trunc64To32Signed(i64 %a) { | 453 define internal i32 @trunc64To32Signed(i64 %a) { |
454 entry: | 454 entry: |
455 %conv = trunc i64 %a to i32 | 455 %conv = trunc i64 %a to i32 |
456 ret i32 %conv | 456 ret i32 %conv |
457 } | 457 } |
458 ; CHECK: trunc64To32Signed: | 458 ; CHECK-LABEL: trunc64To32Signed |
459 ; CHECK: mov eax, dword ptr [esp+4] | 459 ; CHECK: mov eax, dword ptr [esp+4] |
460 ; CHECK-NEXT: ret | 460 ; CHECK-NEXT: ret |
461 ; | 461 ; |
462 ; OPTM1: trunc64To32Signed: | 462 ; OPTM1-LABEL: trunc64To32Signed |
463 ; OPTM1: mov eax, dword ptr [esp+ | 463 ; OPTM1: mov eax, dword ptr [esp+ |
464 ; OPTM1: ret | 464 ; OPTM1: ret |
465 | 465 |
466 define internal i32 @trunc64To16Signed(i64 %a) { | 466 define internal i32 @trunc64To16Signed(i64 %a) { |
467 entry: | 467 entry: |
468 %conv = trunc i64 %a to i16 | 468 %conv = trunc i64 %a to i16 |
469 %conv.ret_ext = sext i16 %conv to i32 | 469 %conv.ret_ext = sext i16 %conv to i32 |
470 ret i32 %conv.ret_ext | 470 ret i32 %conv.ret_ext |
471 } | 471 } |
472 ; CHECK: trunc64To16Signed: | 472 ; CHECK-LABEL: trunc64To16Signed |
473 ; CHECK: mov eax, dword ptr [esp+4] | 473 ; CHECK: mov eax, dword ptr [esp+4] |
474 ; CHECK-NEXT: movsx eax, ax | 474 ; CHECK-NEXT: movsx eax, ax |
475 ; CHECK-NEXT: ret | 475 ; CHECK-NEXT: ret |
476 ; | 476 ; |
477 ; OPTM1: trunc64To16Signed: | 477 ; OPTM1-LABEL: trunc64To16Signed |
478 ; OPTM1: mov eax, dword ptr [esp+ | 478 ; OPTM1: mov eax, dword ptr [esp+ |
479 ; OPTM1: movsx eax, | 479 ; OPTM1: movsx eax, |
480 ; OPTM1: ret | 480 ; OPTM1: ret |
481 | 481 |
482 define internal i32 @trunc64To8Signed(i64 %a) { | 482 define internal i32 @trunc64To8Signed(i64 %a) { |
483 entry: | 483 entry: |
484 %conv = trunc i64 %a to i8 | 484 %conv = trunc i64 %a to i8 |
485 %conv.ret_ext = sext i8 %conv to i32 | 485 %conv.ret_ext = sext i8 %conv to i32 |
486 ret i32 %conv.ret_ext | 486 ret i32 %conv.ret_ext |
487 } | 487 } |
488 ; CHECK: trunc64To8Signed: | 488 ; CHECK-LABEL: trunc64To8Signed |
489 ; CHECK: mov eax, dword ptr [esp+4] | 489 ; CHECK: mov eax, dword ptr [esp+4] |
490 ; CHECK-NEXT: movsx eax, al | 490 ; CHECK-NEXT: movsx eax, al |
491 ; CHECK-NEXT: ret | 491 ; CHECK-NEXT: ret |
492 ; | 492 ; |
493 ; OPTM1: trunc64To8Signed: | 493 ; OPTM1-LABEL: trunc64To8Signed |
494 ; OPTM1: mov eax, dword ptr [esp+ | 494 ; OPTM1: mov eax, dword ptr [esp+ |
495 ; OPTM1: movsx eax, | 495 ; OPTM1: movsx eax, |
496 ; OPTM1: ret | 496 ; OPTM1: ret |
497 | 497 |
498 define internal i32 @trunc64To32SignedConst() { | 498 define internal i32 @trunc64To32SignedConst() { |
499 entry: | 499 entry: |
500 %conv = trunc i64 12345678901234 to i32 | 500 %conv = trunc i64 12345678901234 to i32 |
501 ret i32 %conv | 501 ret i32 %conv |
502 } | 502 } |
503 ; CHECK-LABEL: trunc64To32SignedConst | 503 ; CHECK-LABEL: trunc64To32SignedConst |
(...skipping 14 matching lines...) Expand all Loading... |
518 ; | 518 ; |
519 ; OPTM1-LABEL: trunc64To16SignedConst | 519 ; OPTM1-LABEL: trunc64To16SignedConst |
520 ; OPTM1: mov eax, 1942892530 | 520 ; OPTM1: mov eax, 1942892530 |
521 ; OPTM1: movsx eax, | 521 ; OPTM1: movsx eax, |
522 | 522 |
523 define internal i32 @trunc64To32Unsigned(i64 %a) { | 523 define internal i32 @trunc64To32Unsigned(i64 %a) { |
524 entry: | 524 entry: |
525 %conv = trunc i64 %a to i32 | 525 %conv = trunc i64 %a to i32 |
526 ret i32 %conv | 526 ret i32 %conv |
527 } | 527 } |
528 ; CHECK: trunc64To32Unsigned: | 528 ; CHECK-LABEL: trunc64To32Unsigned |
529 ; CHECK: mov eax, dword ptr [esp+4] | 529 ; CHECK: mov eax, dword ptr [esp+4] |
530 ; CHECK-NEXT: ret | 530 ; CHECK-NEXT: ret |
531 ; | 531 ; |
532 ; OPTM1: trunc64To32Unsigned: | 532 ; OPTM1-LABEL: trunc64To32Unsigned |
533 ; OPTM1: mov eax, dword ptr [esp+ | 533 ; OPTM1: mov eax, dword ptr [esp+ |
534 ; OPTM1: ret | 534 ; OPTM1: ret |
535 | 535 |
536 define internal i32 @trunc64To16Unsigned(i64 %a) { | 536 define internal i32 @trunc64To16Unsigned(i64 %a) { |
537 entry: | 537 entry: |
538 %conv = trunc i64 %a to i16 | 538 %conv = trunc i64 %a to i16 |
539 %conv.ret_ext = zext i16 %conv to i32 | 539 %conv.ret_ext = zext i16 %conv to i32 |
540 ret i32 %conv.ret_ext | 540 ret i32 %conv.ret_ext |
541 } | 541 } |
542 ; CHECK: trunc64To16Unsigned: | 542 ; CHECK-LABEL: trunc64To16Unsigned |
543 ; CHECK: mov eax, dword ptr [esp+4] | 543 ; CHECK: mov eax, dword ptr [esp+4] |
544 ; CHECK-NEXT: movzx eax, ax | 544 ; CHECK-NEXT: movzx eax, ax |
545 ; CHECK-NEXT: ret | 545 ; CHECK-NEXT: ret |
546 ; | 546 ; |
547 ; OPTM1: trunc64To16Unsigned: | 547 ; OPTM1-LABEL: trunc64To16Unsigned |
548 ; OPTM1: mov eax, dword ptr [esp+ | 548 ; OPTM1: mov eax, dword ptr [esp+ |
549 ; OPTM1: movzx eax, | 549 ; OPTM1: movzx eax, |
550 ; OPTM1: ret | 550 ; OPTM1: ret |
551 | 551 |
552 define internal i32 @trunc64To8Unsigned(i64 %a) { | 552 define internal i32 @trunc64To8Unsigned(i64 %a) { |
553 entry: | 553 entry: |
554 %conv = trunc i64 %a to i8 | 554 %conv = trunc i64 %a to i8 |
555 %conv.ret_ext = zext i8 %conv to i32 | 555 %conv.ret_ext = zext i8 %conv to i32 |
556 ret i32 %conv.ret_ext | 556 ret i32 %conv.ret_ext |
557 } | 557 } |
558 ; CHECK: trunc64To8Unsigned: | 558 ; CHECK-LABEL: trunc64To8Unsigned |
559 ; CHECK: mov eax, dword ptr [esp+4] | 559 ; CHECK: mov eax, dword ptr [esp+4] |
560 ; CHECK-NEXT: movzx eax, al | 560 ; CHECK-NEXT: movzx eax, al |
561 ; CHECK-NEXT: ret | 561 ; CHECK-NEXT: ret |
562 ; | 562 ; |
563 ; OPTM1: trunc64To8Unsigned: | 563 ; OPTM1-LABEL: trunc64To8Unsigned |
564 ; OPTM1: mov eax, dword ptr [esp+ | 564 ; OPTM1: mov eax, dword ptr [esp+ |
565 ; OPTM1: movzx eax, | 565 ; OPTM1: movzx eax, |
566 ; OPTM1: ret | 566 ; OPTM1: ret |
567 | 567 |
568 define internal i32 @trunc64To1(i64 %a) { | 568 define internal i32 @trunc64To1(i64 %a) { |
569 entry: | 569 entry: |
570 ; %tobool = icmp ne i64 %a, 0 | 570 ; %tobool = icmp ne i64 %a, 0 |
571 %tobool = trunc i64 %a to i1 | 571 %tobool = trunc i64 %a to i1 |
572 %tobool.ret_ext = zext i1 %tobool to i32 | 572 %tobool.ret_ext = zext i1 %tobool to i32 |
573 ret i32 %tobool.ret_ext | 573 ret i32 %tobool.ret_ext |
574 } | 574 } |
575 ; CHECK: trunc64To1: | 575 ; CHECK-LABEL: trunc64To1 |
576 ; CHECK: mov eax, dword ptr [esp+4] | 576 ; CHECK: mov eax, dword ptr [esp+4] |
577 ; CHECK: and eax, 1 | 577 ; CHECK: and eax, 1 |
578 ; CHECK-NEXT: ret | 578 ; CHECK-NEXT: ret |
579 ; | 579 ; |
580 ; OPTM1: trunc64To1: | 580 ; OPTM1-LABEL: trunc64To1 |
581 ; OPTM1: mov eax, dword ptr [esp+ | 581 ; OPTM1: mov eax, dword ptr [esp+ |
582 ; OPTM1: and eax, 1 | 582 ; OPTM1: and eax, 1 |
583 ; OPTM1: ret | 583 ; OPTM1: ret |
584 | 584 |
585 define internal i64 @sext32To64(i32 %a) { | 585 define internal i64 @sext32To64(i32 %a) { |
586 entry: | 586 entry: |
587 %conv = sext i32 %a to i64 | 587 %conv = sext i32 %a to i64 |
588 ret i64 %conv | 588 ret i64 %conv |
589 } | 589 } |
590 ; CHECK: sext32To64: | 590 ; CHECK-LABEL: sext32To64 |
591 ; CHECK: mov | 591 ; CHECK: mov |
592 ; CHECK: sar {{.*}}, 31 | 592 ; CHECK: sar {{.*}}, 31 |
593 ; | 593 ; |
594 ; OPTM1: sext32To64: | 594 ; OPTM1-LABEL: sext32To64 |
595 ; OPTM1: mov | 595 ; OPTM1: mov |
596 ; OPTM1: sar {{.*}}, 31 | 596 ; OPTM1: sar {{.*}}, 31 |
597 | 597 |
598 define internal i64 @sext16To64(i32 %a) { | 598 define internal i64 @sext16To64(i32 %a) { |
599 entry: | 599 entry: |
600 %a.arg_trunc = trunc i32 %a to i16 | 600 %a.arg_trunc = trunc i32 %a to i16 |
601 %conv = sext i16 %a.arg_trunc to i64 | 601 %conv = sext i16 %a.arg_trunc to i64 |
602 ret i64 %conv | 602 ret i64 %conv |
603 } | 603 } |
604 ; CHECK: sext16To64: | 604 ; CHECK-LABEL: sext16To64 |
605 ; CHECK: movsx | 605 ; CHECK: movsx |
606 ; CHECK: sar {{.*}}, 31 | 606 ; CHECK: sar {{.*}}, 31 |
607 ; | 607 ; |
608 ; OPTM1: sext16To64: | 608 ; OPTM1-LABEL: sext16To64 |
609 ; OPTM1: movsx | 609 ; OPTM1: movsx |
610 ; OPTM1: sar {{.*}}, 31 | 610 ; OPTM1: sar {{.*}}, 31 |
611 | 611 |
612 define internal i64 @sext8To64(i32 %a) { | 612 define internal i64 @sext8To64(i32 %a) { |
613 entry: | 613 entry: |
614 %a.arg_trunc = trunc i32 %a to i8 | 614 %a.arg_trunc = trunc i32 %a to i8 |
615 %conv = sext i8 %a.arg_trunc to i64 | 615 %conv = sext i8 %a.arg_trunc to i64 |
616 ret i64 %conv | 616 ret i64 %conv |
617 } | 617 } |
618 ; CHECK: sext8To64: | 618 ; CHECK-LABEL: sext8To64 |
619 ; CHECK: movsx | 619 ; CHECK: movsx |
620 ; CHECK: sar {{.*}}, 31 | 620 ; CHECK: sar {{.*}}, 31 |
621 ; | 621 ; |
622 ; OPTM1: sext8To64: | 622 ; OPTM1-LABEL: sext8To64 |
623 ; OPTM1: movsx | 623 ; OPTM1: movsx |
624 ; OPTM1: sar {{.*}}, 31 | 624 ; OPTM1: sar {{.*}}, 31 |
625 | 625 |
626 define internal i64 @zext32To64(i32 %a) { | 626 define internal i64 @zext32To64(i32 %a) { |
627 entry: | 627 entry: |
628 %conv = zext i32 %a to i64 | 628 %conv = zext i32 %a to i64 |
629 ret i64 %conv | 629 ret i64 %conv |
630 } | 630 } |
631 ; CHECK: zext32To64: | 631 ; CHECK-LABEL: zext32To64 |
632 ; CHECK: mov | 632 ; CHECK: mov |
633 ; CHECK: mov {{.*}}, 0 | 633 ; CHECK: mov {{.*}}, 0 |
634 ; | 634 ; |
635 ; OPTM1: zext32To64: | 635 ; OPTM1-LABEL: zext32To64 |
636 ; OPTM1: mov | 636 ; OPTM1: mov |
637 ; OPTM1: mov {{.*}}, 0 | 637 ; OPTM1: mov {{.*}}, 0 |
638 | 638 |
639 define internal i64 @zext16To64(i32 %a) { | 639 define internal i64 @zext16To64(i32 %a) { |
640 entry: | 640 entry: |
641 %a.arg_trunc = trunc i32 %a to i16 | 641 %a.arg_trunc = trunc i32 %a to i16 |
642 %conv = zext i16 %a.arg_trunc to i64 | 642 %conv = zext i16 %a.arg_trunc to i64 |
643 ret i64 %conv | 643 ret i64 %conv |
644 } | 644 } |
645 ; CHECK: zext16To64: | 645 ; CHECK-LABEL: zext16To64 |
646 ; CHECK: movzx | 646 ; CHECK: movzx |
647 ; CHECK: mov {{.*}}, 0 | 647 ; CHECK: mov {{.*}}, 0 |
648 ; | 648 ; |
649 ; OPTM1: zext16To64: | 649 ; OPTM1-LABEL: zext16To64 |
650 ; OPTM1: movzx | 650 ; OPTM1: movzx |
651 ; OPTM1: mov {{.*}}, 0 | 651 ; OPTM1: mov {{.*}}, 0 |
652 | 652 |
653 define internal i64 @zext8To64(i32 %a) { | 653 define internal i64 @zext8To64(i32 %a) { |
654 entry: | 654 entry: |
655 %a.arg_trunc = trunc i32 %a to i8 | 655 %a.arg_trunc = trunc i32 %a to i8 |
656 %conv = zext i8 %a.arg_trunc to i64 | 656 %conv = zext i8 %a.arg_trunc to i64 |
657 ret i64 %conv | 657 ret i64 %conv |
658 } | 658 } |
659 ; CHECK: zext8To64: | 659 ; CHECK-LABEL: zext8To64 |
660 ; CHECK: movzx | 660 ; CHECK: movzx |
661 ; CHECK: mov {{.*}}, 0 | 661 ; CHECK: mov {{.*}}, 0 |
662 ; | 662 ; |
663 ; OPTM1: zext8To64: | 663 ; OPTM1-LABEL: zext8To64 |
664 ; OPTM1: movzx | 664 ; OPTM1: movzx |
665 ; OPTM1: mov {{.*}}, 0 | 665 ; OPTM1: mov {{.*}}, 0 |
666 | 666 |
667 define internal i64 @zext1To64(i32 %a) { | 667 define internal i64 @zext1To64(i32 %a) { |
668 entry: | 668 entry: |
669 %a.arg_trunc = trunc i32 %a to i1 | 669 %a.arg_trunc = trunc i32 %a to i1 |
670 %conv = zext i1 %a.arg_trunc to i64 | 670 %conv = zext i1 %a.arg_trunc to i64 |
671 ret i64 %conv | 671 ret i64 %conv |
672 } | 672 } |
673 ; CHECK: zext1To64: | 673 ; CHECK-LABEL: zext1To64 |
674 ; CHECK: movzx | 674 ; CHECK: movzx |
675 ; CHECK: mov {{.*}}, 0 | 675 ; CHECK: mov {{.*}}, 0 |
676 ; | 676 ; |
677 ; OPTM1: zext1To64: | 677 ; OPTM1-LABEL: zext1To64 |
678 ; OPTM1: movzx | 678 ; OPTM1: movzx |
679 ; OPTM1: mov {{.*}}, 0 | 679 ; OPTM1: mov {{.*}}, 0 |
680 | 680 |
681 define internal void @icmpEq64(i64 %a, i64 %b, i64 %c, i64 %d) { | 681 define internal void @icmpEq64(i64 %a, i64 %b, i64 %c, i64 %d) { |
682 entry: | 682 entry: |
683 %cmp = icmp eq i64 %a, %b | 683 %cmp = icmp eq i64 %a, %b |
684 br i1 %cmp, label %if.then, label %if.end | 684 br i1 %cmp, label %if.then, label %if.end |
685 | 685 |
686 if.then: ; preds = %entry | 686 if.then: ; preds = %entry |
687 call void @func() | 687 call void @func() |
688 br label %if.end | 688 br label %if.end |
689 | 689 |
690 if.end: ; preds = %if.then, %entry | 690 if.end: ; preds = %if.then, %entry |
691 %cmp1 = icmp eq i64 %c, %d | 691 %cmp1 = icmp eq i64 %c, %d |
692 br i1 %cmp1, label %if.then2, label %if.end3 | 692 br i1 %cmp1, label %if.then2, label %if.end3 |
693 | 693 |
694 if.then2: ; preds = %if.end | 694 if.then2: ; preds = %if.end |
695 call void @func() | 695 call void @func() |
696 br label %if.end3 | 696 br label %if.end3 |
697 | 697 |
698 if.end3: ; preds = %if.then2, %if.end | 698 if.end3: ; preds = %if.then2, %if.end |
699 ret void | 699 ret void |
700 } | 700 } |
701 ; CHECK: icmpEq64: | 701 ; CHECK-LABEL: icmpEq64 |
702 ; CHECK: jne | 702 ; CHECK: jne |
703 ; CHECK: jne | 703 ; CHECK: jne |
704 ; CHECK: call | 704 ; CHECK: call |
705 ; CHECK: jne | 705 ; CHECK: jne |
706 ; CHECK: jne | 706 ; CHECK: jne |
707 ; CHECK: call | 707 ; CHECK: call |
708 ; | 708 ; |
709 ; OPTM1: icmpEq64: | 709 ; OPTM1-LABEL: icmpEq64 |
710 ; OPTM1: jne | 710 ; OPTM1: jne |
711 ; OPTM1: jne | 711 ; OPTM1: jne |
712 ; OPTM1: call | 712 ; OPTM1: call |
713 ; OPTM1: jne | 713 ; OPTM1: jne |
714 ; OPTM1: jne | 714 ; OPTM1: jne |
715 ; OPTM1: call | 715 ; OPTM1: call |
716 | 716 |
717 declare void @func() | 717 declare void @func() |
718 | 718 |
719 define internal void @icmpNe64(i64 %a, i64 %b, i64 %c, i64 %d) { | 719 define internal void @icmpNe64(i64 %a, i64 %b, i64 %c, i64 %d) { |
720 entry: | 720 entry: |
721 %cmp = icmp ne i64 %a, %b | 721 %cmp = icmp ne i64 %a, %b |
722 br i1 %cmp, label %if.then, label %if.end | 722 br i1 %cmp, label %if.then, label %if.end |
723 | 723 |
724 if.then: ; preds = %entry | 724 if.then: ; preds = %entry |
725 call void @func() | 725 call void @func() |
726 br label %if.end | 726 br label %if.end |
727 | 727 |
728 if.end: ; preds = %if.then, %entry | 728 if.end: ; preds = %if.then, %entry |
729 %cmp1 = icmp ne i64 %c, %d | 729 %cmp1 = icmp ne i64 %c, %d |
730 br i1 %cmp1, label %if.then2, label %if.end3 | 730 br i1 %cmp1, label %if.then2, label %if.end3 |
731 | 731 |
732 if.then2: ; preds = %if.end | 732 if.then2: ; preds = %if.end |
733 call void @func() | 733 call void @func() |
734 br label %if.end3 | 734 br label %if.end3 |
735 | 735 |
736 if.end3: ; preds = %if.end, %if.then2 | 736 if.end3: ; preds = %if.end, %if.then2 |
737 ret void | 737 ret void |
738 } | 738 } |
739 ; CHECK: icmpNe64: | 739 ; CHECK-LABEL: icmpNe64 |
740 ; CHECK: jne | 740 ; CHECK: jne |
741 ; CHECK: jne | 741 ; CHECK: jne |
742 ; CHECK: call | 742 ; CHECK: call |
743 ; CHECK: jne | 743 ; CHECK: jne |
744 ; CHECK: jne | 744 ; CHECK: jne |
745 ; CHECK: call | 745 ; CHECK: call |
746 ; | 746 ; |
747 ; OPTM1: icmpNe64: | 747 ; OPTM1-LABEL: icmpNe64 |
748 ; OPTM1: jne | 748 ; OPTM1: jne |
749 ; OPTM1: jne | 749 ; OPTM1: jne |
750 ; OPTM1: call | 750 ; OPTM1: call |
751 ; OPTM1: jne | 751 ; OPTM1: jne |
752 ; OPTM1: jne | 752 ; OPTM1: jne |
753 ; OPTM1: call | 753 ; OPTM1: call |
754 | 754 |
755 define internal void @icmpGt64(i64 %a, i64 %b, i64 %c, i64 %d) { | 755 define internal void @icmpGt64(i64 %a, i64 %b, i64 %c, i64 %d) { |
756 entry: | 756 entry: |
757 %cmp = icmp ugt i64 %a, %b | 757 %cmp = icmp ugt i64 %a, %b |
758 br i1 %cmp, label %if.then, label %if.end | 758 br i1 %cmp, label %if.then, label %if.end |
759 | 759 |
760 if.then: ; preds = %entry | 760 if.then: ; preds = %entry |
761 call void @func() | 761 call void @func() |
762 br label %if.end | 762 br label %if.end |
763 | 763 |
764 if.end: ; preds = %if.then, %entry | 764 if.end: ; preds = %if.then, %entry |
765 %cmp1 = icmp sgt i64 %c, %d | 765 %cmp1 = icmp sgt i64 %c, %d |
766 br i1 %cmp1, label %if.then2, label %if.end3 | 766 br i1 %cmp1, label %if.then2, label %if.end3 |
767 | 767 |
768 if.then2: ; preds = %if.end | 768 if.then2: ; preds = %if.end |
769 call void @func() | 769 call void @func() |
770 br label %if.end3 | 770 br label %if.end3 |
771 | 771 |
772 if.end3: ; preds = %if.then2, %if.end | 772 if.end3: ; preds = %if.then2, %if.end |
773 ret void | 773 ret void |
774 } | 774 } |
775 ; CHECK: icmpGt64: | 775 ; CHECK-LABEL: icmpGt64 |
776 ; CHECK: ja | 776 ; CHECK: ja |
777 ; CHECK: jb | 777 ; CHECK: jb |
778 ; CHECK: ja | 778 ; CHECK: ja |
779 ; CHECK: call | 779 ; CHECK: call |
780 ; CHECK: jg | 780 ; CHECK: jg |
781 ; CHECK: jl | 781 ; CHECK: jl |
782 ; CHECK: ja | 782 ; CHECK: ja |
783 ; CHECK: call | 783 ; CHECK: call |
784 ; | 784 ; |
785 ; OPTM1: icmpGt64: | 785 ; OPTM1-LABEL: icmpGt64 |
786 ; OPTM1: ja | 786 ; OPTM1: ja |
787 ; OPTM1: jb | 787 ; OPTM1: jb |
788 ; OPTM1: ja | 788 ; OPTM1: ja |
789 ; OPTM1: call | 789 ; OPTM1: call |
790 ; OPTM1: jg | 790 ; OPTM1: jg |
791 ; OPTM1: jl | 791 ; OPTM1: jl |
792 ; OPTM1: ja | 792 ; OPTM1: ja |
793 ; OPTM1: call | 793 ; OPTM1: call |
794 | 794 |
795 define internal void @icmpGe64(i64 %a, i64 %b, i64 %c, i64 %d) { | 795 define internal void @icmpGe64(i64 %a, i64 %b, i64 %c, i64 %d) { |
796 entry: | 796 entry: |
797 %cmp = icmp uge i64 %a, %b | 797 %cmp = icmp uge i64 %a, %b |
798 br i1 %cmp, label %if.then, label %if.end | 798 br i1 %cmp, label %if.then, label %if.end |
799 | 799 |
800 if.then: ; preds = %entry | 800 if.then: ; preds = %entry |
801 call void @func() | 801 call void @func() |
802 br label %if.end | 802 br label %if.end |
803 | 803 |
804 if.end: ; preds = %if.then, %entry | 804 if.end: ; preds = %if.then, %entry |
805 %cmp1 = icmp sge i64 %c, %d | 805 %cmp1 = icmp sge i64 %c, %d |
806 br i1 %cmp1, label %if.then2, label %if.end3 | 806 br i1 %cmp1, label %if.then2, label %if.end3 |
807 | 807 |
808 if.then2: ; preds = %if.end | 808 if.then2: ; preds = %if.end |
809 call void @func() | 809 call void @func() |
810 br label %if.end3 | 810 br label %if.end3 |
811 | 811 |
812 if.end3: ; preds = %if.end, %if.then2 | 812 if.end3: ; preds = %if.end, %if.then2 |
813 ret void | 813 ret void |
814 } | 814 } |
815 ; CHECK: icmpGe64: | 815 ; CHECK-LABEL: icmpGe64 |
816 ; CHECK: ja | 816 ; CHECK: ja |
817 ; CHECK: jb | 817 ; CHECK: jb |
818 ; CHECK: jae | 818 ; CHECK: jae |
819 ; CHECK: call | 819 ; CHECK: call |
820 ; CHECK: jg | 820 ; CHECK: jg |
821 ; CHECK: jl | 821 ; CHECK: jl |
822 ; CHECK: jae | 822 ; CHECK: jae |
823 ; CHECK: call | 823 ; CHECK: call |
824 ; | 824 ; |
825 ; OPTM1: icmpGe64: | 825 ; OPTM1-LABEL: icmpGe64 |
826 ; OPTM1: ja | 826 ; OPTM1: ja |
827 ; OPTM1: jb | 827 ; OPTM1: jb |
828 ; OPTM1: jae | 828 ; OPTM1: jae |
829 ; OPTM1: call | 829 ; OPTM1: call |
830 ; OPTM1: jg | 830 ; OPTM1: jg |
831 ; OPTM1: jl | 831 ; OPTM1: jl |
832 ; OPTM1: jae | 832 ; OPTM1: jae |
833 ; OPTM1: call | 833 ; OPTM1: call |
834 | 834 |
835 define internal void @icmpLt64(i64 %a, i64 %b, i64 %c, i64 %d) { | 835 define internal void @icmpLt64(i64 %a, i64 %b, i64 %c, i64 %d) { |
836 entry: | 836 entry: |
837 %cmp = icmp ult i64 %a, %b | 837 %cmp = icmp ult i64 %a, %b |
838 br i1 %cmp, label %if.then, label %if.end | 838 br i1 %cmp, label %if.then, label %if.end |
839 | 839 |
840 if.then: ; preds = %entry | 840 if.then: ; preds = %entry |
841 call void @func() | 841 call void @func() |
842 br label %if.end | 842 br label %if.end |
843 | 843 |
844 if.end: ; preds = %if.then, %entry | 844 if.end: ; preds = %if.then, %entry |
845 %cmp1 = icmp slt i64 %c, %d | 845 %cmp1 = icmp slt i64 %c, %d |
846 br i1 %cmp1, label %if.then2, label %if.end3 | 846 br i1 %cmp1, label %if.then2, label %if.end3 |
847 | 847 |
848 if.then2: ; preds = %if.end | 848 if.then2: ; preds = %if.end |
849 call void @func() | 849 call void @func() |
850 br label %if.end3 | 850 br label %if.end3 |
851 | 851 |
852 if.end3: ; preds = %if.then2, %if.end | 852 if.end3: ; preds = %if.then2, %if.end |
853 ret void | 853 ret void |
854 } | 854 } |
855 ; CHECK: icmpLt64: | 855 ; CHECK-LABEL: icmpLt64 |
856 ; CHECK: jb | 856 ; CHECK: jb |
857 ; CHECK: ja | 857 ; CHECK: ja |
858 ; CHECK: jb | 858 ; CHECK: jb |
859 ; CHECK: call | 859 ; CHECK: call |
860 ; CHECK: jl | 860 ; CHECK: jl |
861 ; CHECK: jg | 861 ; CHECK: jg |
862 ; CHECK: jb | 862 ; CHECK: jb |
863 ; CHECK: call | 863 ; CHECK: call |
864 ; | 864 ; |
865 ; OPTM1: icmpLt64: | 865 ; OPTM1-LABEL: icmpLt64 |
866 ; OPTM1: jb | 866 ; OPTM1: jb |
867 ; OPTM1: ja | 867 ; OPTM1: ja |
868 ; OPTM1: jb | 868 ; OPTM1: jb |
869 ; OPTM1: call | 869 ; OPTM1: call |
870 ; OPTM1: jl | 870 ; OPTM1: jl |
871 ; OPTM1: jg | 871 ; OPTM1: jg |
872 ; OPTM1: jb | 872 ; OPTM1: jb |
873 ; OPTM1: call | 873 ; OPTM1: call |
874 | 874 |
875 define internal void @icmpLe64(i64 %a, i64 %b, i64 %c, i64 %d) { | 875 define internal void @icmpLe64(i64 %a, i64 %b, i64 %c, i64 %d) { |
876 entry: | 876 entry: |
877 %cmp = icmp ule i64 %a, %b | 877 %cmp = icmp ule i64 %a, %b |
878 br i1 %cmp, label %if.then, label %if.end | 878 br i1 %cmp, label %if.then, label %if.end |
879 | 879 |
880 if.then: ; preds = %entry | 880 if.then: ; preds = %entry |
881 call void @func() | 881 call void @func() |
882 br label %if.end | 882 br label %if.end |
883 | 883 |
884 if.end: ; preds = %if.then, %entry | 884 if.end: ; preds = %if.then, %entry |
885 %cmp1 = icmp sle i64 %c, %d | 885 %cmp1 = icmp sle i64 %c, %d |
886 br i1 %cmp1, label %if.then2, label %if.end3 | 886 br i1 %cmp1, label %if.then2, label %if.end3 |
887 | 887 |
888 if.then2: ; preds = %if.end | 888 if.then2: ; preds = %if.end |
889 call void @func() | 889 call void @func() |
890 br label %if.end3 | 890 br label %if.end3 |
891 | 891 |
892 if.end3: ; preds = %if.end, %if.then2 | 892 if.end3: ; preds = %if.end, %if.then2 |
893 ret void | 893 ret void |
894 } | 894 } |
895 ; CHECK: icmpLe64: | 895 ; CHECK-LABEL: icmpLe64 |
896 ; CHECK: jb | 896 ; CHECK: jb |
897 ; CHECK: ja | 897 ; CHECK: ja |
898 ; CHECK: jbe | 898 ; CHECK: jbe |
899 ; CHECK: call | 899 ; CHECK: call |
900 ; CHECK: jl | 900 ; CHECK: jl |
901 ; CHECK: jg | 901 ; CHECK: jg |
902 ; CHECK: jbe | 902 ; CHECK: jbe |
903 ; CHECK: call | 903 ; CHECK: call |
904 ; | 904 ; |
905 ; OPTM1: icmpLe64: | 905 ; OPTM1-LABEL: icmpLe64 |
906 ; OPTM1: jb | 906 ; OPTM1: jb |
907 ; OPTM1: ja | 907 ; OPTM1: ja |
908 ; OPTM1: jbe | 908 ; OPTM1: jbe |
909 ; OPTM1: call | 909 ; OPTM1: call |
910 ; OPTM1: jl | 910 ; OPTM1: jl |
911 ; OPTM1: jg | 911 ; OPTM1: jg |
912 ; OPTM1: jbe | 912 ; OPTM1: jbe |
913 ; OPTM1: call | 913 ; OPTM1: call |
914 | 914 |
915 define internal i32 @icmpEq64Bool(i64 %a, i64 %b) { | 915 define internal i32 @icmpEq64Bool(i64 %a, i64 %b) { |
916 entry: | 916 entry: |
917 %cmp = icmp eq i64 %a, %b | 917 %cmp = icmp eq i64 %a, %b |
918 %cmp.ret_ext = zext i1 %cmp to i32 | 918 %cmp.ret_ext = zext i1 %cmp to i32 |
919 ret i32 %cmp.ret_ext | 919 ret i32 %cmp.ret_ext |
920 } | 920 } |
921 ; CHECK: icmpEq64Bool: | 921 ; CHECK-LABEL: icmpEq64Bool |
922 ; CHECK: jne | 922 ; CHECK: jne |
923 ; CHECK: jne | 923 ; CHECK: jne |
924 ; | 924 ; |
925 ; OPTM1: icmpEq64Bool: | 925 ; OPTM1-LABEL: icmpEq64Bool |
926 ; OPTM1: jne | 926 ; OPTM1: jne |
927 ; OPTM1: jne | 927 ; OPTM1: jne |
928 | 928 |
929 define internal i32 @icmpNe64Bool(i64 %a, i64 %b) { | 929 define internal i32 @icmpNe64Bool(i64 %a, i64 %b) { |
930 entry: | 930 entry: |
931 %cmp = icmp ne i64 %a, %b | 931 %cmp = icmp ne i64 %a, %b |
932 %cmp.ret_ext = zext i1 %cmp to i32 | 932 %cmp.ret_ext = zext i1 %cmp to i32 |
933 ret i32 %cmp.ret_ext | 933 ret i32 %cmp.ret_ext |
934 } | 934 } |
935 ; CHECK: icmpNe64Bool: | 935 ; CHECK-LABEL: icmpNe64Bool |
936 ; CHECK: jne | 936 ; CHECK: jne |
937 ; CHECK: jne | 937 ; CHECK: jne |
938 ; | 938 ; |
939 ; OPTM1: icmpNe64Bool: | 939 ; OPTM1-LABEL: icmpNe64Bool |
940 ; OPTM1: jne | 940 ; OPTM1: jne |
941 ; OPTM1: jne | 941 ; OPTM1: jne |
942 | 942 |
943 define internal i32 @icmpSgt64Bool(i64 %a, i64 %b) { | 943 define internal i32 @icmpSgt64Bool(i64 %a, i64 %b) { |
944 entry: | 944 entry: |
945 %cmp = icmp sgt i64 %a, %b | 945 %cmp = icmp sgt i64 %a, %b |
946 %cmp.ret_ext = zext i1 %cmp to i32 | 946 %cmp.ret_ext = zext i1 %cmp to i32 |
947 ret i32 %cmp.ret_ext | 947 ret i32 %cmp.ret_ext |
948 } | 948 } |
949 ; CHECK: icmpSgt64Bool: | 949 ; CHECK-LABEL: icmpSgt64Bool |
950 ; CHECK: cmp | 950 ; CHECK: cmp |
951 ; CHECK: jg | 951 ; CHECK: jg |
952 ; CHECK: jl | 952 ; CHECK: jl |
953 ; CHECK: cmp | 953 ; CHECK: cmp |
954 ; CHECK: ja | 954 ; CHECK: ja |
955 ; | 955 ; |
956 ; OPTM1: icmpSgt64Bool: | 956 ; OPTM1-LABEL: icmpSgt64Bool |
957 ; OPTM1: cmp | 957 ; OPTM1: cmp |
958 ; OPTM1: jg | 958 ; OPTM1: jg |
959 ; OPTM1: jl | 959 ; OPTM1: jl |
960 ; OPTM1: cmp | 960 ; OPTM1: cmp |
961 ; OPTM1: ja | 961 ; OPTM1: ja |
962 | 962 |
963 define internal i32 @icmpUgt64Bool(i64 %a, i64 %b) { | 963 define internal i32 @icmpUgt64Bool(i64 %a, i64 %b) { |
964 entry: | 964 entry: |
965 %cmp = icmp ugt i64 %a, %b | 965 %cmp = icmp ugt i64 %a, %b |
966 %cmp.ret_ext = zext i1 %cmp to i32 | 966 %cmp.ret_ext = zext i1 %cmp to i32 |
967 ret i32 %cmp.ret_ext | 967 ret i32 %cmp.ret_ext |
968 } | 968 } |
969 ; CHECK: icmpUgt64Bool: | 969 ; CHECK-LABEL: icmpUgt64Bool |
970 ; CHECK: cmp | 970 ; CHECK: cmp |
971 ; CHECK: ja | 971 ; CHECK: ja |
972 ; CHECK: jb | 972 ; CHECK: jb |
973 ; CHECK: cmp | 973 ; CHECK: cmp |
974 ; CHECK: ja | 974 ; CHECK: ja |
975 ; | 975 ; |
976 ; OPTM1: icmpUgt64Bool: | 976 ; OPTM1-LABEL: icmpUgt64Bool |
977 ; OPTM1: cmp | 977 ; OPTM1: cmp |
978 ; OPTM1: ja | 978 ; OPTM1: ja |
979 ; OPTM1: jb | 979 ; OPTM1: jb |
980 ; OPTM1: cmp | 980 ; OPTM1: cmp |
981 ; OPTM1: ja | 981 ; OPTM1: ja |
982 | 982 |
983 define internal i32 @icmpSge64Bool(i64 %a, i64 %b) { | 983 define internal i32 @icmpSge64Bool(i64 %a, i64 %b) { |
984 entry: | 984 entry: |
985 %cmp = icmp sge i64 %a, %b | 985 %cmp = icmp sge i64 %a, %b |
986 %cmp.ret_ext = zext i1 %cmp to i32 | 986 %cmp.ret_ext = zext i1 %cmp to i32 |
987 ret i32 %cmp.ret_ext | 987 ret i32 %cmp.ret_ext |
988 } | 988 } |
989 ; CHECK: icmpSge64Bool: | 989 ; CHECK-LABEL: icmpSge64Bool |
990 ; CHECK: cmp | 990 ; CHECK: cmp |
991 ; CHECK: jg | 991 ; CHECK: jg |
992 ; CHECK: jl | 992 ; CHECK: jl |
993 ; CHECK: cmp | 993 ; CHECK: cmp |
994 ; CHECK: jae | 994 ; CHECK: jae |
995 ; | 995 ; |
996 ; OPTM1: icmpSge64Bool: | 996 ; OPTM1-LABEL: icmpSge64Bool |
997 ; OPTM1: cmp | 997 ; OPTM1: cmp |
998 ; OPTM1: jg | 998 ; OPTM1: jg |
999 ; OPTM1: jl | 999 ; OPTM1: jl |
1000 ; OPTM1: cmp | 1000 ; OPTM1: cmp |
1001 ; OPTM1: jae | 1001 ; OPTM1: jae |
1002 | 1002 |
1003 define internal i32 @icmpUge64Bool(i64 %a, i64 %b) { | 1003 define internal i32 @icmpUge64Bool(i64 %a, i64 %b) { |
1004 entry: | 1004 entry: |
1005 %cmp = icmp uge i64 %a, %b | 1005 %cmp = icmp uge i64 %a, %b |
1006 %cmp.ret_ext = zext i1 %cmp to i32 | 1006 %cmp.ret_ext = zext i1 %cmp to i32 |
1007 ret i32 %cmp.ret_ext | 1007 ret i32 %cmp.ret_ext |
1008 } | 1008 } |
1009 ; CHECK: icmpUge64Bool: | 1009 ; CHECK-LABEL: icmpUge64Bool |
1010 ; CHECK: cmp | 1010 ; CHECK: cmp |
1011 ; CHECK: ja | 1011 ; CHECK: ja |
1012 ; CHECK: jb | 1012 ; CHECK: jb |
1013 ; CHECK: cmp | 1013 ; CHECK: cmp |
1014 ; CHECK: jae | 1014 ; CHECK: jae |
1015 ; | 1015 ; |
1016 ; OPTM1: icmpUge64Bool: | 1016 ; OPTM1-LABEL: icmpUge64Bool |
1017 ; OPTM1: cmp | 1017 ; OPTM1: cmp |
1018 ; OPTM1: ja | 1018 ; OPTM1: ja |
1019 ; OPTM1: jb | 1019 ; OPTM1: jb |
1020 ; OPTM1: cmp | 1020 ; OPTM1: cmp |
1021 ; OPTM1: jae | 1021 ; OPTM1: jae |
1022 | 1022 |
1023 define internal i32 @icmpSlt64Bool(i64 %a, i64 %b) { | 1023 define internal i32 @icmpSlt64Bool(i64 %a, i64 %b) { |
1024 entry: | 1024 entry: |
1025 %cmp = icmp slt i64 %a, %b | 1025 %cmp = icmp slt i64 %a, %b |
1026 %cmp.ret_ext = zext i1 %cmp to i32 | 1026 %cmp.ret_ext = zext i1 %cmp to i32 |
1027 ret i32 %cmp.ret_ext | 1027 ret i32 %cmp.ret_ext |
1028 } | 1028 } |
1029 ; CHECK: icmpSlt64Bool: | 1029 ; CHECK-LABEL: icmpSlt64Bool |
1030 ; CHECK: cmp | 1030 ; CHECK: cmp |
1031 ; CHECK: jl | 1031 ; CHECK: jl |
1032 ; CHECK: jg | 1032 ; CHECK: jg |
1033 ; CHECK: cmp | 1033 ; CHECK: cmp |
1034 ; CHECK: jb | 1034 ; CHECK: jb |
1035 ; | 1035 ; |
1036 ; OPTM1: icmpSlt64Bool: | 1036 ; OPTM1-LABEL: icmpSlt64Bool |
1037 ; OPTM1: cmp | 1037 ; OPTM1: cmp |
1038 ; OPTM1: jl | 1038 ; OPTM1: jl |
1039 ; OPTM1: jg | 1039 ; OPTM1: jg |
1040 ; OPTM1: cmp | 1040 ; OPTM1: cmp |
1041 ; OPTM1: jb | 1041 ; OPTM1: jb |
1042 | 1042 |
1043 define internal i32 @icmpUlt64Bool(i64 %a, i64 %b) { | 1043 define internal i32 @icmpUlt64Bool(i64 %a, i64 %b) { |
1044 entry: | 1044 entry: |
1045 %cmp = icmp ult i64 %a, %b | 1045 %cmp = icmp ult i64 %a, %b |
1046 %cmp.ret_ext = zext i1 %cmp to i32 | 1046 %cmp.ret_ext = zext i1 %cmp to i32 |
1047 ret i32 %cmp.ret_ext | 1047 ret i32 %cmp.ret_ext |
1048 } | 1048 } |
1049 ; CHECK: icmpUlt64Bool: | 1049 ; CHECK-LABEL: icmpUlt64Bool |
1050 ; CHECK: cmp | 1050 ; CHECK: cmp |
1051 ; CHECK: jb | 1051 ; CHECK: jb |
1052 ; CHECK: ja | 1052 ; CHECK: ja |
1053 ; CHECK: cmp | 1053 ; CHECK: cmp |
1054 ; CHECK: jb | 1054 ; CHECK: jb |
1055 ; | 1055 ; |
1056 ; OPTM1: icmpUlt64Bool: | 1056 ; OPTM1-LABEL: icmpUlt64Bool |
1057 ; OPTM1: cmp | 1057 ; OPTM1: cmp |
1058 ; OPTM1: jb | 1058 ; OPTM1: jb |
1059 ; OPTM1: ja | 1059 ; OPTM1: ja |
1060 ; OPTM1: cmp | 1060 ; OPTM1: cmp |
1061 ; OPTM1: jb | 1061 ; OPTM1: jb |
1062 | 1062 |
1063 define internal i32 @icmpSle64Bool(i64 %a, i64 %b) { | 1063 define internal i32 @icmpSle64Bool(i64 %a, i64 %b) { |
1064 entry: | 1064 entry: |
1065 %cmp = icmp sle i64 %a, %b | 1065 %cmp = icmp sle i64 %a, %b |
1066 %cmp.ret_ext = zext i1 %cmp to i32 | 1066 %cmp.ret_ext = zext i1 %cmp to i32 |
1067 ret i32 %cmp.ret_ext | 1067 ret i32 %cmp.ret_ext |
1068 } | 1068 } |
1069 ; CHECK: icmpSle64Bool: | 1069 ; CHECK-LABEL: icmpSle64Bool |
1070 ; CHECK: cmp | 1070 ; CHECK: cmp |
1071 ; CHECK: jl | 1071 ; CHECK: jl |
1072 ; CHECK: jg | 1072 ; CHECK: jg |
1073 ; CHECK: cmp | 1073 ; CHECK: cmp |
1074 ; CHECK: jbe | 1074 ; CHECK: jbe |
1075 ; | 1075 ; |
1076 ; OPTM1: icmpSle64Bool: | 1076 ; OPTM1-LABEL: icmpSle64Bool |
1077 ; OPTM1: cmp | 1077 ; OPTM1: cmp |
1078 ; OPTM1: jl | 1078 ; OPTM1: jl |
1079 ; OPTM1: jg | 1079 ; OPTM1: jg |
1080 ; OPTM1: cmp | 1080 ; OPTM1: cmp |
1081 ; OPTM1: jbe | 1081 ; OPTM1: jbe |
1082 | 1082 |
1083 define internal i32 @icmpUle64Bool(i64 %a, i64 %b) { | 1083 define internal i32 @icmpUle64Bool(i64 %a, i64 %b) { |
1084 entry: | 1084 entry: |
1085 %cmp = icmp ule i64 %a, %b | 1085 %cmp = icmp ule i64 %a, %b |
1086 %cmp.ret_ext = zext i1 %cmp to i32 | 1086 %cmp.ret_ext = zext i1 %cmp to i32 |
1087 ret i32 %cmp.ret_ext | 1087 ret i32 %cmp.ret_ext |
1088 } | 1088 } |
1089 ; CHECK: icmpUle64Bool: | 1089 ; CHECK-LABEL: icmpUle64Bool |
1090 ; CHECK: cmp | 1090 ; CHECK: cmp |
1091 ; CHECK: jb | 1091 ; CHECK: jb |
1092 ; CHECK: ja | 1092 ; CHECK: ja |
1093 ; CHECK: cmp | 1093 ; CHECK: cmp |
1094 ; CHECK: jbe | 1094 ; CHECK: jbe |
1095 ; | 1095 ; |
1096 ; OPTM1: icmpUle64Bool: | 1096 ; OPTM1-LABEL: icmpUle64Bool |
1097 ; OPTM1: cmp | 1097 ; OPTM1: cmp |
1098 ; OPTM1: jb | 1098 ; OPTM1: jb |
1099 ; OPTM1: ja | 1099 ; OPTM1: ja |
1100 ; OPTM1: cmp | 1100 ; OPTM1: cmp |
1101 ; OPTM1: jbe | 1101 ; OPTM1: jbe |
1102 | 1102 |
1103 define internal i64 @load64(i32 %a) { | 1103 define internal i64 @load64(i32 %a) { |
1104 entry: | 1104 entry: |
1105 %__1 = inttoptr i32 %a to i64* | 1105 %__1 = inttoptr i32 %a to i64* |
1106 %v0 = load i64* %__1, align 1 | 1106 %v0 = load i64* %__1, align 1 |
1107 ret i64 %v0 | 1107 ret i64 %v0 |
1108 } | 1108 } |
1109 ; CHECK: load64: | 1109 ; CHECK-LABEL: load64 |
1110 ; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp+4] | 1110 ; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp+4] |
1111 ; CHECK-NEXT: mov {{.*}}, dword ptr [e[[REGISTER]]] | 1111 ; CHECK-NEXT: mov {{.*}}, dword ptr [e[[REGISTER]]] |
1112 ; CHECK-NEXT: mov {{.*}}, dword ptr [e[[REGISTER]]+4] | 1112 ; CHECK-NEXT: mov {{.*}}, dword ptr [e[[REGISTER]]+4] |
1113 ; | 1113 ; |
1114 ; OPTM1: load64: | 1114 ; OPTM1-LABEL: load64 |
1115 ; OPTM1: mov e{{..}}, dword ptr [e{{..}}] | 1115 ; OPTM1: mov e{{..}}, dword ptr [e{{..}}] |
1116 ; OPTM1: mov e{{..}}, dword ptr [e{{..}}+4] | 1116 ; OPTM1: mov e{{..}}, dword ptr [e{{..}}+4] |
1117 | 1117 |
1118 define internal void @store64(i32 %a, i64 %value) { | 1118 define internal void @store64(i32 %a, i64 %value) { |
1119 entry: | 1119 entry: |
1120 %__2 = inttoptr i32 %a to i64* | 1120 %__2 = inttoptr i32 %a to i64* |
1121 store i64 %value, i64* %__2, align 1 | 1121 store i64 %value, i64* %__2, align 1 |
1122 ret void | 1122 ret void |
1123 } | 1123 } |
1124 ; CHECK: store64: | 1124 ; CHECK-LABEL: store64 |
1125 ; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp+4] | 1125 ; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp+4] |
1126 ; CHECK: mov dword ptr [e[[REGISTER]]+4], | 1126 ; CHECK: mov dword ptr [e[[REGISTER]]+4], |
1127 ; CHECK: mov dword ptr [e[[REGISTER]]], | 1127 ; CHECK: mov dword ptr [e[[REGISTER]]], |
1128 ; | 1128 ; |
1129 ; OPTM1: store64: | 1129 ; OPTM1-LABEL: store64 |
1130 ; OPTM1: mov dword ptr [e[[REGISTER:[a-z]+]]+4], | 1130 ; OPTM1: mov dword ptr [e[[REGISTER:[a-z]+]]+4], |
1131 ; OPTM1: mov dword ptr [e[[REGISTER]]], | 1131 ; OPTM1: mov dword ptr [e[[REGISTER]]], |
1132 | 1132 |
1133 define internal void @store64Const(i32 %a) { | 1133 define internal void @store64Const(i32 %a) { |
1134 entry: | 1134 entry: |
1135 %a.asptr = inttoptr i32 %a to i64* | 1135 %a.asptr = inttoptr i32 %a to i64* |
1136 store i64 -2401053092306725256, i64* %a.asptr, align 1 | 1136 store i64 -2401053092306725256, i64* %a.asptr, align 1 |
1137 ret void | 1137 ret void |
1138 } | 1138 } |
1139 ; CHECK: store64Const: | 1139 ; CHECK-LABEL: store64Const |
1140 ; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp+4] | 1140 ; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp+4] |
1141 ; CHECK: mov dword ptr [e[[REGISTER]]+4], 3735928559 | 1141 ; CHECK: mov dword ptr [e[[REGISTER]]+4], 3735928559 |
1142 ; CHECK: mov dword ptr [e[[REGISTER]]], 305419896 | 1142 ; CHECK: mov dword ptr [e[[REGISTER]]], 305419896 |
1143 ; | 1143 ; |
1144 ; OPTM1: store64Const: | 1144 ; OPTM1-LABEL: store64Const |
1145 ; OPTM1: mov dword ptr [e[[REGISTER:[a-z]+]]+4], 3735928559 | 1145 ; OPTM1: mov dword ptr [e[[REGISTER:[a-z]+]]+4], 3735928559 |
1146 ; OPTM1: mov dword ptr [e[[REGISTER]]], 305419896 | 1146 ; OPTM1: mov dword ptr [e[[REGISTER]]], 305419896 |
1147 | 1147 |
1148 define internal i64 @select64VarVar(i64 %a, i64 %b) { | 1148 define internal i64 @select64VarVar(i64 %a, i64 %b) { |
1149 entry: | 1149 entry: |
1150 %cmp = icmp ult i64 %a, %b | 1150 %cmp = icmp ult i64 %a, %b |
1151 %cond = select i1 %cmp, i64 %a, i64 %b | 1151 %cond = select i1 %cmp, i64 %a, i64 %b |
1152 ret i64 %cond | 1152 ret i64 %cond |
1153 } | 1153 } |
1154 ; CHECK: select64VarVar: | 1154 ; CHECK-LABEL: select64VarVar |
1155 ; CHECK: cmp | 1155 ; CHECK: cmp |
1156 ; CHECK: jb | 1156 ; CHECK: jb |
1157 ; CHECK: ja | 1157 ; CHECK: ja |
1158 ; CHECK: cmp | 1158 ; CHECK: cmp |
1159 ; CHECK: jb | 1159 ; CHECK: jb |
1160 ; CHECK: cmp | 1160 ; CHECK: cmp |
1161 ; CHECK: jne | 1161 ; CHECK: jne |
1162 ; | 1162 ; |
1163 ; OPTM1: select64VarVar: | 1163 ; OPTM1-LABEL: select64VarVar |
1164 ; OPTM1: cmp | 1164 ; OPTM1: cmp |
1165 ; OPTM1: jb | 1165 ; OPTM1: jb |
1166 ; OPTM1: ja | 1166 ; OPTM1: ja |
1167 ; OPTM1: cmp | 1167 ; OPTM1: cmp |
1168 ; OPTM1: jb | 1168 ; OPTM1: jb |
1169 ; OPTM1: cmp | 1169 ; OPTM1: cmp |
1170 ; OPTM1: jne | 1170 ; OPTM1: jne |
1171 | 1171 |
1172 define internal i64 @select64VarConst(i64 %a, i64 %b) { | 1172 define internal i64 @select64VarConst(i64 %a, i64 %b) { |
1173 entry: | 1173 entry: |
1174 %cmp = icmp ult i64 %a, %b | 1174 %cmp = icmp ult i64 %a, %b |
1175 %cond = select i1 %cmp, i64 %a, i64 -2401053092306725256 | 1175 %cond = select i1 %cmp, i64 %a, i64 -2401053092306725256 |
1176 ret i64 %cond | 1176 ret i64 %cond |
1177 } | 1177 } |
1178 ; CHECK: select64VarConst: | 1178 ; CHECK-LABEL: select64VarConst |
1179 ; CHECK: cmp | 1179 ; CHECK: cmp |
1180 ; CHECK: jb | 1180 ; CHECK: jb |
1181 ; CHECK: ja | 1181 ; CHECK: ja |
1182 ; CHECK: cmp | 1182 ; CHECK: cmp |
1183 ; CHECK: jb | 1183 ; CHECK: jb |
1184 ; CHECK: cmp | 1184 ; CHECK: cmp |
1185 ; CHECK: jne | 1185 ; CHECK: jne |
1186 ; | 1186 ; |
1187 ; OPTM1: select64VarConst: | 1187 ; OPTM1-LABEL: select64VarConst |
1188 ; OPTM1: cmp | 1188 ; OPTM1: cmp |
1189 ; OPTM1: jb | 1189 ; OPTM1: jb |
1190 ; OPTM1: ja | 1190 ; OPTM1: ja |
1191 ; OPTM1: cmp | 1191 ; OPTM1: cmp |
1192 ; OPTM1: jb | 1192 ; OPTM1: jb |
1193 ; OPTM1: cmp | 1193 ; OPTM1: cmp |
1194 ; OPTM1: jne | 1194 ; OPTM1: jne |
1195 | 1195 |
1196 define internal i64 @select64ConstVar(i64 %a, i64 %b) { | 1196 define internal i64 @select64ConstVar(i64 %a, i64 %b) { |
1197 entry: | 1197 entry: |
1198 %cmp = icmp ult i64 %a, %b | 1198 %cmp = icmp ult i64 %a, %b |
1199 %cond = select i1 %cmp, i64 -2401053092306725256, i64 %b | 1199 %cond = select i1 %cmp, i64 -2401053092306725256, i64 %b |
1200 ret i64 %cond | 1200 ret i64 %cond |
1201 } | 1201 } |
1202 ; CHECK: select64ConstVar: | 1202 ; CHECK-LABEL: select64ConstVar |
1203 ; CHECK: cmp | 1203 ; CHECK: cmp |
1204 ; CHECK: jb | 1204 ; CHECK: jb |
1205 ; CHECK: ja | 1205 ; CHECK: ja |
1206 ; CHECK: cmp | 1206 ; CHECK: cmp |
1207 ; CHECK: jb | 1207 ; CHECK: jb |
1208 ; CHECK: cmp | 1208 ; CHECK: cmp |
1209 ; CHECK: jne | 1209 ; CHECK: jne |
1210 ; | 1210 ; |
1211 ; OPTM1: select64ConstVar: | 1211 ; OPTM1-LABEL: select64ConstVar |
1212 ; OPTM1: cmp | 1212 ; OPTM1: cmp |
1213 ; OPTM1: jb | 1213 ; OPTM1: jb |
1214 ; OPTM1: ja | 1214 ; OPTM1: ja |
1215 ; OPTM1: cmp | 1215 ; OPTM1: cmp |
1216 ; OPTM1: jb | 1216 ; OPTM1: jb |
1217 ; OPTM1: cmp | 1217 ; OPTM1: cmp |
1218 ; OPTM1: jne | 1218 ; OPTM1: jne |
1219 | 1219 |
| 1220 define internal void @icmpEq64Imm() { |
| 1221 entry: |
| 1222 %cmp = icmp eq i64 123, 234 |
| 1223 br i1 %cmp, label %if.then, label %if.end |
| 1224 |
| 1225 if.then: ; preds = %entry |
| 1226 call void @func() |
| 1227 br label %if.end |
| 1228 |
| 1229 if.end: ; preds = %if.then, %entry |
| 1230 %cmp1 = icmp eq i64 345, 456 |
| 1231 br i1 %cmp1, label %if.then2, label %if.end3 |
| 1232 |
| 1233 if.then2: ; preds = %if.end |
| 1234 call void @func() |
| 1235 br label %if.end3 |
| 1236 |
| 1237 if.end3: ; preds = %if.then2, %if.end |
| 1238 ret void |
| 1239 } |
| 1240 ; The following checks are not strictly necessary since one of the RUN |
| 1241 ; lines actually runs the output through the assembler. |
| 1242 ; CHECK-LABEL: icmpEq64Imm |
| 1243 ; CHECK-NOT: cmp {{[0-9]+}}, |
| 1244 ; OPTM1-LABEL: icmpEq64Imm |
| 1245 ; OPTM1-LABEL-NOT: cmp {{[0-9]+}}, |
| 1246 |
| 1247 define internal void @icmpLt64Imm() { |
| 1248 entry: |
| 1249 %cmp = icmp ult i64 123, 234 |
| 1250 br i1 %cmp, label %if.then, label %if.end |
| 1251 |
| 1252 if.then: ; preds = %entry |
| 1253 call void @func() |
| 1254 br label %if.end |
| 1255 |
| 1256 if.end: ; preds = %if.then, %entry |
| 1257 %cmp1 = icmp slt i64 345, 456 |
| 1258 br i1 %cmp1, label %if.then2, label %if.end3 |
| 1259 |
| 1260 if.then2: ; preds = %if.end |
| 1261 call void @func() |
| 1262 br label %if.end3 |
| 1263 |
| 1264 if.end3: ; preds = %if.then2, %if.end |
| 1265 ret void |
| 1266 } |
| 1267 ; The following checks are not strictly necessary since one of the RUN |
| 1268 ; lines actually runs the output through the assembler. |
| 1269 ; CHECK-LABEL: icmpLt64Imm |
| 1270 ; CHECK-NOT: cmp {{[0-9]+}}, |
| 1271 ; OPTM1-LABEL: icmpLt64Imm |
| 1272 ; OPTM1-NOT: cmp {{[0-9]+}}, |
| 1273 |
1220 ; ERRORS-NOT: ICE translation error | 1274 ; ERRORS-NOT: ICE translation error |
1221 ; DUMP-NOT: SZ | 1275 ; DUMP-NOT: SZ |
OLD | NEW |