| OLD | NEW |
| 1 ; This file tests bitcasts of vector type. For most operations, these | 1 ; This file tests bitcasts of vector type. For most operations, these |
| 2 ; should be lowered to a no-op on -O2. | 2 ; should be lowered to a no-op on -O2. |
| 3 | 3 |
| 4 ; RUN: %llvm2ice -O2 --verbose none %s | FileCheck %s | 4 ; TODO(jvoung): fix extra "CALLTARGETS" run. The llvm-objdump symbolizer |
| 5 ; RUN: %llvm2ice -Om1 --verbose none %s | FileCheck %s --check-prefix=OPTM1 | 5 ; doesn't know how to symbolize non-section-local functions. |
| 6 ; The newer LLVM 3.6 one does work, but watch out for other bugs. |
| 7 |
| 6 ; RUN: %llvm2ice -O2 --verbose none %s \ | 8 ; RUN: %llvm2ice -O2 --verbose none %s \ |
| 7 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj | 9 ; RUN: | FileCheck --check-prefix=CALLTARGETS %s |
| 10 ; RUN: %llvm2ice -O2 --verbose none %s \ |
| 11 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \ |
| 12 ; RUN: | llvm-objdump -d -symbolize -x86-asm-syntax=intel - | FileCheck %s |
| 8 ; RUN: %llvm2ice -Om1 --verbose none %s \ | 13 ; RUN: %llvm2ice -Om1 --verbose none %s \ |
| 9 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj | 14 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \ |
| 15 ; RUN: | llvm-objdump -d -symbolize -x86-asm-syntax=intel - \ |
| 16 ; RUN: | FileCheck --check-prefix=OPTM1 %s |
| 10 ; RUN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s | 17 ; RUN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s |
| 11 ; RUN: %llvm2iceinsts %s | %szdiff %s | FileCheck --check-prefix=DUMP %s | 18 ; RUN: %llvm2iceinsts %s | %szdiff %s | FileCheck --check-prefix=DUMP %s |
| 12 ; RUN: %llvm2iceinsts --pnacl %s | %szdiff %s \ | 19 ; RUN: %llvm2iceinsts --pnacl %s | %szdiff %s \ |
| 13 ; RUN: | FileCheck --check-prefix=DUMP %s | 20 ; RUN: | FileCheck --check-prefix=DUMP %s |
| 14 | 21 |
| 15 define <16 x i8> @test_bitcast_v16i8_to_v16i8(<16 x i8> %arg) { | 22 define <16 x i8> @test_bitcast_v16i8_to_v16i8(<16 x i8> %arg) { |
| 16 entry: | 23 entry: |
| 17 %res = bitcast <16 x i8> %arg to <16 x i8> | 24 %res = bitcast <16 x i8> %arg to <16 x i8> |
| 18 ret <16 x i8> %res | 25 ret <16 x i8> %res |
| 19 | 26 |
| 20 ; CHECK-LABEL: test_bitcast_v16i8_to_v16i8: | 27 ; CHECK-LABEL: test_bitcast_v16i8_to_v16i8 |
| 21 ; CHECK: .L{{.*}}entry: | |
| 22 ; CHECK-NEXT: ret | 28 ; CHECK-NEXT: ret |
| 23 } | 29 } |
| 24 | 30 |
| 25 define <8 x i16> @test_bitcast_v16i8_to_v8i16(<16 x i8> %arg) { | 31 define <8 x i16> @test_bitcast_v16i8_to_v8i16(<16 x i8> %arg) { |
| 26 entry: | 32 entry: |
| 27 %res = bitcast <16 x i8> %arg to <8 x i16> | 33 %res = bitcast <16 x i8> %arg to <8 x i16> |
| 28 ret <8 x i16> %res | 34 ret <8 x i16> %res |
| 29 | 35 |
| 30 ; CHECK-LABEL: test_bitcast_v16i8_to_v8i16: | 36 ; CHECK-LABEL: test_bitcast_v16i8_to_v8i16 |
| 31 ; CHECK: .L{{.*}}entry: | |
| 32 ; CHECK-NEXT: ret | 37 ; CHECK-NEXT: ret |
| 33 } | 38 } |
| 34 | 39 |
| 35 define <4 x i32> @test_bitcast_v16i8_to_v4i32(<16 x i8> %arg) { | 40 define <4 x i32> @test_bitcast_v16i8_to_v4i32(<16 x i8> %arg) { |
| 36 entry: | 41 entry: |
| 37 %res = bitcast <16 x i8> %arg to <4 x i32> | 42 %res = bitcast <16 x i8> %arg to <4 x i32> |
| 38 ret <4 x i32> %res | 43 ret <4 x i32> %res |
| 39 | 44 |
| 40 ; CHECK-LABEL: test_bitcast_v16i8_to_v4i32: | 45 ; CHECK-LABEL: test_bitcast_v16i8_to_v4i32: |
| 41 ; CHECK: .L{{.*}}entry: | |
| 42 ; CHECK-NEXT: ret | 46 ; CHECK-NEXT: ret |
| 43 } | 47 } |
| 44 | 48 |
| 45 define <4 x float> @test_bitcast_v16i8_to_v4f32(<16 x i8> %arg) { | 49 define <4 x float> @test_bitcast_v16i8_to_v4f32(<16 x i8> %arg) { |
| 46 entry: | 50 entry: |
| 47 %res = bitcast <16 x i8> %arg to <4 x float> | 51 %res = bitcast <16 x i8> %arg to <4 x float> |
| 48 ret <4 x float> %res | 52 ret <4 x float> %res |
| 49 | 53 |
| 50 ; CHECK-LABEL: test_bitcast_v16i8_to_v4f32: | 54 ; CHECK-LABEL: test_bitcast_v16i8_to_v4f32: |
| 51 ; CHECK: .L{{.*}}entry: | |
| 52 ; CHECK-NEXT: ret | 55 ; CHECK-NEXT: ret |
| 53 } | 56 } |
| 54 | 57 |
| 55 define <16 x i8> @test_bitcast_v8i16_to_v16i8(<8 x i16> %arg) { | 58 define <16 x i8> @test_bitcast_v8i16_to_v16i8(<8 x i16> %arg) { |
| 56 entry: | 59 entry: |
| 57 %res = bitcast <8 x i16> %arg to <16 x i8> | 60 %res = bitcast <8 x i16> %arg to <16 x i8> |
| 58 ret <16 x i8> %res | 61 ret <16 x i8> %res |
| 59 | 62 |
| 60 ; CHECK-LABEL: test_bitcast_v8i16_to_v16i8: | 63 ; CHECK-LABEL: test_bitcast_v8i16_to_v16i8: |
| 61 ; CHECK: .L{{.*}}entry: | |
| 62 ; CHECK-NEXT: ret | 64 ; CHECK-NEXT: ret |
| 63 } | 65 } |
| 64 | 66 |
| 65 define <8 x i16> @test_bitcast_v8i16_to_v8i16(<8 x i16> %arg) { | 67 define <8 x i16> @test_bitcast_v8i16_to_v8i16(<8 x i16> %arg) { |
| 66 entry: | 68 entry: |
| 67 %res = bitcast <8 x i16> %arg to <8 x i16> | 69 %res = bitcast <8 x i16> %arg to <8 x i16> |
| 68 ret <8 x i16> %res | 70 ret <8 x i16> %res |
| 69 | 71 |
| 70 ; CHECK-LABEL: test_bitcast_v8i16_to_v8i16: | 72 ; CHECK-LABEL: test_bitcast_v8i16_to_v8i16: |
| 71 ; CHECK: .L{{.*}}entry: | |
| 72 ; CHECK-NEXT: ret | 73 ; CHECK-NEXT: ret |
| 73 } | 74 } |
| 74 | 75 |
| 75 define <4 x i32> @test_bitcast_v8i16_to_v4i32(<8 x i16> %arg) { | 76 define <4 x i32> @test_bitcast_v8i16_to_v4i32(<8 x i16> %arg) { |
| 76 entry: | 77 entry: |
| 77 %res = bitcast <8 x i16> %arg to <4 x i32> | 78 %res = bitcast <8 x i16> %arg to <4 x i32> |
| 78 ret <4 x i32> %res | 79 ret <4 x i32> %res |
| 79 | 80 |
| 80 ; CHECK-LABEL: test_bitcast_v8i16_to_v4i32: | 81 ; CHECK-LABEL: test_bitcast_v8i16_to_v4i32: |
| 81 ; CHECK: .L{{.*}}entry: | |
| 82 ; CHECK-NEXT: ret | 82 ; CHECK-NEXT: ret |
| 83 } | 83 } |
| 84 | 84 |
| 85 define <4 x float> @test_bitcast_v8i16_to_v4f32(<8 x i16> %arg) { | 85 define <4 x float> @test_bitcast_v8i16_to_v4f32(<8 x i16> %arg) { |
| 86 entry: | 86 entry: |
| 87 %res = bitcast <8 x i16> %arg to <4 x float> | 87 %res = bitcast <8 x i16> %arg to <4 x float> |
| 88 ret <4 x float> %res | 88 ret <4 x float> %res |
| 89 | 89 |
| 90 ; CHECK-LABEL: test_bitcast_v8i16_to_v4f32: | 90 ; CHECK-LABEL: test_bitcast_v8i16_to_v4f32: |
| 91 ; CHECK: .L{{.*}}entry: | |
| 92 ; CHECK-NEXT: ret | 91 ; CHECK-NEXT: ret |
| 93 } | 92 } |
| 94 | 93 |
| 95 define <16 x i8> @test_bitcast_v4i32_to_v16i8(<4 x i32> %arg) { | 94 define <16 x i8> @test_bitcast_v4i32_to_v16i8(<4 x i32> %arg) { |
| 96 entry: | 95 entry: |
| 97 %res = bitcast <4 x i32> %arg to <16 x i8> | 96 %res = bitcast <4 x i32> %arg to <16 x i8> |
| 98 ret <16 x i8> %res | 97 ret <16 x i8> %res |
| 99 | 98 |
| 100 ; CHECK-LABEL: test_bitcast_v4i32_to_v16i8: | 99 ; CHECK-LABEL: test_bitcast_v4i32_to_v16i8: |
| 101 ; CHECK: .L{{.*}}entry: | |
| 102 ; CHECK-NEXT: ret | 100 ; CHECK-NEXT: ret |
| 103 } | 101 } |
| 104 | 102 |
| 105 define <8 x i16> @test_bitcast_v4i32_to_v8i16(<4 x i32> %arg) { | 103 define <8 x i16> @test_bitcast_v4i32_to_v8i16(<4 x i32> %arg) { |
| 106 entry: | 104 entry: |
| 107 %res = bitcast <4 x i32> %arg to <8 x i16> | 105 %res = bitcast <4 x i32> %arg to <8 x i16> |
| 108 ret <8 x i16> %res | 106 ret <8 x i16> %res |
| 109 | 107 |
| 110 ; CHECK-LABEL: test_bitcast_v4i32_to_v8i16: | 108 ; CHECK-LABEL: test_bitcast_v4i32_to_v8i16: |
| 111 ; CHECK: .L{{.*}}entry: | |
| 112 ; CHECK-NEXT: ret | 109 ; CHECK-NEXT: ret |
| 113 } | 110 } |
| 114 | 111 |
| 115 define <4 x i32> @test_bitcast_v4i32_to_v4i32(<4 x i32> %arg) { | 112 define <4 x i32> @test_bitcast_v4i32_to_v4i32(<4 x i32> %arg) { |
| 116 entry: | 113 entry: |
| 117 %res = bitcast <4 x i32> %arg to <4 x i32> | 114 %res = bitcast <4 x i32> %arg to <4 x i32> |
| 118 ret <4 x i32> %res | 115 ret <4 x i32> %res |
| 119 | 116 |
| 120 ; CHECK-LABEL: test_bitcast_v4i32_to_v4i32: | 117 ; CHECK-LABEL: test_bitcast_v4i32_to_v4i32: |
| 121 ; CHECK: .L{{.*}}entry: | |
| 122 ; CHECK-NEXT: ret | 118 ; CHECK-NEXT: ret |
| 123 } | 119 } |
| 124 | 120 |
| 125 define <4 x float> @test_bitcast_v4i32_to_v4f32(<4 x i32> %arg) { | 121 define <4 x float> @test_bitcast_v4i32_to_v4f32(<4 x i32> %arg) { |
| 126 entry: | 122 entry: |
| 127 %res = bitcast <4 x i32> %arg to <4 x float> | 123 %res = bitcast <4 x i32> %arg to <4 x float> |
| 128 ret <4 x float> %res | 124 ret <4 x float> %res |
| 129 | 125 |
| 130 ; CHECK-LABEL: test_bitcast_v4i32_to_v4f32: | 126 ; CHECK-LABEL: test_bitcast_v4i32_to_v4f32: |
| 131 ; CHECK: .L{{.*}}entry: | |
| 132 ; CHECK-NEXT: ret | 127 ; CHECK-NEXT: ret |
| 133 } | 128 } |
| 134 | 129 |
| 135 define <16 x i8> @test_bitcast_v4f32_to_v16i8(<4 x float> %arg) { | 130 define <16 x i8> @test_bitcast_v4f32_to_v16i8(<4 x float> %arg) { |
| 136 entry: | 131 entry: |
| 137 %res = bitcast <4 x float> %arg to <16 x i8> | 132 %res = bitcast <4 x float> %arg to <16 x i8> |
| 138 ret <16 x i8> %res | 133 ret <16 x i8> %res |
| 139 | 134 |
| 140 ; CHECK-LABEL: test_bitcast_v4f32_to_v16i8: | 135 ; CHECK-LABEL: test_bitcast_v4f32_to_v16i8: |
| 141 ; CHECK: .L{{.*}}entry: | |
| 142 ; CHECK-NEXT: ret | 136 ; CHECK-NEXT: ret |
| 143 } | 137 } |
| 144 | 138 |
| 145 define <8 x i16> @test_bitcast_v4f32_to_v8i16(<4 x float> %arg) { | 139 define <8 x i16> @test_bitcast_v4f32_to_v8i16(<4 x float> %arg) { |
| 146 entry: | 140 entry: |
| 147 %res = bitcast <4 x float> %arg to <8 x i16> | 141 %res = bitcast <4 x float> %arg to <8 x i16> |
| 148 ret <8 x i16> %res | 142 ret <8 x i16> %res |
| 149 | 143 |
| 150 ; CHECK-LABEL: test_bitcast_v4f32_to_v8i16: | 144 ; CHECK-LABEL: test_bitcast_v4f32_to_v8i16: |
| 151 ; CHECK: .L{{.*}}entry: | |
| 152 ; CHECK-NEXT: ret | 145 ; CHECK-NEXT: ret |
| 153 } | 146 } |
| 154 | 147 |
| 155 define <4 x i32> @test_bitcast_v4f32_to_v4i32(<4 x float> %arg) { | 148 define <4 x i32> @test_bitcast_v4f32_to_v4i32(<4 x float> %arg) { |
| 156 entry: | 149 entry: |
| 157 %res = bitcast <4 x float> %arg to <4 x i32> | 150 %res = bitcast <4 x float> %arg to <4 x i32> |
| 158 ret <4 x i32> %res | 151 ret <4 x i32> %res |
| 159 | 152 |
| 160 ; CHECK-LABEL: test_bitcast_v4f32_to_v4i32: | 153 ; CHECK-LABEL: test_bitcast_v4f32_to_v4i32: |
| 161 ; CHECK: .L{{.*}}entry: | |
| 162 ; CHECK-NEXT: ret | 154 ; CHECK-NEXT: ret |
| 163 } | 155 } |
| 164 | 156 |
| 165 define <4 x float> @test_bitcast_v4f32_to_v4f32(<4 x float> %arg) { | 157 define <4 x float> @test_bitcast_v4f32_to_v4f32(<4 x float> %arg) { |
| 166 entry: | 158 entry: |
| 167 %res = bitcast <4 x float> %arg to <4 x float> | 159 %res = bitcast <4 x float> %arg to <4 x float> |
| 168 ret <4 x float> %res | 160 ret <4 x float> %res |
| 169 | 161 |
| 170 ; CHECK-LABEL: test_bitcast_v4f32_to_v4f32: | 162 ; CHECK-LABEL: test_bitcast_v4f32_to_v4f32: |
| 171 ; CHECK: .L{{.*}}entry: | |
| 172 ; CHECK-NEXT: ret | 163 ; CHECK-NEXT: ret |
| 173 } | 164 } |
| 174 | 165 |
| 175 define i8 @test_bitcast_v8i1_to_i8(<8 x i1> %arg) { | 166 define i8 @test_bitcast_v8i1_to_i8(<8 x i1> %arg) { |
| 176 entry: | 167 entry: |
| 177 %res = bitcast <8 x i1> %arg to i8 | 168 %res = bitcast <8 x i1> %arg to i8 |
| 178 ret i8 %res | 169 ret i8 %res |
| 179 | 170 |
| 180 ; CHECK-LABEL: test_bitcast_v8i1_to_i8: | 171 ; CHECK-LABEL: test_bitcast_v8i1_to_i8: |
| 181 ; CHECK: call Sz_bitcast_v8i1_to_i8 | 172 ; CALLTARGETS-LABEL: test_bitcast_v8i1_to_i8: |
| 173 ; CHECK: call -4 |
| 174 ; CALLTARGETS: call Sz_bitcast_v8i1_to_i8 |
| 182 | 175 |
| 183 ; OPTM1-LABEL: test_bitcast_v8i1_to_i8: | 176 ; OPTM1-LABEL: test_bitcast_v8i1_to_i8: |
| 184 ; OPMT1: call Sz_bitcast_v8i1_to_i8 | 177 ; OPMT1: call -4 |
| 185 } | 178 } |
| 186 | 179 |
| 187 define i16 @test_bitcast_v16i1_to_i16(<16 x i1> %arg) { | 180 define i16 @test_bitcast_v16i1_to_i16(<16 x i1> %arg) { |
| 188 entry: | 181 entry: |
| 189 %res = bitcast <16 x i1> %arg to i16 | 182 %res = bitcast <16 x i1> %arg to i16 |
| 190 ret i16 %res | 183 ret i16 %res |
| 191 | 184 |
| 192 ; CHECK-LABEL: test_bitcast_v16i1_to_i16: | 185 ; CHECK-LABEL: test_bitcast_v16i1_to_i16: |
| 193 ; CHECK: call Sz_bitcast_v16i1_to_i16 | 186 ; CALLTARGETS-LABEL: test_bitcast_v16i1_to_i16: |
| 187 ; CHECK: call -4 |
| 188 ; CALLTARGETS: call Sz_bitcast_v16i1_to_i16 |
| 194 | 189 |
| 195 ; OPTM1-LABEL: test_bitcast_v16i1_to_i16: | 190 ; OPTM1-LABEL: test_bitcast_v16i1_to_i16: |
| 196 ; OPMT1: call Sz_bitcast_v16i1_to_i16 | 191 ; OPMT1: call -4 |
| 197 } | 192 } |
| 198 | 193 |
| 199 define <8 x i1> @test_bitcast_i8_to_v8i1(i32 %arg) { | 194 define <8 x i1> @test_bitcast_i8_to_v8i1(i32 %arg) { |
| 200 entry: | 195 entry: |
| 201 %arg.trunc = trunc i32 %arg to i8 | 196 %arg.trunc = trunc i32 %arg to i8 |
| 202 %res = bitcast i8 %arg.trunc to <8 x i1> | 197 %res = bitcast i8 %arg.trunc to <8 x i1> |
| 203 ret <8 x i1> %res | 198 ret <8 x i1> %res |
| 204 | 199 |
| 205 ; CHECK-LABEL: test_bitcast_i8_to_v8i1: | 200 ; CHECK-LABEL: test_bitcast_i8_to_v8i1: |
| 206 ; CHECK: call Sz_bitcast_i8_to_v8i1 | 201 ; CALLTARGETS-LABEL: test_bitcast_i8_to_v8i1 |
| 202 ; CHECK: call -4 |
| 203 ; CALLTARGETS: call Sz_bitcast_i8_to_v8i1 |
| 207 | 204 |
| 208 ; OPTM1-LABEL: test_bitcast_i8_to_v8i1: | 205 ; OPTM1-LABEL: test_bitcast_i8_to_v8i1: |
| 209 ; OPTM1: call Sz_bitcast_i8_to_v8i1 | 206 ; OPTM1: call -4 |
| 210 } | 207 } |
| 211 | 208 |
| 212 define <16 x i1> @test_bitcast_i16_to_v16i1(i32 %arg) { | 209 define <16 x i1> @test_bitcast_i16_to_v16i1(i32 %arg) { |
| 213 entry: | 210 entry: |
| 214 %arg.trunc = trunc i32 %arg to i16 | 211 %arg.trunc = trunc i32 %arg to i16 |
| 215 %res = bitcast i16 %arg.trunc to <16 x i1> | 212 %res = bitcast i16 %arg.trunc to <16 x i1> |
| 216 ret <16 x i1> %res | 213 ret <16 x i1> %res |
| 217 | 214 |
| 218 ; CHECK-LABEL: test_bitcast_i16_to_v16i1: | 215 ; CHECK-LABEL: test_bitcast_i16_to_v16i1: |
| 219 ; CHECK: call Sz_bitcast_i16_to_v16i1 | 216 ; CALLTARGETS-LABEL: test_bitcast_i16_to_v16i1 |
| 217 ; CHECK: call -4 |
| 218 ; CALLTARGETS: call Sz_bitcast_i16_to_v16i1 |
| 220 | 219 |
| 221 ; OPTM1-LABEL: test_bitcast_i16_to_v16i1: | 220 ; OPTM1-LABEL: test_bitcast_i16_to_v16i1: |
| 222 ; OPTM1: call Sz_bitcast_i16_to_v16i1 | 221 ; OPTM1: call -4 |
| 223 } | 222 } |
| 224 | 223 |
| 225 ; ERRORS-NOT: ICE translation error | 224 ; ERRORS-NOT: ICE translation error |
| 226 ; DUMP-NOT: SZ | 225 ; DUMP-NOT: SZ |
| OLD | NEW |