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1 ; This test checks support for vector arithmetic. | 1 ; This test checks support for vector arithmetic. |
2 | 2 |
3 ; RUN: %llvm2ice -O2 --verbose none %s | FileCheck %s | 3 ; TODO(jvoung): fix extra "CALLTARGETS" run. The llvm-objdump symbolizer |
4 ; RUN: %llvm2ice -Om1 --verbose none %s | FileCheck %s | 4 ; doesn't know how to symbolize non-section-local functions. |
| 5 ; The newer LLVM 3.6 one does work, but watch out for other bugs. |
| 6 |
| 7 ; RUN: %llvm2ice -O2 --verbose none %s \ |
| 8 ; RUN: | FileCheck --check-prefix=CALLTARGETS %s |
| 9 ; RUN: %llvm2ice -O2 --verbose none %s \ |
| 10 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \ |
| 11 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s |
| 12 ; RUN: %llvm2ice -Om1 --verbose none %s \ |
| 13 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \ |
| 14 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s |
5 ; RUN: %llvm2ice -O2 -mattr=sse4.1 --verbose none %s \ | 15 ; RUN: %llvm2ice -O2 -mattr=sse4.1 --verbose none %s \ |
6 ; RUN: | FileCheck %s --check-prefix=SSE41 | 16 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \ |
| 17 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - \ |
| 18 ; RUN: | FileCheck --check-prefix=SSE41 %s |
7 ; RUN: %llvm2ice -Om1 -mattr=sse4.1 --verbose none %s \ | 19 ; RUN: %llvm2ice -Om1 -mattr=sse4.1 --verbose none %s \ |
8 ; RUN: | FileCheck %s --check-prefix=SSE41 | 20 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \ |
9 ; RUN: %llvm2ice -O2 --verbose none %s \ | 21 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - \ |
10 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj | 22 ; RUN: | FileCheck --check-prefix=SSE41 %s |
11 ; RUN: %llvm2ice -Om1 --verbose none %s \ | |
12 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj | |
13 ; RUN: %llvm2ice -O2 -mattr=sse4.1 --verbose none %s \ | |
14 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj | |
15 ; RUN: %llvm2ice -Om1 -mattr=sse4.1 --verbose none %s \ | |
16 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj | |
17 ; RUN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s | 23 ; RUN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s |
18 ; RUN: %llvm2iceinsts %s | %szdiff %s | FileCheck --check-prefix=DUMP %s | 24 ; RUN: %llvm2iceinsts %s | %szdiff %s | FileCheck --check-prefix=DUMP %s |
19 ; RUN: %llvm2iceinsts --pnacl %s | %szdiff %s \ | 25 ; RUN: %llvm2iceinsts --pnacl %s | %szdiff %s \ |
20 ; RUN: | FileCheck --check-prefix=DUMP %s | 26 ; RUN: | FileCheck --check-prefix=DUMP %s |
21 | 27 |
22 define <4 x float> @test_fadd(<4 x float> %arg0, <4 x float> %arg1) { | 28 define <4 x float> @test_fadd(<4 x float> %arg0, <4 x float> %arg1) { |
23 entry: | 29 entry: |
24 %res = fadd <4 x float> %arg0, %arg1 | 30 %res = fadd <4 x float> %arg0, %arg1 |
25 ret <4 x float> %res | 31 ret <4 x float> %res |
26 ; CHECK-LABEL: test_fadd: | 32 ; CHECK-LABEL: test_fadd: |
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49 ret <4 x float> %res | 55 ret <4 x float> %res |
50 ; CHECK-LABEL: test_fdiv: | 56 ; CHECK-LABEL: test_fdiv: |
51 ; CHECK: divps | 57 ; CHECK: divps |
52 } | 58 } |
53 | 59 |
54 define <4 x float> @test_frem(<4 x float> %arg0, <4 x float> %arg1) { | 60 define <4 x float> @test_frem(<4 x float> %arg0, <4 x float> %arg1) { |
55 entry: | 61 entry: |
56 %res = frem <4 x float> %arg0, %arg1 | 62 %res = frem <4 x float> %arg0, %arg1 |
57 ret <4 x float> %res | 63 ret <4 x float> %res |
58 ; CHECK-LABEL: test_frem: | 64 ; CHECK-LABEL: test_frem: |
59 ; CHECK: fmodf | 65 ; CALLTARGETS-LABEL: test_frem: |
60 ; CHECK: fmodf | 66 ; CHECK: -4 |
61 ; CHECK: fmodf | 67 ; CHECK: -4 |
62 ; CHECK: fmodf | 68 ; CHECK: -4 |
| 69 ; CHECK: -4 |
| 70 ; CALLTARGETS: fmodf |
| 71 ; CALLTARGETS: fmodf |
| 72 ; CALLTARGETS: fmodf |
| 73 ; CALLTARGETS: fmodf |
63 } | 74 } |
64 | 75 |
65 define <16 x i8> @test_add_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) { | 76 define <16 x i8> @test_add_v16i8(<16 x i8> %arg0, <16 x i8> %arg1) { |
66 entry: | 77 entry: |
67 %res = add <16 x i8> %arg0, %arg1 | 78 %res = add <16 x i8> %arg0, %arg1 |
68 ret <16 x i8> %res | 79 ret <16 x i8> %res |
69 ; CHECK-LABEL: test_add_v16i8: | 80 ; CHECK-LABEL: test_add_v16i8: |
70 ; CHECK: paddb | 81 ; CHECK: paddb |
71 } | 82 } |
72 | 83 |
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566 ret <4 x i32> %res | 577 ret <4 x i32> %res |
567 ; CHECK-LABEL: test_srem_v4i32: | 578 ; CHECK-LABEL: test_srem_v4i32: |
568 ; CHECK: idiv | 579 ; CHECK: idiv |
569 ; CHECK: idiv | 580 ; CHECK: idiv |
570 ; CHECK: idiv | 581 ; CHECK: idiv |
571 ; CHECK: idiv | 582 ; CHECK: idiv |
572 } | 583 } |
573 | 584 |
574 ; ERRORS-NOT: ICE translation error | 585 ; ERRORS-NOT: ICE translation error |
575 ; DUMP-NOT: SZ | 586 ; DUMP-NOT: SZ |
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