Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(7)

Side by Side Diff: tests_lit/llvm2ice_tests/64bit.pnacl.ll

Issue 509233002: Convert lit tests to check disassembled assembly. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: reorder some CALLTARGETS-LABEL Created 6 years, 3 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « no previous file | tests_lit/llvm2ice_tests/address-mode-opt.ll » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 ; This tries to be a comprehensive test of i64 operations, in 1 ; This tries to be a comprehensive test of i64 operations, in
2 ; particular the patterns for lowering i64 operations into constituent 2 ; particular the patterns for lowering i64 operations into constituent
3 ; i32 operations on x86-32. 3 ; i32 operations on x86-32.
4 4
5 ; RUN: %llvm2ice -O2 --verbose none %s | FileCheck %s 5 ; TODO(jvoung): fix extra "CALLTARGETS" run. The llvm-objdump symbolizer
6 ; RUN: %llvm2ice -Om1 --verbose none %s | FileCheck --check-prefix=OPTM1 %s 6 ; doesn't know how to symbolize non-section-local functions.
7 ; The newer LLVM 3.6 one does work, but watch out for other bugs.
8
7 ; RUN: %llvm2ice -O2 --verbose none %s \ 9 ; RUN: %llvm2ice -O2 --verbose none %s \
8 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj 10 ; RUN: | FileCheck --check-prefix=CALLTARGETS %s
11 ; RUN: %llvm2ice -O2 --verbose none %s \
12 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \
13 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
9 ; RUN: %llvm2ice -Om1 --verbose none %s \ 14 ; RUN: %llvm2ice -Om1 --verbose none %s \
10 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj 15 ; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \
16 ; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - \
17 ; RUN: | FileCheck --check-prefix=OPTM1 %s
11 ; RUN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s 18 ; RUN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s
12 ; RUN: %llvm2iceinsts %s | %szdiff %s | FileCheck --check-prefix=DUMP %s 19 ; RUN: %llvm2iceinsts %s | %szdiff %s | FileCheck --check-prefix=DUMP %s
13 ; RUN: %llvm2iceinsts --pnacl %s | %szdiff %s \ 20 ; RUN: %llvm2iceinsts --pnacl %s | %szdiff %s \
14 ; RUN: | FileCheck --check-prefix=DUMP %s 21 ; RUN: | FileCheck --check-prefix=DUMP %s
15 22
16 @__init_array_start = internal constant [0 x i8] zeroinitializer, align 4 23 @__init_array_start = internal constant [0 x i8] zeroinitializer, align 4
17 @__fini_array_start = internal constant [0 x i8] zeroinitializer, align 4 24 @__fini_array_start = internal constant [0 x i8] zeroinitializer, align 4
18 @__tls_template_start = internal constant [0 x i8] zeroinitializer, align 8 25 @__tls_template_start = internal constant [0 x i8] zeroinitializer, align 8
19 @__tls_template_alignment = internal constant [4 x i8] c"\01\00\00\00", align 4 26 @__tls_template_alignment = internal constant [4 x i8] c"\01\00\00\00", align 4
20 27
21 define internal i32 @ignore64BitArg(i64 %a, i32 %b, i64 %c) { 28 define internal i32 @ignore64BitArg(i64 %a, i32 %b, i64 %c) {
22 entry: 29 entry:
23 ret i32 %b 30 ret i32 %b
24 } 31 }
25 32
26 define internal i32 @pass64BitArg(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f ) { 33 define internal i32 @pass64BitArg(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f ) {
27 entry: 34 entry:
28 %call = call i32 @ignore64BitArgNoInline(i64 %a, i32 123, i64 %b) 35 %call = call i32 @ignore64BitArgNoInline(i64 %a, i32 123, i64 %b)
29 %call1 = call i32 @ignore64BitArgNoInline(i64 %c, i32 123, i64 %d) 36 %call1 = call i32 @ignore64BitArgNoInline(i64 %c, i32 123, i64 %d)
30 %call2 = call i32 @ignore64BitArgNoInline(i64 %e, i32 123, i64 %f) 37 %call2 = call i32 @ignore64BitArgNoInline(i64 %e, i32 123, i64 %f)
31 %add = add i32 %call1, %call 38 %add = add i32 %call1, %call
32 %add3 = add i32 %add, %call2 39 %add3 = add i32 %add, %call2
33 ret i32 %add3 40 ret i32 %add3
34 } 41 }
35 ; CHECK-LABEL: pass64BitArg 42 ; CHECK-LABEL: pass64BitArg
43 ; CALLTARGETS-LABEL: pass64BitArg
36 ; CHECK: sub esp 44 ; CHECK: sub esp
37 ; CHECK: mov dword ptr [esp+4] 45 ; CHECK: mov dword ptr [esp + 4]
38 ; CHECK: mov dword ptr [esp] 46 ; CHECK: mov dword ptr [esp]
39 ; CHECK: mov dword ptr [esp+8], 123 47 ; CHECK: mov dword ptr [esp + 8], 123
40 ; CHECK: mov dword ptr [esp+16] 48 ; CHECK: mov dword ptr [esp + 16]
41 ; CHECK: mov dword ptr [esp+12] 49 ; CHECK: mov dword ptr [esp + 12]
42 ; CHECK: call ignore64BitArgNoInline 50 ; CHECK: call -4
43 ; CHECK sub esp 51 ; CALLTARGETS: call ignore64BitArgNoInline
44 ; CHECK: mov dword ptr [esp+4] 52 ; CHECK: sub esp
53 ; CHECK: mov dword ptr [esp + 4]
45 ; CHECK: mov dword ptr [esp] 54 ; CHECK: mov dword ptr [esp]
46 ; CHECK: mov dword ptr [esp+8], 123 55 ; CHECK: mov dword ptr [esp + 8], 123
47 ; CHECK: mov dword ptr [esp+16] 56 ; CHECK: mov dword ptr [esp + 16]
48 ; CHECK: mov dword ptr [esp+12] 57 ; CHECK: mov dword ptr [esp + 12]
49 ; CHECK: call ignore64BitArgNoInline 58 ; CHECK: call -4
59 ; CALLTARGETS: call ignore64BitArgNoInline
50 ; CHECK: sub esp 60 ; CHECK: sub esp
51 ; CHECK: mov dword ptr [esp+4] 61 ; CHECK: mov dword ptr [esp + 4]
52 ; CHECK: mov dword ptr [esp] 62 ; CHECK: mov dword ptr [esp]
53 ; CHECK: mov dword ptr [esp+8], 123 63 ; CHECK: mov dword ptr [esp + 8], 123
54 ; CHECK: mov dword ptr [esp+16] 64 ; CHECK: mov dword ptr [esp + 16]
55 ; CHECK: mov dword ptr [esp+12] 65 ; CHECK: mov dword ptr [esp + 12]
56 ; CHECK: call ignore64BitArgNoInline 66 ; CHECK: call -4
67 ; CALLTARGETS: call ignore64BitArgNoInline
57 ; 68 ;
58 ; OPTM1-LABEL: pass64BitArg 69 ; OPTM1-LABEL: pass64BitArg
59 ; OPTM1: sub esp 70 ; OPTM1: sub esp
60 ; OPTM1: mov dword ptr [esp+4] 71 ; OPTM1: mov dword ptr [esp + 4]
61 ; OPTM1: mov dword ptr [esp] 72 ; OPTM1: mov dword ptr [esp]
62 ; OPTM1: mov dword ptr [esp+8], 123 73 ; OPTM1: mov dword ptr [esp + 8], 123
63 ; OPTM1: mov dword ptr [esp+16] 74 ; OPTM1: mov dword ptr [esp + 16]
64 ; OPTM1: mov dword ptr [esp+12] 75 ; OPTM1: mov dword ptr [esp + 12]
65 ; OPTM1: call ignore64BitArgNoInline 76 ; OPTM1: call -4
66 ; OPTM1 sub esp 77 ; OPTM1: sub esp
67 ; OPTM1: mov dword ptr [esp+4] 78 ; OPTM1: mov dword ptr [esp + 4]
68 ; OPTM1: mov dword ptr [esp] 79 ; OPTM1: mov dword ptr [esp]
69 ; OPTM1: mov dword ptr [esp+8], 123 80 ; OPTM1: mov dword ptr [esp + 8], 123
70 ; OPTM1: mov dword ptr [esp+16] 81 ; OPTM1: mov dword ptr [esp + 16]
71 ; OPTM1: mov dword ptr [esp+12] 82 ; OPTM1: mov dword ptr [esp + 12]
72 ; OPTM1: call ignore64BitArgNoInline 83 ; OPTM1: call -4
73 ; OPTM1: sub esp 84 ; OPTM1: sub esp
74 ; OPTM1: mov dword ptr [esp+4] 85 ; OPTM1: mov dword ptr [esp + 4]
75 ; OPTM1: mov dword ptr [esp] 86 ; OPTM1: mov dword ptr [esp]
76 ; OPTM1: mov dword ptr [esp+8], 123 87 ; OPTM1: mov dword ptr [esp + 8], 123
77 ; OPTM1: mov dword ptr [esp+16] 88 ; OPTM1: mov dword ptr [esp + 16]
78 ; OPTM1: mov dword ptr [esp+12] 89 ; OPTM1: mov dword ptr [esp + 12]
79 ; OPTM1: call ignore64BitArgNoInline 90 ; OPTM1: call -4
80 91
81 declare i32 @ignore64BitArgNoInline(i64, i32, i64) 92 declare i32 @ignore64BitArgNoInline(i64, i32, i64)
82 93
83 define internal i32 @pass64BitConstArg(i64 %a, i64 %b) { 94 define internal i32 @pass64BitConstArg(i64 %a, i64 %b) {
84 entry: 95 entry:
85 %call = call i32 @ignore64BitArgNoInline(i64 %a, i32 123, i64 -240105309230672 5256) 96 %call = call i32 @ignore64BitArgNoInline(i64 %a, i32 123, i64 -240105309230672 5256)
86 ret i32 %call 97 ret i32 %call
87 } 98 }
88 ; CHECK-LABEL: pass64BitConstArg 99 ; CHECK-LABEL: pass64BitConstArg
100 ; CALLTARGETS-LABEL: pass64BitConstArg
89 ; CHECK: sub esp 101 ; CHECK: sub esp
90 ; CHECK: mov dword ptr [esp+4] 102 ; CHECK: mov dword ptr [esp + 4]
91 ; CHECK-NEXT: mov dword ptr [esp] 103 ; CHECK-NEXT: mov dword ptr [esp]
92 ; CHECK-NEXT: mov dword ptr [esp+8], 123 104 ; CHECK-NEXT: mov dword ptr [esp + 8], 123
93 ; CHECK-NEXT: mov dword ptr [esp+16], 3735928559 105 ; Bundle padding added by -triple=i686-none-nacl.
94 ; CHECK-NEXT: mov dword ptr [esp+12], 305419896 106 ; CHECK-NEXT: nop
95 ; CHECK-NEXT: call ignore64BitArgNoInline 107 ; CHECK-NEXT: mov dword ptr [esp + 16], 3735928559
108 ; CHECK-NEXT: mov dword ptr [esp + 12], 305419896
109 ; CHECK-NEXT: call -4
110 ; CALLTARGETS: call ignore64BitArgNoInline
96 ; 111 ;
97 ; OPTM1-LABEL: pass64BitConstArg 112 ; OPTM1-LABEL: pass64BitConstArg
98 ; OPTM1: sub esp 113 ; OPTM1: sub esp
99 ; OPTM1: mov dword ptr [esp+4] 114 ; OPTM1: mov dword ptr [esp + 4]
100 ; OPTM1-NEXT: mov dword ptr [esp] 115 ; OPTM1-NEXT: mov dword ptr [esp]
101 ; OPTM1-NEXT: mov dword ptr [esp+8], 123 116 ; OPTM1-NEXT: mov dword ptr [esp + 8], 123
102 ; OPTM1-NEXT: mov dword ptr [esp+16], 3735928559 117 ; Bundle padding added by -triple=i686-none-nacl.
103 ; OPTM1-NEXT: mov dword ptr [esp+12], 305419896 118 ; OPTM1-NEXT: nop
104 ; OPTM1-NEXT: call ignore64BitArgNoInline 119 ; OPTM1-NEXT: mov dword ptr [esp + 16], 3735928559
120 ; OPTM1-NEXT: mov dword ptr [esp + 12], 305419896
121 ; OPTM1-NEXT: call -4
105 122
106 define internal i64 @return64BitArg(i64 %a) { 123 define internal i64 @return64BitArg(i64 %a) {
107 entry: 124 entry:
108 ret i64 %a 125 ret i64 %a
109 } 126 }
110 ; CHECK-LABEL: return64BitArg 127 ; CHECK-LABEL: return64BitArg
111 ; CHECK: mov {{.*}}, dword ptr [esp+4] 128 ; CHECK: mov {{.*}}, dword ptr [esp + 4]
112 ; CHECK: mov {{.*}}, dword ptr [esp+8] 129 ; CHECK: mov {{.*}}, dword ptr [esp + 8]
113 ; CHECK: ret 130 ; CHECK: ret
114 ; 131 ;
115 ; OPTM1-LABEL: return64BitArg 132 ; OPTM1-LABEL: return64BitArg
116 ; OPTM1: mov {{.*}}, dword ptr [esp+4] 133 ; OPTM1: mov {{.*}}, dword ptr [esp + 4]
117 ; OPTM1: mov {{.*}}, dword ptr [esp+8] 134 ; OPTM1: mov {{.*}}, dword ptr [esp + 8]
118 ; OPTM1: ret 135 ; OPTM1: ret
119 136
120 define internal i64 @return64BitConst() { 137 define internal i64 @return64BitConst() {
121 entry: 138 entry:
122 ret i64 -2401053092306725256 139 ret i64 -2401053092306725256
123 } 140 }
124 ; CHECK-LABEL: return64BitConst 141 ; CHECK-LABEL: return64BitConst
125 ; CHECK: mov eax, 305419896 142 ; CHECK: mov eax, 305419896
126 ; CHECK: mov edx, 3735928559 143 ; CHECK: mov edx, 3735928559
127 ; CHECK: ret 144 ; CHECK: ret
(...skipping 104 matching lines...) Expand 10 before | Expand all | Expand 10 after
232 ; OPTM1: add 249 ; OPTM1: add
233 ; OPTM1: add 250 ; OPTM1: add
234 ; OPTM1: ret 251 ; OPTM1: ret
235 252
236 define internal i64 @div64BitSigned(i64 %a, i64 %b) { 253 define internal i64 @div64BitSigned(i64 %a, i64 %b) {
237 entry: 254 entry:
238 %div = sdiv i64 %a, %b 255 %div = sdiv i64 %a, %b
239 ret i64 %div 256 ret i64 %div
240 } 257 }
241 ; CHECK-LABEL: div64BitSigned 258 ; CHECK-LABEL: div64BitSigned
242 ; CHECK: call __divdi3 259 ; CALLTARGETS-LABEL: div64BitSigned
260 ; CHECK: call -4
261 ; CALLTARGETS: call __divdi3
243 ; CHECK: ret 262 ; CHECK: ret
244 ; 263
245 ; OPTM1-LABEL: div64BitSigned 264 ; OPTM1-LABEL: div64BitSigned
246 ; OPTM1: call __divdi3 265 ; OPTM1: call -4
247 ; OPTM1: ret 266 ; OPTM1: ret
248 267
249 define internal i64 @div64BitSignedConst(i64 %a) { 268 define internal i64 @div64BitSignedConst(i64 %a) {
250 entry: 269 entry:
251 %div = sdiv i64 %a, 12345678901234 270 %div = sdiv i64 %a, 12345678901234
252 ret i64 %div 271 ret i64 %div
253 } 272 }
254 ; CHECK-LABEL: div64BitSignedConst 273 ; CHECK-LABEL: div64BitSignedConst
255 ; CHECK: mov dword ptr [esp+12], 2874 274 ; CALLTARGETS-LABEL: div64BitSignedConst
256 ; CHECK: mov dword ptr [esp+8], 1942892530 275 ; CHECK: mov dword ptr [esp + 12], 2874
257 ; CHECK: call __divdi3 276 ; CHECK: mov dword ptr [esp + 8], 1942892530
277 ; CHECK: call -4
278 ; CALLTARGETS: call __divdi3
258 ; CHECK: ret 279 ; CHECK: ret
259 ; 280 ;
260 ; OPTM1-LABEL: div64BitSignedConst 281 ; OPTM1-LABEL: div64BitSignedConst
261 ; OPTM1: mov dword ptr [esp+12], 2874 282 ; OPTM1: mov dword ptr [esp + 12], 2874
262 ; OPTM1: mov dword ptr [esp+8], 1942892530 283 ; OPTM1: mov dword ptr [esp + 8], 1942892530
263 ; OPTM1: call __divdi3 284 ; OPTM1: call -4
264 ; OPTM1: ret 285 ; OPTM1: ret
265 286
266 define internal i64 @div64BitUnsigned(i64 %a, i64 %b) { 287 define internal i64 @div64BitUnsigned(i64 %a, i64 %b) {
267 entry: 288 entry:
268 %div = udiv i64 %a, %b 289 %div = udiv i64 %a, %b
269 ret i64 %div 290 ret i64 %div
270 } 291 }
271 ; CHECK-LABEL: div64BitUnsigned 292 ; CHECK-LABEL: div64BitUnsigned
272 ; CHECK: call __udivdi3 293 ; CALLTARGETS-LABEL: div64BitUnsigned
294 ; CHECK: call -4
295 ; CALLTARGETS: call __udivdi3
273 ; CHECK: ret 296 ; CHECK: ret
274 ; 297 ;
275 ; OPTM1-LABEL: div64BitUnsigned 298 ; OPTM1-LABEL: div64BitUnsigned
276 ; OPTM1: call __udivdi3 299 ; OPTM1: call -4
277 ; OPTM1: ret 300 ; OPTM1: ret
278 301
279 define internal i64 @rem64BitSigned(i64 %a, i64 %b) { 302 define internal i64 @rem64BitSigned(i64 %a, i64 %b) {
280 entry: 303 entry:
281 %rem = srem i64 %a, %b 304 %rem = srem i64 %a, %b
282 ret i64 %rem 305 ret i64 %rem
283 } 306 }
284 ; CHECK-LABEL: rem64BitSigned 307 ; CHECK-LABEL: rem64BitSigned
285 ; CHECK: call __moddi3 308 ; CALLTARGETS-LABEL: rem64BitSigned
309 ; CHECK: call -4
310 ; CALLTARGETS: call __moddi3
286 ; CHECK: ret 311 ; CHECK: ret
287 ; 312 ;
288 ; OPTM1-LABEL: rem64BitSigned 313 ; OPTM1-LABEL: rem64BitSigned
289 ; OPTM1: call __moddi3 314 ; OPTM1: call -4
290 ; OPTM1: ret 315 ; OPTM1: ret
291 316
292 define internal i64 @rem64BitUnsigned(i64 %a, i64 %b) { 317 define internal i64 @rem64BitUnsigned(i64 %a, i64 %b) {
293 entry: 318 entry:
294 %rem = urem i64 %a, %b 319 %rem = urem i64 %a, %b
295 ret i64 %rem 320 ret i64 %rem
296 } 321 }
297 ; CHECK-LABEL: rem64BitUnsigned 322 ; CHECK-LABEL: rem64BitUnsigned
298 ; CHECK: call __umoddi3 323 ; CALLTARGETS-LABEL: rem64BitUnsigned
324 ; CHECK: call -4
325 ; CALLTARGETS: call __umoddi3
299 ; CHECK: ret 326 ; CHECK: ret
300 ; 327 ;
301 ; OPTM1-LABEL: rem64BitUnsigned 328 ; OPTM1-LABEL: rem64BitUnsigned
302 ; OPTM1: call __umoddi3 329 ; OPTM1: call -4
303 ; OPTM1: ret 330 ; OPTM1: ret
304 331
305 define internal i64 @shl64BitSigned(i64 %a, i64 %b) { 332 define internal i64 @shl64BitSigned(i64 %a, i64 %b) {
306 entry: 333 entry:
307 %shl = shl i64 %a, %b 334 %shl = shl i64 %a, %b
308 ret i64 %shl 335 ret i64 %shl
309 } 336 }
310 ; CHECK-LABEL: shl64BitSigned 337 ; CHECK-LABEL: shl64BitSigned
311 ; CHECK: shld 338 ; CHECK: shld
312 ; CHECK: shl e 339 ; CHECK: shl e
(...skipping 136 matching lines...) Expand 10 before | Expand all | Expand 10 after
449 ; OPTM1-LABEL: xor64BitUnsigned 476 ; OPTM1-LABEL: xor64BitUnsigned
450 ; OPTM1: xor 477 ; OPTM1: xor
451 ; OPTM1: xor 478 ; OPTM1: xor
452 479
453 define internal i32 @trunc64To32Signed(i64 %a) { 480 define internal i32 @trunc64To32Signed(i64 %a) {
454 entry: 481 entry:
455 %conv = trunc i64 %a to i32 482 %conv = trunc i64 %a to i32
456 ret i32 %conv 483 ret i32 %conv
457 } 484 }
458 ; CHECK-LABEL: trunc64To32Signed 485 ; CHECK-LABEL: trunc64To32Signed
459 ; CHECK: mov eax, dword ptr [esp+4] 486 ; CHECK: mov eax, dword ptr [esp + 4]
460 ; CHECK-NEXT: ret 487 ; CHECK-NEXT: ret
461 ; 488 ;
462 ; OPTM1-LABEL: trunc64To32Signed 489 ; OPTM1-LABEL: trunc64To32Signed
463 ; OPTM1: mov eax, dword ptr [esp+ 490 ; OPTM1: mov eax, dword ptr [esp +
464 ; OPTM1: ret 491 ; OPTM1: ret
465 492
466 define internal i32 @trunc64To16Signed(i64 %a) { 493 define internal i32 @trunc64To16Signed(i64 %a) {
467 entry: 494 entry:
468 %conv = trunc i64 %a to i16 495 %conv = trunc i64 %a to i16
469 %conv.ret_ext = sext i16 %conv to i32 496 %conv.ret_ext = sext i16 %conv to i32
470 ret i32 %conv.ret_ext 497 ret i32 %conv.ret_ext
471 } 498 }
472 ; CHECK-LABEL: trunc64To16Signed 499 ; CHECK-LABEL: trunc64To16Signed
473 ; CHECK: mov eax, dword ptr [esp+4] 500 ; CHECK: mov eax, dword ptr [esp + 4]
474 ; CHECK-NEXT: movsx eax, ax 501 ; CHECK-NEXT: movsx eax, ax
475 ; CHECK-NEXT: ret 502 ; CHECK-NEXT: ret
476 ; 503 ;
477 ; OPTM1-LABEL: trunc64To16Signed 504 ; OPTM1-LABEL: trunc64To16Signed
478 ; OPTM1: mov eax, dword ptr [esp+ 505 ; OPTM1: mov eax, dword ptr [esp +
479 ; OPTM1: movsx eax, 506 ; OPTM1: movsx eax,
480 ; OPTM1: ret 507 ; OPTM1: ret
481 508
482 define internal i32 @trunc64To8Signed(i64 %a) { 509 define internal i32 @trunc64To8Signed(i64 %a) {
483 entry: 510 entry:
484 %conv = trunc i64 %a to i8 511 %conv = trunc i64 %a to i8
485 %conv.ret_ext = sext i8 %conv to i32 512 %conv.ret_ext = sext i8 %conv to i32
486 ret i32 %conv.ret_ext 513 ret i32 %conv.ret_ext
487 } 514 }
488 ; CHECK-LABEL: trunc64To8Signed 515 ; CHECK-LABEL: trunc64To8Signed
489 ; CHECK: mov eax, dword ptr [esp+4] 516 ; CHECK: mov eax, dword ptr [esp + 4]
490 ; CHECK-NEXT: movsx eax, al 517 ; CHECK-NEXT: movsx eax, al
491 ; CHECK-NEXT: ret 518 ; CHECK-NEXT: ret
492 ; 519 ;
493 ; OPTM1-LABEL: trunc64To8Signed 520 ; OPTM1-LABEL: trunc64To8Signed
494 ; OPTM1: mov eax, dword ptr [esp+ 521 ; OPTM1: mov eax, dword ptr [esp +
495 ; OPTM1: movsx eax, 522 ; OPTM1: movsx eax,
496 ; OPTM1: ret 523 ; OPTM1: ret
497 524
498 define internal i32 @trunc64To32SignedConst() { 525 define internal i32 @trunc64To32SignedConst() {
499 entry: 526 entry:
500 %conv = trunc i64 12345678901234 to i32 527 %conv = trunc i64 12345678901234 to i32
501 ret i32 %conv 528 ret i32 %conv
502 } 529 }
503 ; CHECK-LABEL: trunc64To32SignedConst 530 ; CHECK-LABEL: trunc64To32SignedConst
504 ; CHECK: mov eax, 1942892530 531 ; CHECK: mov eax, 1942892530
(...skipping 14 matching lines...) Expand all
519 ; OPTM1-LABEL: trunc64To16SignedConst 546 ; OPTM1-LABEL: trunc64To16SignedConst
520 ; OPTM1: mov eax, 1942892530 547 ; OPTM1: mov eax, 1942892530
521 ; OPTM1: movsx eax, 548 ; OPTM1: movsx eax,
522 549
523 define internal i32 @trunc64To32Unsigned(i64 %a) { 550 define internal i32 @trunc64To32Unsigned(i64 %a) {
524 entry: 551 entry:
525 %conv = trunc i64 %a to i32 552 %conv = trunc i64 %a to i32
526 ret i32 %conv 553 ret i32 %conv
527 } 554 }
528 ; CHECK-LABEL: trunc64To32Unsigned 555 ; CHECK-LABEL: trunc64To32Unsigned
529 ; CHECK: mov eax, dword ptr [esp+4] 556 ; CHECK: mov eax, dword ptr [esp + 4]
530 ; CHECK-NEXT: ret 557 ; CHECK-NEXT: ret
531 ; 558 ;
532 ; OPTM1-LABEL: trunc64To32Unsigned 559 ; OPTM1-LABEL: trunc64To32Unsigned
533 ; OPTM1: mov eax, dword ptr [esp+ 560 ; OPTM1: mov eax, dword ptr [esp +
534 ; OPTM1: ret 561 ; OPTM1: ret
535 562
536 define internal i32 @trunc64To16Unsigned(i64 %a) { 563 define internal i32 @trunc64To16Unsigned(i64 %a) {
537 entry: 564 entry:
538 %conv = trunc i64 %a to i16 565 %conv = trunc i64 %a to i16
539 %conv.ret_ext = zext i16 %conv to i32 566 %conv.ret_ext = zext i16 %conv to i32
540 ret i32 %conv.ret_ext 567 ret i32 %conv.ret_ext
541 } 568 }
542 ; CHECK-LABEL: trunc64To16Unsigned 569 ; CHECK-LABEL: trunc64To16Unsigned
543 ; CHECK: mov eax, dword ptr [esp+4] 570 ; CHECK: mov eax, dword ptr [esp + 4]
544 ; CHECK-NEXT: movzx eax, ax 571 ; CHECK-NEXT: movzx eax, ax
545 ; CHECK-NEXT: ret 572 ; CHECK-NEXT: ret
546 ; 573 ;
547 ; OPTM1-LABEL: trunc64To16Unsigned 574 ; OPTM1-LABEL: trunc64To16Unsigned
548 ; OPTM1: mov eax, dword ptr [esp+ 575 ; OPTM1: mov eax, dword ptr [esp +
549 ; OPTM1: movzx eax, 576 ; OPTM1: movzx eax,
550 ; OPTM1: ret 577 ; OPTM1: ret
551 578
552 define internal i32 @trunc64To8Unsigned(i64 %a) { 579 define internal i32 @trunc64To8Unsigned(i64 %a) {
553 entry: 580 entry:
554 %conv = trunc i64 %a to i8 581 %conv = trunc i64 %a to i8
555 %conv.ret_ext = zext i8 %conv to i32 582 %conv.ret_ext = zext i8 %conv to i32
556 ret i32 %conv.ret_ext 583 ret i32 %conv.ret_ext
557 } 584 }
558 ; CHECK-LABEL: trunc64To8Unsigned 585 ; CHECK-LABEL: trunc64To8Unsigned
559 ; CHECK: mov eax, dword ptr [esp+4] 586 ; CHECK: mov eax, dword ptr [esp + 4]
560 ; CHECK-NEXT: movzx eax, al 587 ; CHECK-NEXT: movzx eax, al
561 ; CHECK-NEXT: ret 588 ; CHECK-NEXT: ret
562 ; 589 ;
563 ; OPTM1-LABEL: trunc64To8Unsigned 590 ; OPTM1-LABEL: trunc64To8Unsigned
564 ; OPTM1: mov eax, dword ptr [esp+ 591 ; OPTM1: mov eax, dword ptr [esp +
565 ; OPTM1: movzx eax, 592 ; OPTM1: movzx eax,
566 ; OPTM1: ret 593 ; OPTM1: ret
567 594
568 define internal i32 @trunc64To1(i64 %a) { 595 define internal i32 @trunc64To1(i64 %a) {
569 entry: 596 entry:
570 ; %tobool = icmp ne i64 %a, 0 597 ; %tobool = icmp ne i64 %a, 0
571 %tobool = trunc i64 %a to i1 598 %tobool = trunc i64 %a to i1
572 %tobool.ret_ext = zext i1 %tobool to i32 599 %tobool.ret_ext = zext i1 %tobool to i32
573 ret i32 %tobool.ret_ext 600 ret i32 %tobool.ret_ext
574 } 601 }
575 ; CHECK-LABEL: trunc64To1 602 ; CHECK-LABEL: trunc64To1
576 ; CHECK: mov eax, dword ptr [esp+4] 603 ; CHECK: mov eax, dword ptr [esp + 4]
577 ; CHECK: and eax, 1 604 ; CHECK: and eax, 1
578 ; CHECK-NEXT: ret 605 ; CHECK-NEXT: ret
579 ; 606 ;
580 ; OPTM1-LABEL: trunc64To1 607 ; OPTM1-LABEL: trunc64To1
581 ; OPTM1: mov eax, dword ptr [esp+ 608 ; OPTM1: mov eax, dword ptr [esp +
582 ; OPTM1: and eax, 1 609 ; OPTM1: and eax, 1
583 ; OPTM1: ret 610 ; OPTM1: ret
584 611
585 define internal i64 @sext32To64(i32 %a) { 612 define internal i64 @sext32To64(i32 %a) {
586 entry: 613 entry:
587 %conv = sext i32 %a to i64 614 %conv = sext i32 %a to i64
588 ret i64 %conv 615 ret i64 %conv
589 } 616 }
590 ; CHECK-LABEL: sext32To64 617 ; CHECK-LABEL: sext32To64
591 ; CHECK: mov 618 ; CHECK: mov
(...skipping 508 matching lines...) Expand 10 before | Expand all | Expand 10 after
1100 ; OPTM1: cmp 1127 ; OPTM1: cmp
1101 ; OPTM1: jbe 1128 ; OPTM1: jbe
1102 1129
1103 define internal i64 @load64(i32 %a) { 1130 define internal i64 @load64(i32 %a) {
1104 entry: 1131 entry:
1105 %__1 = inttoptr i32 %a to i64* 1132 %__1 = inttoptr i32 %a to i64*
1106 %v0 = load i64* %__1, align 1 1133 %v0 = load i64* %__1, align 1
1107 ret i64 %v0 1134 ret i64 %v0
1108 } 1135 }
1109 ; CHECK-LABEL: load64 1136 ; CHECK-LABEL: load64
1110 ; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp+4] 1137 ; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp + 4]
1111 ; CHECK-NEXT: mov {{.*}}, dword ptr [e[[REGISTER]]] 1138 ; CHECK-NEXT: mov {{.*}}, dword ptr [e[[REGISTER]]]
1112 ; CHECK-NEXT: mov {{.*}}, dword ptr [e[[REGISTER]]+4] 1139 ; CHECK-NEXT: mov {{.*}}, dword ptr [e[[REGISTER]] + 4]
1113 ; 1140 ;
1114 ; OPTM1-LABEL: load64 1141 ; OPTM1-LABEL: load64
1115 ; OPTM1: mov e{{..}}, dword ptr [e{{..}}] 1142 ; OPTM1: mov e{{..}}, dword ptr [e{{..}}]
1116 ; OPTM1: mov e{{..}}, dword ptr [e{{..}}+4] 1143 ; OPTM1: mov e{{..}}, dword ptr [e{{..}} + 4]
1117 1144
1118 define internal void @store64(i32 %a, i64 %value) { 1145 define internal void @store64(i32 %a, i64 %value) {
1119 entry: 1146 entry:
1120 %__2 = inttoptr i32 %a to i64* 1147 %__2 = inttoptr i32 %a to i64*
1121 store i64 %value, i64* %__2, align 1 1148 store i64 %value, i64* %__2, align 1
1122 ret void 1149 ret void
1123 } 1150 }
1124 ; CHECK-LABEL: store64 1151 ; CHECK-LABEL: store64
1125 ; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp+4] 1152 ; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp + 4]
1126 ; CHECK: mov dword ptr [e[[REGISTER]]+4], 1153 ; CHECK: mov dword ptr [e[[REGISTER]] + 4],
1127 ; CHECK: mov dword ptr [e[[REGISTER]]], 1154 ; CHECK: mov dword ptr [e[[REGISTER]]],
1128 ; 1155 ;
1129 ; OPTM1-LABEL: store64 1156 ; OPTM1-LABEL: store64
1130 ; OPTM1: mov dword ptr [e[[REGISTER:[a-z]+]]+4], 1157 ; OPTM1: mov dword ptr [e[[REGISTER:[a-z]+]] + 4],
1131 ; OPTM1: mov dword ptr [e[[REGISTER]]], 1158 ; OPTM1: mov dword ptr [e[[REGISTER]]],
1132 1159
1133 define internal void @store64Const(i32 %a) { 1160 define internal void @store64Const(i32 %a) {
1134 entry: 1161 entry:
1135 %a.asptr = inttoptr i32 %a to i64* 1162 %a.asptr = inttoptr i32 %a to i64*
1136 store i64 -2401053092306725256, i64* %a.asptr, align 1 1163 store i64 -2401053092306725256, i64* %a.asptr, align 1
1137 ret void 1164 ret void
1138 } 1165 }
1139 ; CHECK-LABEL: store64Const 1166 ; CHECK-LABEL: store64Const
1140 ; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp+4] 1167 ; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp + 4]
1141 ; CHECK: mov dword ptr [e[[REGISTER]]+4], 3735928559 1168 ; CHECK: mov dword ptr [e[[REGISTER]] + 4], 3735928559
1142 ; CHECK: mov dword ptr [e[[REGISTER]]], 305419896 1169 ; CHECK: mov dword ptr [e[[REGISTER]]], 305419896
1143 ; 1170 ;
1144 ; OPTM1-LABEL: store64Const 1171 ; OPTM1-LABEL: store64Const
1145 ; OPTM1: mov dword ptr [e[[REGISTER:[a-z]+]]+4], 3735928559 1172 ; OPTM1: mov dword ptr [e[[REGISTER:[a-z]+]] + 4], 3735928559
1146 ; OPTM1: mov dword ptr [e[[REGISTER]]], 305419896 1173 ; OPTM1: mov dword ptr [e[[REGISTER]]], 305419896
1147 1174
1148 define internal i64 @select64VarVar(i64 %a, i64 %b) { 1175 define internal i64 @select64VarVar(i64 %a, i64 %b) {
1149 entry: 1176 entry:
1150 %cmp = icmp ult i64 %a, %b 1177 %cmp = icmp ult i64 %a, %b
1151 %cond = select i1 %cmp, i64 %a, i64 %b 1178 %cond = select i1 %cmp, i64 %a, i64 %b
1152 ret i64 %cond 1179 ret i64 %cond
1153 } 1180 }
1154 ; CHECK-LABEL: select64VarVar 1181 ; CHECK-LABEL: select64VarVar
1155 ; CHECK: cmp 1182 ; CHECK: cmp
(...skipping 110 matching lines...) Expand 10 before | Expand all | Expand 10 after
1266 } 1293 }
1267 ; The following checks are not strictly necessary since one of the RUN 1294 ; The following checks are not strictly necessary since one of the RUN
1268 ; lines actually runs the output through the assembler. 1295 ; lines actually runs the output through the assembler.
1269 ; CHECK-LABEL: icmpLt64Imm 1296 ; CHECK-LABEL: icmpLt64Imm
1270 ; CHECK-NOT: cmp {{[0-9]+}}, 1297 ; CHECK-NOT: cmp {{[0-9]+}},
1271 ; OPTM1-LABEL: icmpLt64Imm 1298 ; OPTM1-LABEL: icmpLt64Imm
1272 ; OPTM1-NOT: cmp {{[0-9]+}}, 1299 ; OPTM1-NOT: cmp {{[0-9]+}},
1273 1300
1274 ; ERRORS-NOT: ICE translation error 1301 ; ERRORS-NOT: ICE translation error
1275 ; DUMP-NOT: SZ 1302 ; DUMP-NOT: SZ
OLDNEW
« no previous file with comments | « no previous file | tests_lit/llvm2ice_tests/address-mode-opt.ll » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698