Convert lit tests to check disassembled assembly.

tests_lit/llvm2ice_tests/undef.ll

 ; This test checks that undef values are represented as zero.
 
-; RUN: %llvm2ice --verbose none %s | FileCheck  %s
-; RUN: %llvm2ice -O2 --verbose none %s | FileCheck  %s
-; RUN: %llvm2ice -mattr=sse4.1 --verbose none %s | FileCheck  %s
-; RUN: %llvm2ice -mattr=sse4.1 -O2 --verbose none %s | FileCheck  %s
 ; RUN: %llvm2ice -O2 --verbose none %s \
-; RUN:     | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj
+; RUN:   | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \
+; RUN:   | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
 ; RUN: %llvm2ice -Om1 --verbose none %s \
-; RUN:     | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj
-; RUN: %llvm2ice -mattr=sse4.1 -O2 --verbose none %s \
-; RUN:     | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj
-; RUN: %llvm2ice -mattr=sse4.1 -Om1 --verbose none %s \
-; RUN:     | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj
+; RUN:   | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \
+; RUN:   | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
+; RUN: %llvm2ice -O2 -mattr=sse4.1 --verbose none %s \
+; RUN:   | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \
+; RUN:   | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
+; RUN: %llvm2ice -Om1 -mattr=sse4.1 --verbose none %s \
+; RUN:   | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \
+; RUN:   | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
 ; RUN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s
 ; RUN: %llvm2iceinsts %s | %szdiff %s | FileCheck --check-prefix=DUMP %s
 ; RUN: %llvm2iceinsts --pnacl %s | %szdiff %s \
 ; RUN:                           | FileCheck --check-prefix=DUMP %s
 
 define i32 @undef_i32() {
 entry:
   ret i32 undef
 ; CHECK-LABEL: undef_i32:
 ; CHECK: mov eax, 0
 }
 
 define i64 @undef_i64() {
 entry:
   ret i64 undef
 ; CHECK-LABEL: undef_i64:
 ; CHECK-DAG: mov eax, 0
 ; CHECK-DAG: mov edx, 0
-; CHECK: ret
 }
 
 define float @undef_float() {
 entry:
   ret float undef
 ; CHECK-LABEL: undef_float:
-; CHECK: [L$float$
+; CHECK: fld dword ptr [0]
 }
 
 define <4 x i1> @undef_v4i1() {
 entry:
   ret <4 x i1> undef
 ; CHECK-LABEL: undef_v4i1:
 ; CHECK: pxor
 }
 
 define <8 x i1> @undef_v8i1() {
@@ skipping 132 matching lines @@
   ret <4 x float> %val
 ; CHECK-LABEL: vector_insertelement_arg1:
 ; CHECK: pxor
 }
 
 define <4 x float> @vector_insertelement_arg2(<4 x float> %arg) {
 entry:
   %val = insertelement <4 x float> %arg, float undef, i32 0
   ret <4 x float> %val
 ; CHECK-LABEL: vector_insertelement_arg2:
-; CHECK: [L$float$
+; CHECK: movss {{.*}}, dword ptr [0]
 }
 
 define float @vector_extractelement_v4f32_index_0() {
 entry:
   %val = extractelement <4 x float> undef, i32 0
   ret float %val
 ; CHECK-LABEL: vector_extractelement_v4f32_index_0:
 ; CHECK: pxor
 }
 
@@ skipping 81 matching lines @@
 define <4 x float> @vector_select_v4f32_arg2(<4 x i1> %cond, <4 x float> %a) {
 entry:
   %val = select <4 x i1> %cond, <4 x float> %a, <4 x float> undef
   ret <4 x float> %val
 ; CHECK-LABEL: vector_select_v4f32_arg2:
 ; CHECK: pxor
 }
 
 ; ERRORS-NOT: ICE translation error
 ; DUMP-NOT: SZ