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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ | 5 #ifndef V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ |
6 #define V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ | 6 #define V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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21 V(IA32Sub) \ | 21 V(IA32Sub) \ |
22 V(IA32Imul) \ | 22 V(IA32Imul) \ |
23 V(IA32Idiv) \ | 23 V(IA32Idiv) \ |
24 V(IA32Udiv) \ | 24 V(IA32Udiv) \ |
25 V(IA32Not) \ | 25 V(IA32Not) \ |
26 V(IA32Neg) \ | 26 V(IA32Neg) \ |
27 V(IA32Shl) \ | 27 V(IA32Shl) \ |
28 V(IA32Shr) \ | 28 V(IA32Shr) \ |
29 V(IA32Sar) \ | 29 V(IA32Sar) \ |
30 V(IA32Ror) \ | 30 V(IA32Ror) \ |
31 V(IA32Push) \ | |
32 V(IA32CallCodeObject) \ | |
33 V(IA32CallAddress) \ | |
34 V(PopStack) \ | |
35 V(IA32CallJSFunction) \ | |
36 V(SSEFloat64Cmp) \ | 31 V(SSEFloat64Cmp) \ |
37 V(SSEFloat64Add) \ | 32 V(SSEFloat64Add) \ |
38 V(SSEFloat64Sub) \ | 33 V(SSEFloat64Sub) \ |
39 V(SSEFloat64Mul) \ | 34 V(SSEFloat64Mul) \ |
40 V(SSEFloat64Div) \ | 35 V(SSEFloat64Div) \ |
41 V(SSEFloat64Mod) \ | 36 V(SSEFloat64Mod) \ |
42 V(SSEFloat64ToInt32) \ | 37 V(SSEFloat64ToInt32) \ |
43 V(SSEFloat64ToUint32) \ | 38 V(SSEFloat64ToUint32) \ |
44 V(SSEInt32ToFloat64) \ | 39 V(SSEInt32ToFloat64) \ |
45 V(SSEUint32ToFloat64) \ | 40 V(SSEUint32ToFloat64) \ |
46 V(IA32Movsxbl) \ | 41 V(IA32Movsxbl) \ |
47 V(IA32Movzxbl) \ | 42 V(IA32Movzxbl) \ |
48 V(IA32Movb) \ | 43 V(IA32Movb) \ |
49 V(IA32Movsxwl) \ | 44 V(IA32Movsxwl) \ |
50 V(IA32Movzxwl) \ | 45 V(IA32Movzxwl) \ |
51 V(IA32Movw) \ | 46 V(IA32Movw) \ |
52 V(IA32Movl) \ | 47 V(IA32Movl) \ |
53 V(IA32Movss) \ | 48 V(IA32Movss) \ |
54 V(IA32Movsd) \ | 49 V(IA32Movsd) \ |
| 50 V(IA32Push) \ |
55 V(IA32StoreWriteBarrier) | 51 V(IA32StoreWriteBarrier) |
56 | 52 |
57 | 53 |
58 // Addressing modes represent the "shape" of inputs to an instruction. | 54 // Addressing modes represent the "shape" of inputs to an instruction. |
59 // Many instructions support multiple addressing modes. Addressing modes | 55 // Many instructions support multiple addressing modes. Addressing modes |
60 // are encoded into the InstructionCode of the instruction and tell the | 56 // are encoded into the InstructionCode of the instruction and tell the |
61 // code generator after register allocation which assembler method to call. | 57 // code generator after register allocation which assembler method to call. |
62 // | 58 // |
63 // We use the following local notation for addressing modes: | 59 // We use the following local notation for addressing modes: |
64 // | 60 // |
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78 V(MR1I) /* [%r0 + %r1 * 1 + K] */ \ | 74 V(MR1I) /* [%r0 + %r1 * 1 + K] */ \ |
79 V(MR2I) /* [%r0 + %r1 * 2 + K] */ \ | 75 V(MR2I) /* [%r0 + %r1 * 2 + K] */ \ |
80 V(MR4I) /* [%r0 + %r1 * 4 + K] */ \ | 76 V(MR4I) /* [%r0 + %r1 * 4 + K] */ \ |
81 V(MR8I) /* [%r0 + %r1 * 8 + K] */ | 77 V(MR8I) /* [%r0 + %r1 * 8 + K] */ |
82 | 78 |
83 } // namespace compiler | 79 } // namespace compiler |
84 } // namespace internal | 80 } // namespace internal |
85 } // namespace v8 | 81 } // namespace v8 |
86 | 82 |
87 #endif // V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ | 83 #endif // V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ |
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