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Issue 508863002: [turbofan] Refactor code generation for calls. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 3 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ 5 #ifndef V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_
6 #define V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ 6 #define V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 32 matching lines...) Expand 10 before | Expand all | Expand 10 after
43 V(Arm64Shl) \ 43 V(Arm64Shl) \
44 V(Arm64Shl32) \ 44 V(Arm64Shl32) \
45 V(Arm64Shr) \ 45 V(Arm64Shr) \
46 V(Arm64Shr32) \ 46 V(Arm64Shr32) \
47 V(Arm64Sar) \ 47 V(Arm64Sar) \
48 V(Arm64Sar32) \ 48 V(Arm64Sar32) \
49 V(Arm64Ror) \ 49 V(Arm64Ror) \
50 V(Arm64Ror32) \ 50 V(Arm64Ror32) \
51 V(Arm64Mov32) \ 51 V(Arm64Mov32) \
52 V(Arm64Sxtw) \ 52 V(Arm64Sxtw) \
53 V(Arm64CallCodeObject) \
54 V(Arm64CallJSFunction) \
55 V(Arm64CallAddress) \
56 V(Arm64Claim) \ 53 V(Arm64Claim) \
57 V(Arm64Poke) \ 54 V(Arm64Poke) \
58 V(Arm64PokePairZero) \ 55 V(Arm64PokePairZero) \
59 V(Arm64PokePair) \ 56 V(Arm64PokePair) \
60 V(Arm64Drop) \
61 V(Arm64Float64Cmp) \ 57 V(Arm64Float64Cmp) \
62 V(Arm64Float64Add) \ 58 V(Arm64Float64Add) \
63 V(Arm64Float64Sub) \ 59 V(Arm64Float64Sub) \
64 V(Arm64Float64Mul) \ 60 V(Arm64Float64Mul) \
65 V(Arm64Float64Div) \ 61 V(Arm64Float64Div) \
66 V(Arm64Float64Mod) \ 62 V(Arm64Float64Mod) \
67 V(Arm64Float64ToInt32) \ 63 V(Arm64Float64ToInt32) \
68 V(Arm64Float64ToUint32) \ 64 V(Arm64Float64ToUint32) \
69 V(Arm64Int32ToFloat64) \ 65 V(Arm64Int32ToFloat64) \
70 V(Arm64Uint32ToFloat64) \ 66 V(Arm64Uint32ToFloat64) \
(...skipping 29 matching lines...) Expand all
100 // MRR = [register + register] 96 // MRR = [register + register]
101 #define TARGET_ADDRESSING_MODE_LIST(V) \ 97 #define TARGET_ADDRESSING_MODE_LIST(V) \
102 V(MRI) /* [%r0 + K] */ \ 98 V(MRI) /* [%r0 + K] */ \
103 V(MRR) /* [%r0 + %r1] */ 99 V(MRR) /* [%r0 + %r1] */
104 100
105 } // namespace internal 101 } // namespace internal
106 } // namespace compiler 102 } // namespace compiler
107 } // namespace v8 103 } // namespace v8
108 104
109 #endif // V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ 105 #endif // V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_
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