MIPS: Move register conventions out of the IC classes.

src/ic/mips64/ic-mips64.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 
 #include "src/v8.h"
 
 #if V8_TARGET_ARCH_MIPS64
 
 #include "src/codegen.h"
@@ skipping 232 matching lines @@
   STATIC_ASSERT(kInternalizedTag == 0);
   __ And(at, hash, Operand(kIsNotInternalizedMask));
   __ Branch(not_unique, ne, at, Operand(zero_reg));
 
   __ bind(&unique);
 }
 
 
 void LoadIC::GenerateMegamorphic(MacroAssembler* masm) {
   // The return address is in lr.
-  Register receiver = ReceiverRegister();
-  Register name = NameRegister();
+  Register receiver = LoadConvention::ReceiverRegister();
+  Register name = LoadConvention::NameRegister();
   DCHECK(receiver.is(a1));
   DCHECK(name.is(a2));
 
   // Probe the stub cache.
   Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
       Code::ComputeHandlerFlags(Code::LOAD_IC));
   masm->isolate()->stub_cache()->GenerateProbe(masm, flags, receiver, name, a3,
                                                a4, a5, a6);
 
   // Cache miss: Jump to runtime.
   GenerateMiss(masm);
 }
 
 
 void LoadIC::GenerateNormal(MacroAssembler* masm) {
   Register dictionary = a0;
-  DCHECK(!dictionary.is(ReceiverRegister()));
-  DCHECK(!dictionary.is(NameRegister()));
+  DCHECK(!dictionary.is(LoadConvention::ReceiverRegister()));
+  DCHECK(!dictionary.is(LoadConvention::NameRegister()));
   Label slow;
 
-  __ ld(dictionary,
-        FieldMemOperand(ReceiverRegister(), JSObject::kPropertiesOffset));
-  GenerateDictionaryLoad(masm, &slow, dictionary, NameRegister(), v0, a3, a4);
+  __ ld(dictionary, FieldMemOperand(LoadConvention::ReceiverRegister(),
+                                    JSObject::kPropertiesOffset));
+  GenerateDictionaryLoad(masm, &slow, dictionary,
+                         LoadConvention::NameRegister(), v0, a3, a4);
   __ Ret();
 
   // Dictionary load failed, go slow (but don't miss).
   __ bind(&slow);
   GenerateRuntimeGetProperty(masm);
 }
 
 
 // A register that isn't one of the parameters to the load ic.
 static const Register LoadIC_TempRegister() { return a3; }
 
 
 void LoadIC::GenerateMiss(MacroAssembler* masm) {
   // The return address is on the stack.
   Isolate* isolate = masm->isolate();
 
   __ IncrementCounter(isolate->counters()->keyed_load_miss(), 1, a3, a4);
 
-  __ mov(LoadIC_TempRegister(), ReceiverRegister());
-  __ Push(LoadIC_TempRegister(), NameRegister());
+  __ mov(LoadIC_TempRegister(), LoadConvention::ReceiverRegister());
+  __ Push(LoadIC_TempRegister(), LoadConvention::NameRegister());
 
   // Perform tail call to the entry.
   ExternalReference ref = ExternalReference(IC_Utility(kLoadIC_Miss), isolate);
   __ TailCallExternalReference(ref, 2, 1);
 }
 
 
 void LoadIC::GenerateRuntimeGetProperty(MacroAssembler* masm) {
   // The return address is in ra.
 
-  __ mov(LoadIC_TempRegister(), ReceiverRegister());
-  __ Push(LoadIC_TempRegister(), NameRegister());
+  __ mov(LoadIC_TempRegister(), LoadConvention::ReceiverRegister());
+  __ Push(LoadIC_TempRegister(), LoadConvention::NameRegister());
 
   __ TailCallRuntime(Runtime::kGetProperty, 2, 1);
 }
 
 
 static MemOperand GenerateMappedArgumentsLookup(
     MacroAssembler* masm, Register object, Register key, Register scratch1,
     Register scratch2, Register scratch3, Label* unmapped_case,
     Label* slow_case) {
   Heap* heap = masm->isolate()->heap();
@@ skipping 64 matching lines @@
   __ SmiUntag(scratch, key);
   __ dsll(scratch, scratch, kPointerSizeLog2);
   __ Daddu(scratch, scratch, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
   __ Daddu(scratch, backing_store, scratch);
   return MemOperand(scratch);
 }
 
 
 void KeyedLoadIC::GenerateSloppyArguments(MacroAssembler* masm) {
   // The return address is in ra.
-  Register receiver = ReceiverRegister();
-  Register key = NameRegister();
+  Register receiver = LoadConvention::ReceiverRegister();
+  Register key = LoadConvention::NameRegister();
   DCHECK(receiver.is(a1));
   DCHECK(key.is(a2));
 
   Label slow, notin;
   MemOperand mapped_location = GenerateMappedArgumentsLookup(
       masm, receiver, key, a0, a3, a4, &notin, &slow);
   __ Ret(USE_DELAY_SLOT);
   __ ld(v0, mapped_location);
   __ bind(&notin);
   // The unmapped lookup expects that the parameter map is in a2.
   MemOperand unmapped_location =
       GenerateUnmappedArgumentsLookup(masm, key, a0, a3, &slow);
   __ ld(a0, unmapped_location);
   __ LoadRoot(a3, Heap::kTheHoleValueRootIndex);
   __ Branch(&slow, eq, a0, Operand(a3));
   __ Ret(USE_DELAY_SLOT);
   __ mov(v0, a0);
   __ bind(&slow);
   GenerateMiss(masm);
 }
 
 
 void KeyedStoreIC::GenerateSloppyArguments(MacroAssembler* masm) {
-  Register receiver = ReceiverRegister();
-  Register key = NameRegister();
-  Register value = ValueRegister();
+  Register receiver = StoreConvention::ReceiverRegister();
+  Register key = StoreConvention::NameRegister();
+  Register value = StoreConvention::ValueRegister();
   DCHECK(value.is(a0));
 
   Label slow, notin;
   // Store address is returned in register (of MemOperand) mapped_location.
   MemOperand mapped_location = GenerateMappedArgumentsLookup(
       masm, receiver, key, a3, a4, a5, &notin, &slow);
   __ sd(value, mapped_location);
   __ mov(t1, value);
   DCHECK_EQ(mapped_location.offset(), 0);
   __ RecordWrite(a3, mapped_location.rm(), t1, kRAHasNotBeenSaved,
@@ skipping 16 matching lines @@
   GenerateMiss(masm);
 }
 
 
 void KeyedLoadIC::GenerateMiss(MacroAssembler* masm) {
   // The return address is in ra.
   Isolate* isolate = masm->isolate();
 
   __ IncrementCounter(isolate->counters()->keyed_load_miss(), 1, a3, a4);
 
-  __ Push(ReceiverRegister(), NameRegister());
+  __ Push(LoadConvention::ReceiverRegister(), LoadConvention::NameRegister());
 
   // Perform tail call to the entry.
   ExternalReference ref =
       ExternalReference(IC_Utility(kKeyedLoadIC_Miss), isolate);
 
   __ TailCallExternalReference(ref, 2, 1);
 }
 
 
-// IC register specifications
-const Register LoadIC::ReceiverRegister() { return a1; }
-const Register LoadIC::NameRegister() { return a2; }
-
-
-const Register LoadIC::SlotRegister() {
-  DCHECK(FLAG_vector_ics);
-  return a0;
-}
-
-
-const Register LoadIC::VectorRegister() {
-  DCHECK(FLAG_vector_ics);
-  return a3;
-}
-
-
-const Register StoreIC::ReceiverRegister() { return a1; }
-const Register StoreIC::NameRegister() { return a2; }
-const Register StoreIC::ValueRegister() { return a0; }
-
-
-const Register KeyedStoreIC::MapRegister() { return a3; }
-
-
 void KeyedLoadIC::GenerateRuntimeGetProperty(MacroAssembler* masm) {
   // The return address is in ra.
 
-  __ Push(ReceiverRegister(), NameRegister());
+  __ Push(LoadConvention::ReceiverRegister(), LoadConvention::NameRegister());
 
   __ TailCallRuntime(Runtime::kKeyedGetProperty, 2, 1);
 }
 
 
 void KeyedLoadIC::GenerateGeneric(MacroAssembler* masm) {
   // The return address is in ra.
   Label slow, check_name, index_smi, index_name, property_array_property;
   Label probe_dictionary, check_number_dictionary;
 
-  Register key = NameRegister();
-  Register receiver = ReceiverRegister();
+  Register key = LoadConvention::NameRegister();
+  Register receiver = LoadConvention::ReceiverRegister();
   DCHECK(key.is(a2));
   DCHECK(receiver.is(a1));
 
   Isolate* isolate = masm->isolate();
 
   // Check that the key is a smi.
   __ JumpIfNotSmi(key, &check_name);
   __ bind(&index_smi);
   // Now the key is known to be a smi. This place is also jumped to from below
   // where a numeric string is converted to a smi.
@@ skipping 145 matching lines @@
   __ IndexFromHash(a3, key);
   // Now jump to the place where smi keys are handled.
   __ Branch(&index_smi);
 }
 
 
 void KeyedLoadIC::GenerateString(MacroAssembler* masm) {
   // Return address is in ra.
   Label miss;
 
-  Register receiver = ReceiverRegister();
-  Register index = NameRegister();
+  Register receiver = LoadConvention::ReceiverRegister();
+  Register index = LoadConvention::NameRegister();
   Register scratch = a3;
   Register result = v0;
   DCHECK(!scratch.is(receiver) && !scratch.is(index));
 
   StringCharAtGenerator char_at_generator(receiver, index, scratch, result,
                                           &miss,  // When not a string.
                                           &miss,  // When not a number.
                                           &miss,  // When index out of range.
                                           STRING_INDEX_IS_ARRAY_INDEX);
   char_at_generator.GenerateFast(masm);
@@ skipping 163 matching lines @@
   //  -- a0     : value
   //  -- a1     : key
   //  -- a2     : receiver
   //  -- ra     : return address
   // -----------------------------------
   Label slow, fast_object, fast_object_grow;
   Label fast_double, fast_double_grow;
   Label array, extra, check_if_double_array;
 
   // Register usage.
-  Register value = ValueRegister();
-  Register key = NameRegister();
-  Register receiver = ReceiverRegister();
+  Register value = StoreConvention::ValueRegister();
+  Register key = StoreConvention::NameRegister();
+  Register receiver = StoreConvention::ReceiverRegister();
   DCHECK(value.is(a0));
   Register receiver_map = a3;
   Register elements_map = a6;
   Register elements = a7;  // Elements array of the receiver.
   // a4 and a5 are used as general scratch registers.
 
   // Check that the key is a smi.
   __ JumpIfNotSmi(key, &slow);
   // Check that the object isn't a smi.
   __ JumpIfSmi(receiver, &slow);
@@ skipping 63 matching lines @@
                                   &slow, kDontCheckMap, kIncrementLength, value,
                                   key, receiver, receiver_map, elements_map,
                                   elements);
 }
 
 
 void KeyedLoadIC::GenerateIndexedInterceptor(MacroAssembler* masm) {
   // Return address is in ra.
   Label slow;
 
-  Register receiver = ReceiverRegister();
-  Register key = NameRegister();
+  Register receiver = LoadConvention::ReceiverRegister();
+  Register key = LoadConvention::NameRegister();
   Register scratch1 = a3;
   Register scratch2 = a4;
   DCHECK(!scratch1.is(receiver) && !scratch1.is(key));
   DCHECK(!scratch2.is(receiver) && !scratch2.is(key));
 
   // Check that the receiver isn't a smi.
   __ JumpIfSmi(receiver, &slow);
 
   // Check that the key is an array index, that is Uint32.
   __ And(a4, key, Operand(kSmiTagMask | kSmiSignMask));
@@ skipping 16 matching lines @@
                         masm->isolate()),
       2, 1);
 
   __ bind(&slow);
   GenerateMiss(masm);
 }
 
 
 void KeyedStoreIC::GenerateMiss(MacroAssembler* masm) {
   // Push receiver, key and value for runtime call.
-  __ Push(ReceiverRegister(), NameRegister(), ValueRegister());
+  __ Push(StoreConvention::ReceiverRegister(), StoreConvention::NameRegister(),
+          StoreConvention::ValueRegister());
 
   ExternalReference ref =
       ExternalReference(IC_Utility(kKeyedStoreIC_Miss), masm->isolate());
   __ TailCallExternalReference(ref, 3, 1);
 }
 
 
 void StoreIC::GenerateMegamorphic(MacroAssembler* masm) {
-  Register receiver = ReceiverRegister();
-  Register name = NameRegister();
+  Register receiver = StoreConvention::ReceiverRegister();
+  Register name = StoreConvention::NameRegister();
   DCHECK(receiver.is(a1));
   DCHECK(name.is(a2));
-  DCHECK(ValueRegister().is(a0));
+  DCHECK(StoreConvention::ValueRegister().is(a0));
 
   // Get the receiver from the stack and probe the stub cache.
   Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
       Code::ComputeHandlerFlags(Code::STORE_IC));
   masm->isolate()->stub_cache()->GenerateProbe(masm, flags, receiver, name, a3,
                                                a4, a5, a6);
 
   // Cache miss: Jump to runtime.
   GenerateMiss(masm);
 }
 
 
 void StoreIC::GenerateMiss(MacroAssembler* masm) {
-  __ Push(ReceiverRegister(), NameRegister(), ValueRegister());
+  __ Push(StoreConvention::ReceiverRegister(), StoreConvention::NameRegister(),
+          StoreConvention::ValueRegister());
   // Perform tail call to the entry.
   ExternalReference ref =
       ExternalReference(IC_Utility(kStoreIC_Miss), masm->isolate());
   __ TailCallExternalReference(ref, 3, 1);
 }
 
 
 void StoreIC::GenerateNormal(MacroAssembler* masm) {
   Label miss;
-  Register receiver = ReceiverRegister();
-  Register name = NameRegister();
-  Register value = ValueRegister();
+  Register receiver = StoreConvention::ReceiverRegister();
+  Register name = StoreConvention::NameRegister();
+  Register value = StoreConvention::ValueRegister();
   Register dictionary = a3;
   DCHECK(!AreAliased(value, receiver, name, dictionary, a4, a5));
 
   __ ld(dictionary, FieldMemOperand(receiver, JSObject::kPropertiesOffset));
 
   GenerateDictionaryStore(masm, &miss, a3, name, value, a4, a5);
   Counters* counters = masm->isolate()->counters();
   __ IncrementCounter(counters->store_normal_hit(), 1, a4, a5);
   __ Ret();
 
@@ skipping 95 matching lines @@
     patcher.ChangeBranchCondition(ne);
   } else {
     DCHECK(Assembler::IsBne(branch_instr));
     patcher.ChangeBranchCondition(eq);
   }
 }
 }
 }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_MIPS64