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Unified Diff: src/compiler/arm64/instruction-selector-arm64.cc

Issue 505713002: [turbofan] Add backend support for signed loads. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Fix x64. Created 6 years, 4 months ago
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Index: src/compiler/arm64/instruction-selector-arm64.cc
diff --git a/src/compiler/arm64/instruction-selector-arm64.cc b/src/compiler/arm64/instruction-selector-arm64.cc
index dd1857b1e65dd9f5985a5610ca97f3969a4c27fe..410105c1880b3f0c97534d96c625627993202fd9 100644
--- a/src/compiler/arm64/instruction-selector-arm64.cc
+++ b/src/compiler/arm64/instruction-selector-arm64.cc
@@ -143,6 +143,7 @@ static void VisitBinop(InstructionSelector* selector, Node* node,
void InstructionSelector::VisitLoad(Node* node) {
MachineType rep = RepresentationOf(OpParameter<MachineType>(node));
+ MachineType typ = TypeOf(OpParameter<MachineType>(node));
Arm64OperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
@@ -155,21 +156,21 @@ void InstructionSelector::VisitLoad(Node* node) {
// TODO(titzer): signed/unsigned small loads
switch (rep) {
case kRepFloat64:
- opcode = kArm64Float64Load;
+ opcode = kArm64LdrD;
break;
case kRepBit: // Fall through.
case kRepWord8:
- opcode = kArm64LoadWord8;
+ opcode = typ == kTypeInt32 ? kArm64Ldrsb : kArm64Ldrb;
break;
case kRepWord16:
- opcode = kArm64LoadWord16;
+ opcode = typ == kTypeInt32 ? kArm64Ldrsh : kArm64Ldrh;
break;
case kRepWord32:
- opcode = kArm64LoadWord32;
+ opcode = kArm64LdrW;
break;
case kRepTagged: // Fall through.
case kRepWord64:
- opcode = kArm64LoadWord64;
+ opcode = kArm64Ldr;
break;
default:
UNREACHABLE();
@@ -178,9 +179,6 @@ void InstructionSelector::VisitLoad(Node* node) {
if (g.CanBeImmediate(index, kLoadStoreImm)) {
Emit(opcode | AddressingModeField::encode(kMode_MRI), result,
g.UseRegister(base), g.UseImmediate(index));
- } else if (g.CanBeImmediate(base, kLoadStoreImm)) {
- Emit(opcode | AddressingModeField::encode(kMode_MRI), result,
- g.UseRegister(index), g.UseImmediate(base));
} else {
Emit(opcode | AddressingModeField::encode(kMode_MRR), result,
g.UseRegister(base), g.UseRegister(index));
@@ -217,21 +215,21 @@ void InstructionSelector::VisitStore(Node* node) {
ArchOpcode opcode;
switch (rep) {
case kRepFloat64:
- opcode = kArm64Float64Store;
+ opcode = kArm64StrD;
break;
case kRepBit: // Fall through.
case kRepWord8:
- opcode = kArm64StoreWord8;
+ opcode = kArm64Strb;
break;
case kRepWord16:
- opcode = kArm64StoreWord16;
+ opcode = kArm64Strh;
break;
case kRepWord32:
- opcode = kArm64StoreWord32;
+ opcode = kArm64StrW;
break;
case kRepTagged: // Fall through.
case kRepWord64:
- opcode = kArm64StoreWord64;
+ opcode = kArm64Str;
break;
default:
UNREACHABLE();
@@ -240,9 +238,6 @@ void InstructionSelector::VisitStore(Node* node) {
if (g.CanBeImmediate(index, kLoadStoreImm)) {
Emit(opcode | AddressingModeField::encode(kMode_MRI), NULL,
g.UseRegister(base), g.UseImmediate(index), val);
- } else if (g.CanBeImmediate(base, kLoadStoreImm)) {
- Emit(opcode | AddressingModeField::encode(kMode_MRI), NULL,
- g.UseRegister(index), g.UseImmediate(base), val);
} else {
Emit(opcode | AddressingModeField::encode(kMode_MRR), NULL,
g.UseRegister(base), g.UseRegister(index), val);
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