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Unified Diff: src/compiler/arm/instruction-selector-arm.cc

Issue 505713002: [turbofan] Add backend support for signed loads. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Fix x64. Created 6 years, 4 months ago
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Index: src/compiler/arm/instruction-selector-arm.cc
diff --git a/src/compiler/arm/instruction-selector-arm.cc b/src/compiler/arm/instruction-selector-arm.cc
index 90c8eb530039a5a65c6453ce1f114baddfe5bf10..6ec86bd6413d9c3e3ff04b6d5877e97218f4a0f3 100644
--- a/src/compiler/arm/instruction-selector-arm.cc
+++ b/src/compiler/arm/instruction-selector-arm.cc
@@ -55,19 +55,21 @@ class ArmOperandGenerator V8_FINAL : public OperandGenerator {
case kArmRsb:
return ImmediateFitsAddrMode1Instruction(value);
- case kArmFloat64Load:
- case kArmFloat64Store:
+ case kArmVldr64:
+ case kArmVstr64:
return value >= -1020 && value <= 1020 && (value % 4) == 0;
- case kArmLoadWord8:
- case kArmStoreWord8:
- case kArmLoadWord32:
- case kArmStoreWord32:
+ case kArmLdrb:
+ case kArmLdrsb:
+ case kArmStrb:
+ case kArmLdr:
+ case kArmStr:
case kArmStoreWriteBarrier:
return value >= -4095 && value <= 4095;
- case kArmLoadWord16:
- case kArmStoreWord16:
+ case kArmLdrh:
+ case kArmLdrsh:
+ case kArmStrh:
return value >= -255 && value <= 255;
case kArchJmp:
@@ -287,6 +289,7 @@ static void VisitBinop(InstructionSelector* selector, Node* node,
void InstructionSelector::VisitLoad(Node* node) {
MachineType rep = RepresentationOf(OpParameter<MachineType>(node));
+ MachineType typ = TypeOf(OpParameter<MachineType>(node));
ArmOperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
@@ -296,21 +299,20 @@ void InstructionSelector::VisitLoad(Node* node) {
: g.DefineAsRegister(node);
ArchOpcode opcode;
- // TODO(titzer): signed/unsigned small loads
switch (rep) {
case kRepFloat64:
- opcode = kArmFloat64Load;
+ opcode = kArmVldr64;
break;
case kRepBit: // Fall through.
case kRepWord8:
- opcode = kArmLoadWord8;
+ opcode = typ == kTypeUint32 ? kArmLdrb : kArmLdrsb;
break;
case kRepWord16:
- opcode = kArmLoadWord16;
+ opcode = typ == kTypeUint32 ? kArmLdrh : kArmLdrsh;
break;
case kRepTagged: // Fall through.
case kRepWord32:
- opcode = kArmLoadWord32;
+ opcode = kArmLdr;
break;
default:
UNREACHABLE();
@@ -320,9 +322,6 @@ void InstructionSelector::VisitLoad(Node* node) {
if (g.CanBeImmediate(index, opcode)) {
Emit(opcode | AddressingModeField::encode(kMode_Offset_RI), result,
g.UseRegister(base), g.UseImmediate(index));
- } else if (g.CanBeImmediate(base, opcode)) {
- Emit(opcode | AddressingModeField::encode(kMode_Offset_RI), result,
- g.UseRegister(index), g.UseImmediate(base));
} else {
Emit(opcode | AddressingModeField::encode(kMode_Offset_RR), result,
g.UseRegister(base), g.UseRegister(index));
@@ -356,18 +355,18 @@ void InstructionSelector::VisitStore(Node* node) {
ArchOpcode opcode;
switch (rep) {
case kRepFloat64:
- opcode = kArmFloat64Store;
+ opcode = kArmVstr64;
break;
case kRepBit: // Fall through.
case kRepWord8:
- opcode = kArmStoreWord8;
+ opcode = kArmStrb;
break;
case kRepWord16:
- opcode = kArmStoreWord16;
+ opcode = kArmStrh;
break;
case kRepTagged: // Fall through.
case kRepWord32:
- opcode = kArmStoreWord32;
+ opcode = kArmStr;
break;
default:
UNREACHABLE();
@@ -377,9 +376,6 @@ void InstructionSelector::VisitStore(Node* node) {
if (g.CanBeImmediate(index, opcode)) {
Emit(opcode | AddressingModeField::encode(kMode_Offset_RI), NULL,
g.UseRegister(base), g.UseImmediate(index), val);
- } else if (g.CanBeImmediate(base, opcode)) {
- Emit(opcode | AddressingModeField::encode(kMode_Offset_RI), NULL,
- g.UseRegister(index), g.UseImmediate(base), val);
} else {
Emit(opcode | AddressingModeField::encode(kMode_Offset_RR), NULL,
g.UseRegister(base), g.UseRegister(index), val);
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