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Side by Side Diff: test/compiler-unittests/arm/instruction-selector-arm-unittest.cc

Issue 505713002: [turbofan] Add backend support for signed loads. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Fix x64. Created 6 years, 4 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "test/compiler-unittests/instruction-selector-unittest.h" 5 #include "test/compiler-unittests/instruction-selector-unittest.h"
6 6
7 namespace v8 { 7 namespace v8 {
8 namespace internal { 8 namespace internal {
9 namespace compiler { 9 namespace compiler {
10 10
(...skipping 1170 matching lines...) Expand 10 before | Expand all | Expand 10 after
1181 EXPECT_EQ(1U, s[0]->OutputCount()); 1181 EXPECT_EQ(1U, s[0]->OutputCount());
1182 } 1182 }
1183 } 1183 }
1184 1184
1185 1185
1186 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorShiftTest, 1186 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorShiftTest,
1187 ::testing::ValuesIn(kShifts)); 1187 ::testing::ValuesIn(kShifts));
1188 1188
1189 1189
1190 // ----------------------------------------------------------------------------- 1190 // -----------------------------------------------------------------------------
1191 // Memory access instructions.
1192
1193
1194 namespace {
1195
1196 struct MemoryAccess {
1197 MachineType type;
1198 ArchOpcode ldr_opcode;
1199 ArchOpcode str_opcode;
1200 const int32_t immediates[40];
1201 };
1202
1203
1204 std::ostream& operator<<(std::ostream& os, const MemoryAccess& memacc) {
1205 OStringStream ost;
1206 ost << memacc.type;
1207 return os << ost.c_str();
1208 }
1209
1210
1211 static const MemoryAccess kMemoryAccesses[] = {
1212 {kMachInt8,
1213 kArmLdrsb,
1214 kArmStrb,
1215 {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
1216 -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
1217 115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
1218 {kMachUint8,
1219 kArmLdrb,
1220 kArmStrb,
1221 {-4095, -3914, -3536, -3234, -3185, -3169, -1073, -990, -859, -720, -434,
1222 -127, -124, -122, -105, -91, -86, -64, -55, -53, -30, -10, -3, 0, 20, 28,
1223 39, 58, 64, 73, 75, 100, 108, 121, 686, 963, 1363, 2759, 3449, 4095}},
1224 {kMachInt16,
1225 kArmLdrsh,
1226 kArmStrh,
1227 {-255, -251, -232, -220, -144, -138, -130, -126, -116, -115, -102, -101,
1228 -98, -69, -59, -56, -39, -35, -23, -19, -7, 0, 22, 26, 37, 68, 83, 87, 98,
1229 102, 108, 111, 117, 171, 195, 203, 204, 245, 246, 255}},
1230 {kMachUint16,
1231 kArmLdrh,
1232 kArmStrh,
1233 {-255, -230, -201, -172, -125, -119, -118, -105, -98, -79, -54, -42, -41,
1234 -32, -12, -11, -5, -4, 0, 5, 9, 25, 28, 51, 58, 60, 89, 104, 108, 109,
1235 114, 116, 120, 138, 150, 161, 166, 172, 228, 255}},
1236 {kMachInt32,
1237 kArmLdr,
1238 kArmStr,
1239 {-4095, -1898, -1685, -1562, -1408, -1313, -344, -128, -116, -100, -92,
1240 -80, -72, -71, -56, -25, -21, -11, -9, 0, 3, 5, 27, 28, 42, 52, 63, 88,
1241 93, 97, 125, 846, 1037, 2102, 2403, 2597, 2632, 2997, 3935, 4095}},
1242 {kMachFloat64,
1243 kArmVldr64,
1244 kArmVstr64,
1245 {-1020, -948, -796, -696, -612, -364, -320, -308, -128, -112, -108, -104,
1246 -96, -84, -80, -56, -48, -40, -20, 0, 24, 28, 36, 48, 64, 84, 96, 100,
1247 108, 116, 120, 140, 156, 408, 432, 444, 772, 832, 940, 1020}}};
1248
1249 } // namespace
1250
1251
1252 typedef InstructionSelectorTestWithParam<MemoryAccess>
1253 InstructionSelectorMemoryAccessTest;
1254
1255
1256 TEST_P(InstructionSelectorMemoryAccessTest, LoadWithParameters) {
1257 const MemoryAccess memacc = GetParam();
1258 StreamBuilder m(this, memacc.type, kMachPtr, kMachInt32);
1259 m.Return(m.Load(memacc.type, m.Parameter(0), m.Parameter(1)));
1260 Stream s = m.Build();
1261 ASSERT_EQ(1U, s.size());
1262 EXPECT_EQ(memacc.ldr_opcode, s[0]->arch_opcode());
1263 EXPECT_EQ(kMode_Offset_RR, s[0]->addressing_mode());
1264 EXPECT_EQ(2U, s[0]->InputCount());
1265 EXPECT_EQ(1U, s[0]->OutputCount());
1266 }
1267
1268
1269 TEST_P(InstructionSelectorMemoryAccessTest, LoadWithImmediateIndex) {
1270 const MemoryAccess memacc = GetParam();
1271 TRACED_FOREACH(int32_t, index, memacc.immediates) {
1272 StreamBuilder m(this, memacc.type, kMachPtr);
1273 m.Return(m.Load(memacc.type, m.Parameter(0), m.Int32Constant(index)));
1274 Stream s = m.Build();
1275 ASSERT_EQ(1U, s.size());
1276 EXPECT_EQ(memacc.ldr_opcode, s[0]->arch_opcode());
1277 EXPECT_EQ(kMode_Offset_RI, s[0]->addressing_mode());
1278 ASSERT_EQ(2U, s[0]->InputCount());
1279 ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
1280 EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1)));
1281 EXPECT_EQ(1U, s[0]->OutputCount());
1282 }
1283 }
1284
1285
1286 TEST_P(InstructionSelectorMemoryAccessTest, StoreWithParameters) {
1287 const MemoryAccess memacc = GetParam();
1288 StreamBuilder m(this, kMachInt32, kMachPtr, kMachInt32, memacc.type);
1289 m.Store(memacc.type, m.Parameter(0), m.Parameter(1), m.Parameter(2));
1290 m.Return(m.Int32Constant(0));
1291 Stream s = m.Build();
1292 ASSERT_EQ(1U, s.size());
1293 EXPECT_EQ(memacc.str_opcode, s[0]->arch_opcode());
1294 EXPECT_EQ(kMode_Offset_RR, s[0]->addressing_mode());
1295 EXPECT_EQ(3U, s[0]->InputCount());
1296 EXPECT_EQ(0U, s[0]->OutputCount());
1297 }
1298
1299
1300 TEST_P(InstructionSelectorMemoryAccessTest, StoreWithImmediateIndex) {
1301 const MemoryAccess memacc = GetParam();
1302 TRACED_FOREACH(int32_t, index, memacc.immediates) {
1303 StreamBuilder m(this, kMachInt32, kMachPtr, memacc.type);
1304 m.Store(memacc.type, m.Parameter(0), m.Int32Constant(index),
1305 m.Parameter(1));
1306 m.Return(m.Int32Constant(0));
1307 Stream s = m.Build();
1308 ASSERT_EQ(1U, s.size());
1309 EXPECT_EQ(memacc.str_opcode, s[0]->arch_opcode());
1310 EXPECT_EQ(kMode_Offset_RI, s[0]->addressing_mode());
1311 ASSERT_EQ(3U, s[0]->InputCount());
1312 ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
1313 EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1)));
1314 EXPECT_EQ(0U, s[0]->OutputCount());
1315 }
1316 }
1317
1318
1319 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
1320 InstructionSelectorMemoryAccessTest,
1321 ::testing::ValuesIn(kMemoryAccesses));
1322
1323
1324 // -----------------------------------------------------------------------------
1191 // Miscellaneous. 1325 // Miscellaneous.
1192 1326
1193 1327
1194 TEST_F(InstructionSelectorTest, Int32AddWithInt32Mul) { 1328 TEST_F(InstructionSelectorTest, Int32AddWithInt32Mul) {
1195 { 1329 {
1196 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32, kMachInt32); 1330 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32, kMachInt32);
1197 m.Return( 1331 m.Return(
1198 m.Int32Add(m.Parameter(0), m.Int32Mul(m.Parameter(1), m.Parameter(2)))); 1332 m.Int32Add(m.Parameter(0), m.Int32Mul(m.Parameter(1), m.Parameter(2))));
1199 Stream s = m.Build(); 1333 Stream s = m.Build();
1200 ASSERT_EQ(1U, s.size()); 1334 ASSERT_EQ(1U, s.size());
(...skipping 540 matching lines...) Expand 10 before | Expand all | Expand 10 after
1741 ASSERT_EQ(3U, s[0]->InputCount()); 1875 ASSERT_EQ(3U, s[0]->InputCount());
1742 EXPECT_EQ(lsb, s.ToInt32(s[0]->InputAt(1))); 1876 EXPECT_EQ(lsb, s.ToInt32(s[0]->InputAt(1)));
1743 EXPECT_EQ(width, s.ToInt32(s[0]->InputAt(2))); 1877 EXPECT_EQ(width, s.ToInt32(s[0]->InputAt(2)));
1744 } 1878 }
1745 } 1879 }
1746 } 1880 }
1747 1881
1748 } // namespace compiler 1882 } // namespace compiler
1749 } // namespace internal 1883 } // namespace internal
1750 } // namespace v8 1884 } // namespace v8
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