Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(444)

Side by Side Diff: src/compiler/ia32/instruction-selector-ia32.cc

Issue 505713002: [turbofan] Add backend support for signed loads. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Fix x64. Created 6 years, 3 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « src/compiler/ia32/instruction-codes-ia32.h ('k') | src/compiler/instruction.h » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/instruction-selector-impl.h" 5 #include "src/compiler/instruction-selector-impl.h"
6 #include "src/compiler/node-matchers.h" 6 #include "src/compiler/node-matchers.h"
7 #include "src/compiler/node-properties-inl.h" 7 #include "src/compiler/node-properties-inl.h"
8 8
9 namespace v8 { 9 namespace v8 {
10 namespace internal { 10 namespace internal {
(...skipping 24 matching lines...) Expand all
35 } 35 }
36 default: 36 default:
37 return false; 37 return false;
38 } 38 }
39 } 39 }
40 }; 40 };
41 41
42 42
43 void InstructionSelector::VisitLoad(Node* node) { 43 void InstructionSelector::VisitLoad(Node* node) {
44 MachineType rep = RepresentationOf(OpParameter<MachineType>(node)); 44 MachineType rep = RepresentationOf(OpParameter<MachineType>(node));
45 MachineType typ = TypeOf(OpParameter<MachineType>(node));
45 IA32OperandGenerator g(this); 46 IA32OperandGenerator g(this);
46 Node* base = node->InputAt(0); 47 Node* base = node->InputAt(0);
47 Node* index = node->InputAt(1); 48 Node* index = node->InputAt(1);
48 49
49 InstructionOperand* output = rep == kRepFloat64 50 InstructionOperand* output = rep == kRepFloat64
50 ? g.DefineAsDoubleRegister(node) 51 ? g.DefineAsDoubleRegister(node)
51 : g.DefineAsRegister(node); 52 : g.DefineAsRegister(node);
52 ArchOpcode opcode; 53 ArchOpcode opcode;
53 // TODO(titzer): signed/unsigned small loads 54 // TODO(titzer): signed/unsigned small loads
54 switch (rep) { 55 switch (rep) {
55 case kRepFloat64: 56 case kRepFloat64:
56 opcode = kSSELoad; 57 opcode = kIA32Movsd;
57 break; 58 break;
58 case kRepBit: // Fall through. 59 case kRepBit: // Fall through.
59 case kRepWord8: 60 case kRepWord8:
60 opcode = kIA32LoadWord8; 61 opcode = typ == kTypeInt32 ? kIA32Movsxbl : kIA32Movzxbl;
61 break; 62 break;
62 case kRepWord16: 63 case kRepWord16:
63 opcode = kIA32LoadWord16; 64 opcode = typ == kTypeInt32 ? kIA32Movsxwl : kIA32Movzxwl;
64 break; 65 break;
65 case kRepTagged: // Fall through. 66 case kRepTagged: // Fall through.
66 case kRepWord32: 67 case kRepWord32:
67 opcode = kIA32LoadWord32; 68 opcode = kIA32Movl;
68 break; 69 break;
69 default: 70 default:
70 UNREACHABLE(); 71 UNREACHABLE();
71 return; 72 return;
72 } 73 }
73 if (g.CanBeImmediate(base)) { 74 if (g.CanBeImmediate(base)) {
74 if (Int32Matcher(index).Is(0)) { // load [#base + #0] 75 if (Int32Matcher(index).Is(0)) { // load [#base + #0]
75 Emit(opcode | AddressingModeField::encode(kMode_MI), output, 76 Emit(opcode | AddressingModeField::encode(kMode_MI), output,
76 g.UseImmediate(base)); 77 g.UseImmediate(base));
77 } else { // load [#base + %index] 78 } else { // load [#base + %index]
(...skipping 24 matching lines...) Expand all
102 // TODO(dcarney): refactor RecordWrite function to take temp registers 103 // TODO(dcarney): refactor RecordWrite function to take temp registers
103 // and pass them here instead of using fixed regs 104 // and pass them here instead of using fixed regs
104 // TODO(dcarney): handle immediate indices. 105 // TODO(dcarney): handle immediate indices.
105 InstructionOperand* temps[] = {g.TempRegister(ecx), g.TempRegister(edx)}; 106 InstructionOperand* temps[] = {g.TempRegister(ecx), g.TempRegister(edx)};
106 Emit(kIA32StoreWriteBarrier, NULL, g.UseFixed(base, ebx), 107 Emit(kIA32StoreWriteBarrier, NULL, g.UseFixed(base, ebx),
107 g.UseFixed(index, ecx), g.UseFixed(value, edx), ARRAY_SIZE(temps), 108 g.UseFixed(index, ecx), g.UseFixed(value, edx), ARRAY_SIZE(temps),
108 temps); 109 temps);
109 return; 110 return;
110 } 111 }
111 DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind); 112 DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind);
112 bool is_immediate = false;
113 InstructionOperand* val; 113 InstructionOperand* val;
114 if (rep == kRepFloat64) { 114 if (rep == kRepFloat64) {
115 val = g.UseDoubleRegister(value); 115 val = g.UseDoubleRegister(value);
116 } else { 116 } else {
117 is_immediate = g.CanBeImmediate(value); 117 if (g.CanBeImmediate(value)) {
118 if (is_immediate) {
119 val = g.UseImmediate(value); 118 val = g.UseImmediate(value);
120 } else if (rep == kRepWord8 || rep == kRepBit) { 119 } else if (rep == kRepWord8 || rep == kRepBit) {
121 val = g.UseByteRegister(value); 120 val = g.UseByteRegister(value);
122 } else { 121 } else {
123 val = g.UseRegister(value); 122 val = g.UseRegister(value);
124 } 123 }
125 } 124 }
126 ArchOpcode opcode; 125 ArchOpcode opcode;
127 switch (rep) { 126 switch (rep) {
128 case kRepFloat64: 127 case kRepFloat64:
129 opcode = kSSEStore; 128 opcode = kIA32Movsd;
130 break; 129 break;
131 case kRepBit: // Fall through. 130 case kRepBit: // Fall through.
132 case kRepWord8: 131 case kRepWord8:
133 opcode = is_immediate ? kIA32StoreWord8I : kIA32StoreWord8; 132 opcode = kIA32Movb;
134 break; 133 break;
135 case kRepWord16: 134 case kRepWord16:
136 opcode = is_immediate ? kIA32StoreWord16I : kIA32StoreWord16; 135 opcode = kIA32Movw;
137 break; 136 break;
138 case kRepTagged: // Fall through. 137 case kRepTagged: // Fall through.
139 case kRepWord32: 138 case kRepWord32:
140 opcode = is_immediate ? kIA32StoreWord32I : kIA32StoreWord32; 139 opcode = kIA32Movl;
141 break; 140 break;
142 default: 141 default:
143 UNREACHABLE(); 142 UNREACHABLE();
144 return; 143 return;
145 } 144 }
146 if (g.CanBeImmediate(base)) { 145 if (g.CanBeImmediate(base)) {
147 if (Int32Matcher(index).Is(0)) { // store [#base], %|#value 146 if (Int32Matcher(index).Is(0)) { // store [#base], %|#value
148 Emit(opcode | AddressingModeField::encode(kMode_MI), NULL, 147 Emit(opcode | AddressingModeField::encode(kMode_MI), NULL,
149 g.UseImmediate(base), val); 148 g.UseImmediate(base), val);
150 } else { // store [#base + %index], %|#value 149 } else { // store [#base + %index], %|#value
(...skipping 416 matching lines...) Expand 10 before | Expand all | Expand 10 after
567 if (descriptor->kind() == CallDescriptor::kCallAddress && 566 if (descriptor->kind() == CallDescriptor::kCallAddress &&
568 buffer.pushed_nodes.size() > 0) { 567 buffer.pushed_nodes.size() > 0) {
569 DCHECK(deoptimization == NULL && continuation == NULL); 568 DCHECK(deoptimization == NULL && continuation == NULL);
570 Emit(kPopStack | MiscField::encode(buffer.pushed_nodes.size()), NULL); 569 Emit(kPopStack | MiscField::encode(buffer.pushed_nodes.size()), NULL);
571 } 570 }
572 } 571 }
573 572
574 } // namespace compiler 573 } // namespace compiler
575 } // namespace internal 574 } // namespace internal
576 } // namespace v8 575 } // namespace v8
OLDNEW
« no previous file with comments | « src/compiler/ia32/instruction-codes-ia32.h ('k') | src/compiler/instruction.h » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698