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| 1 //===- subzero/src/llvm2ice.cpp - Driver for testing ----------------------===// | 1 //===- subzero/src/llvm2ice.cpp - Driver for testing ----------------------===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 // | 9 // |
| 10 // This file defines a driver that uses LLVM capabilities to parse a | 10 // This file defines a driver that uses LLVM capabilities to parse a |
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| 52 cl::values( | 52 cl::values( |
| 53 clEnumValN(Ice::Target_X8632, "x8632", "x86-32"), | 53 clEnumValN(Ice::Target_X8632, "x8632", "x86-32"), |
| 54 clEnumValN(Ice::Target_X8632, "x86-32", "x86-32 (same as x8632)"), | 54 clEnumValN(Ice::Target_X8632, "x86-32", "x86-32 (same as x8632)"), |
| 55 clEnumValN(Ice::Target_X8632, "x86_32", "x86-32 (same as x8632)"), | 55 clEnumValN(Ice::Target_X8632, "x86_32", "x86-32 (same as x8632)"), |
| 56 clEnumValN(Ice::Target_X8664, "x8664", "x86-64"), | 56 clEnumValN(Ice::Target_X8664, "x8664", "x86-64"), |
| 57 clEnumValN(Ice::Target_X8664, "x86-64", "x86-64 (same as x8664)"), | 57 clEnumValN(Ice::Target_X8664, "x86-64", "x86-64 (same as x8664)"), |
| 58 clEnumValN(Ice::Target_X8664, "x86_64", "x86-64 (same as x8664)"), | 58 clEnumValN(Ice::Target_X8664, "x86_64", "x86-64 (same as x8664)"), |
| 59 clEnumValN(Ice::Target_ARM32, "arm", "arm32"), | 59 clEnumValN(Ice::Target_ARM32, "arm", "arm32"), |
| 60 clEnumValN(Ice::Target_ARM32, "arm32", "arm32 (same as arm)"), | 60 clEnumValN(Ice::Target_ARM32, "arm32", "arm32 (same as arm)"), |
| 61 clEnumValN(Ice::Target_ARM64, "arm64", "arm64"), clEnumValEnd)); | 61 clEnumValN(Ice::Target_ARM64, "arm64", "arm64"), clEnumValEnd)); |
| 62 static cl::opt<bool> UseSandboxing("sandbox", cl::desc("Use sandboxing")); | |
| 63 static cl::opt<bool> | 62 static cl::opt<bool> |
| 64 FunctionSections("ffunction-sections", | 63 FunctionSections("ffunction-sections", |
| 65 cl::desc("Emit functions into separate sections")); | 64 cl::desc("Emit functions into separate sections")); |
| 66 static cl::opt<Ice::OptLevel> | 65 static cl::opt<Ice::OptLevel> |
| 67 OptLevel(cl::desc("Optimization level"), cl::init(Ice::Opt_m1), | 66 OptLevel(cl::desc("Optimization level"), cl::init(Ice::Opt_m1), |
| 68 cl::value_desc("level"), | 67 cl::value_desc("level"), |
| 69 cl::values(clEnumValN(Ice::Opt_m1, "Om1", "-1"), | 68 cl::values(clEnumValN(Ice::Opt_m1, "Om1", "-1"), |
| 70 clEnumValN(Ice::Opt_m1, "O-1", "-1"), | 69 clEnumValN(Ice::Opt_m1, "O-1", "-1"), |
| 71 clEnumValN(Ice::Opt_0, "O0", "0"), | 70 clEnumValN(Ice::Opt_0, "O0", "0"), |
| 72 clEnumValN(Ice::Opt_1, "O1", "1"), | 71 clEnumValN(Ice::Opt_1, "O1", "1"), |
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| 129 } | 128 } |
| 130 raw_os_ostream *Ls = new raw_os_ostream(LogFilename == "-" ? std::cout : Lfs); | 129 raw_os_ostream *Ls = new raw_os_ostream(LogFilename == "-" ? std::cout : Lfs); |
| 131 Ls->SetUnbuffered(); | 130 Ls->SetUnbuffered(); |
| 132 | 131 |
| 133 Ice::ClFlags Flags; | 132 Ice::ClFlags Flags; |
| 134 Flags.DisableInternal = DisableInternal; | 133 Flags.DisableInternal = DisableInternal; |
| 135 Flags.SubzeroTimingEnabled = SubzeroTimingEnabled; | 134 Flags.SubzeroTimingEnabled = SubzeroTimingEnabled; |
| 136 Flags.DisableTranslation = DisableTranslation; | 135 Flags.DisableTranslation = DisableTranslation; |
| 137 Flags.DisableGlobals = DisableGlobals; | 136 Flags.DisableGlobals = DisableGlobals; |
| 138 Flags.FunctionSections = FunctionSections; | 137 Flags.FunctionSections = FunctionSections; |
| 139 Flags.UseSandboxing = UseSandboxing; | |
| 140 | 138 |
| 141 Ice::GlobalContext Ctx(Ls, Os, VMask, TargetArch, OptLevel, TestPrefix, | 139 Ice::GlobalContext Ctx(Ls, Os, VMask, TargetArch, OptLevel, TestPrefix, |
| 142 Flags); | 140 Flags); |
| 143 | 141 |
| 144 if (BuildOnRead) { | 142 if (BuildOnRead) { |
| 145 Ice::PNaClTranslator Translator(&Ctx); | 143 Ice::PNaClTranslator Translator(&Ctx); |
| 146 Translator.translate(IRFilename); | 144 Translator.translate(IRFilename); |
| 147 return Translator.getErrorStatus(); | 145 return Translator.getErrorStatus(); |
| 148 } else { | 146 } else { |
| 149 // Parse the input LLVM IR file into a module. | 147 // Parse the input LLVM IR file into a module. |
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| 160 if (!Mod) { | 158 if (!Mod) { |
| 161 Err.print(argv[0], errs()); | 159 Err.print(argv[0], errs()); |
| 162 return 1; | 160 return 1; |
| 163 } | 161 } |
| 164 | 162 |
| 165 Ice::Converter Converter(&Ctx); | 163 Ice::Converter Converter(&Ctx); |
| 166 Converter.convertToIce(Mod); | 164 Converter.convertToIce(Mod); |
| 167 return Converter.getErrorStatus(); | 165 return Converter.getErrorStatus(); |
| 168 } | 166 } |
| 169 } | 167 } |
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