[turbofan] Add backend support for load/store float32 values.

src/compiler/ia32/instruction-selector-ia32.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler/node-properties-inl.h"
 
 namespace v8 {
 namespace internal {
@@ skipping 29 matching lines @@
 };
 
 
 void InstructionSelector::VisitLoad(Node* node) {
   MachineType rep = RepresentationOf(OpParameter<MachineType>(node));
   MachineType typ = TypeOf(OpParameter<MachineType>(node));
   IA32OperandGenerator g(this);
   Node* base = node->InputAt(0);
   Node* index = node->InputAt(1);
 
-  InstructionOperand* output = rep == kRepFloat64
+  InstructionOperand* output = (rep == kRepFloat32 || rep == kRepFloat64)
                                    ? g.DefineAsDoubleRegister(node)
                                    : g.DefineAsRegister(node);
   ArchOpcode opcode;
   // TODO(titzer): signed/unsigned small loads
   switch (rep) {
+    case kRepFloat32:
+      opcode = kIA32Movss;
+      break;
     case kRepFloat64:
       opcode = kIA32Movsd;
       break;
     case kRepBit:  // Fall through.
     case kRepWord8:
       opcode = typ == kTypeInt32 ? kIA32Movsxbl : kIA32Movzxbl;
       break;
     case kRepWord16:
       opcode = typ == kTypeInt32 ? kIA32Movsxwl : kIA32Movzxwl;
       break;
@@ skipping 38 matching lines @@
     //                and pass them here instead of using fixed regs
     // TODO(dcarney): handle immediate indices.
     InstructionOperand* temps[] = {g.TempRegister(ecx), g.TempRegister(edx)};
     Emit(kIA32StoreWriteBarrier, NULL, g.UseFixed(base, ebx),
          g.UseFixed(index, ecx), g.UseFixed(value, edx), ARRAY_SIZE(temps),
          temps);
     return;
   }
   DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind);
   InstructionOperand* val;
-  if (rep == kRepFloat64) {
+  if (rep == kRepFloat32 || rep == kRepFloat64) {
     val = g.UseDoubleRegister(value);
   } else {
     if (g.CanBeImmediate(value)) {
       val = g.UseImmediate(value);
     } else if (rep == kRepWord8 || rep == kRepBit) {
       val = g.UseByteRegister(value);
     } else {
       val = g.UseRegister(value);
     }
   }
   ArchOpcode opcode;
   switch (rep) {
+    case kRepFloat32:
+      opcode = kIA32Movss;
+      break;
     case kRepFloat64:
       opcode = kIA32Movsd;
       break;
     case kRepBit:  // Fall through.
     case kRepWord8:
       opcode = kIA32Movb;
       break;
     case kRepWord16:
       opcode = kIA32Movw;
       break;
@@ skipping 429 matching lines @@
   if (descriptor->kind() == CallDescriptor::kCallAddress &&
       buffer.pushed_nodes.size() > 0) {
     DCHECK(deoptimization == NULL && continuation == NULL);
     Emit(kPopStack | MiscField::encode(buffer.pushed_nodes.size()), NULL);
   }
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8