Chromium Code Reviews| Index: src/arm/assembler-thumb2.cc |
| =================================================================== |
| --- src/arm/assembler-thumb2.cc (revision 3473) |
| +++ src/arm/assembler-thumb2.cc (working copy) |
| @@ -371,6 +371,7 @@ |
| current_position_ = RelocInfo::kNoPosition; |
| written_statement_position_ = current_statement_position_; |
| written_position_ = current_position_; |
| + thumb_mode_ = false; |
| } |
| @@ -559,6 +560,8 @@ |
| void Assembler::bind(Label* L) { |
| ASSERT(!L->is_bound()); // label can only be bound once |
| + if (thumb_mode_) |
|
Erik Corry
2009/12/17 14:05:50
I think we should assert here that we are not in a
|
| + forceArmMode(); |
| bind_to(L, pc_offset()); |
| } |
| @@ -618,7 +621,40 @@ |
| return true; |
| } |
|
Erik Corry
2009/12/17 14:05:50
Double blank lines between functions.
|
| +void Assembler::forceThumbMode() { |
|
Erik Corry
2009/12/17 14:05:50
Google style is to use CaptializedCamelCase for fu
|
| + if (thumb_mode_) |
| + return; |
|
Erik Corry
2009/12/17 14:05:50
Multiline if.
|
| + // PC is at the current instruction + 8 bytes in ARM mode, so we |
| + // need to subtract 3 to get the next thumb instruction and enter |
| + // thumb mode. We encoder this by hand, because the sub() |
|
Erik Corry
2009/12/17 14:05:50
encoder -> encode
sub() -> sub
|
| + // instruction should thumb |
|
Erik Corry
2009/12/17 14:05:50
its nose?
|
| + ASSERT((pc_offset() & 1) == 0); |
| + emit(al | B25 | B22 | pc.code() * B16 | pc.code() * B12 | 3); |
| + thumb_mode_ = true; |
| + // The thumb instructions follow at once with no padding |
|
Erik Corry
2009/12/17 14:05:50
Please use full stops at the end of comments.
|
| + ASSERT((pc_offset() & 1) == 0); |
| +} |
| +void Assembler::forceArmMode() { |
|
Erik Corry
2009/12/17 14:05:50
CamelCase.
|
| + if (!thumb_mode_) |
|
Erik Corry
2009/12/17 14:05:50
Multiline if.
|
| + return; |
| + // PC is 4 bytes ahead of the current instruction, and the instruction |
|
Erik Corry
2009/12/17 14:05:50
4 or 8?
|
| + // we emit will always be 4 bytes. |
| + ASSERT((pc_offset() & 1) == 0); |
| + if (pc_offset() & 2) { |
| + // ADD pc, pc, #1 |
| + emitThumb(16*B12| 8 * B5 | pc.code()); |
| + emitThumb(pc.code() * B8 | 1); |
| + pc_ += 2; // Padding |
| + } else { |
| + // SUB pc, pc, #1 |
| + emitThumb(16*B12| 13 * B5 | pc.code()); |
| + emitThumb(pc.code() * B8 | 1); |
| + } |
| + thumb_mode_ = false; |
| + ASSERT((pc_offset() & 3) == 0); |
| +} |
| + |
| void Assembler::addrmod1(Instr instr, |
| Register rn, |
| Register rd, |
| @@ -635,6 +671,7 @@ |
| // it first to register ip and change the original instruction to use ip. |
| // However, if the original instruction is a 'mov rd, x' (not setting the |
| // condition code), then replace it with a 'ldr rd, [pc]' |
| + forceArmMode(); |
|
Erik Corry
2009/12/17 14:05:50
Why do we need this here. It deserves a comment e
|
| RecordRelocInfo(x.rmode_, x.imm32_); |
| CHECK(!rn.is(ip)); // rn should never be ip, or will be trashed |
| Condition cond = static_cast<Condition>(instr & CondMask); |
| @@ -864,6 +901,9 @@ |
| void Assembler::sub(Register dst, Register src1, const Operand& src2, |
| SBit s, Condition cond) { |
| + // For testing purposes, a gratuitous diversion into thumb |
|
Erik Corry
2009/12/17 14:05:50
This isn't for testing, this is for real!
(But you
|
| + if (no_const_pool_before_ < pc_offset()) |
| + forceThumbMode(); |
| addrmod1(cond | 2*B21 | s, src1, dst, src2); |
| } |