Moves SingleStepHandler runtime calls

runtime/vm/stub_code_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/assembler.h"
 #include "vm/code_generator.h"
 #include "vm/compiler.h"
@@ skipping 1620 matching lines @@
     __ lw(T0, FieldAddress(S5, ICData::state_bits_offset()));
     ASSERT(ICData::NumArgsTestedShift() == 0);  // No shift needed.
     __ andi(T0, T0, Immediate(ICData::NumArgsTestedMask()));
     __ beq(T0, ZR, &ok);
     __ Stop("Incorrect IC data for unoptimized static call");
     __ Bind(&ok);
   }
 #endif  // DEBUG
 
   // Check single stepping.
-  Label not_stepping;
+  Label stepping, done_stepping;
   __ lw(T0, FieldAddress(CTX, Context::isolate_offset()));
   __ lbu(T0, Address(T0, Isolate::single_step_offset()));
-  __ BranchEqual(T0, 0, &not_stepping);
-  // Call single step callback in debugger.
-  __ EnterStubFrame();
-  __ addiu(SP, SP, Immediate(-2 * kWordSize));
-  __ sw(S5, Address(SP, 1 * kWordSize));  // Preserve IC data.
-  __ sw(RA, Address(SP, 0 * kWordSize));  // Return address.
-  __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0);
-  __ lw(RA, Address(SP, 0 * kWordSize));
-  __ lw(S5, Address(SP, 1 * kWordSize));
-  __ addiu(SP, SP, Immediate(2 * kWordSize));
-  __ LeaveStubFrame();
-  __ Bind(&not_stepping);
+  __ BranchNotEqual(T0, 0, &stepping);
+  __ Bind(&done_stepping);
 
   // S5: IC data object (preserved).
   __ lw(T0, FieldAddress(S5, ICData::ic_data_offset()));
   // T0: ic_data_array with entries: target functions and count.
   __ AddImmediate(T0, Array::data_offset() - kHeapObjectTag);
   // T0: points directly to the first ic data array element.
   const intptr_t target_offset = ICData::TargetIndexFor(0) * kWordSize;
   const intptr_t count_offset = ICData::CountIndexFor(0) * kWordSize;
 
   // Increment count for this call.
-  Label increment_done;
   __ lw(T4, Address(T0, count_offset));
-  __ AddImmediateDetectOverflow(T4, T4, Smi::RawValue(1), T5, T6);
-  __ bgez(T5, &increment_done);  // No overflow.
-  __ delay_slot()->sw(T4, Address(T0, count_offset));
-
-  __ LoadImmediate(T1, Smi::RawValue(Smi::kMaxValue));
-  __ sw(T1, Address(T0, count_offset));
-
-  __ Bind(&increment_done);
+  __ AddImmediateDetectOverflow(T7, T4, Smi::RawValue(1), T5, T6);
+  __ slt(CMPRES1, T5, ZR);  // T5 is < 0 if there was overflow.
+  __ LoadImmediate(T4, Smi::RawValue(Smi::kMaxValue));
+  __ movz(T4, T7, CMPRES1);
+  __ sw(T4, Address(T0, count_offset));
 
   // Load arguments descriptor into S4.
   __ lw(S4,  FieldAddress(S5, ICData::arguments_descriptor_offset()));
 
   // Get function and call it, if possible.
   __ lw(T0, Address(T0, target_offset));
   __ lw(T4, FieldAddress(T0, Function::instructions_offset()));
 
   // T4: target instructions.
   __ AddImmediate(T4, Instructions::HeaderSize() - kHeapObjectTag);
   __ jr(T4);
+
+  // Call single step callback in debugger.
+  __ Bind(&stepping);
+  __ EnterStubFrame();
+  __ addiu(SP, SP, Immediate(-2 * kWordSize));
+  __ sw(S5, Address(SP, 1 * kWordSize));  // Preserve IC data.
+  __ sw(RA, Address(SP, 0 * kWordSize));  // Return address.
+  __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0);
+  __ lw(RA, Address(SP, 0 * kWordSize));
+  __ lw(S5, Address(SP, 1 * kWordSize));
+  __ addiu(SP, SP, Immediate(2 * kWordSize));
+  __ LeaveStubFrame();
+  __ b(&done_stepping);
 }
 
 
 void StubCode::GenerateTwoArgsUnoptimizedStaticCallStub(Assembler* assembler) {
   GenerateUsageCounterIncrement(assembler, T0);
   GenerateNArgsCheckInlineCacheStub(
       assembler, 2, kStaticCallMissHandlerTwoArgsRuntimeEntry);
 }
 
 
@@ skipping 75 matching lines @@
   __ addiu(SP, SP, Immediate(3 * kWordSize));
   __ LeaveStubFrame();
   __ jr(T0);
 }
 
 
 // Called only from unoptimized code. All relevant registers have been saved.
 // RA: return address.
 void StubCode::GenerateDebugStepCheckStub(Assembler* assembler) {
   // Check single stepping.
-  Label not_stepping;
+  Label stepping, done_stepping;
   __ lw(T0, FieldAddress(CTX, Context::isolate_offset()));
   __ lbu(T0, Address(T0, Isolate::single_step_offset()));
-  __ BranchEqual(T0, 0, &not_stepping);
+  __ BranchNotEqual(T0, 0, &stepping);
+  __ Bind(&done_stepping);
+
+  __ Ret();
+
   // Call single step callback in debugger.
+  __ Bind(&stepping);
   __ EnterStubFrame();
   __ addiu(SP, SP, Immediate(-1 * kWordSize));
   __ sw(RA, Address(SP, 0 * kWordSize));  // Return address.
   __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0);
   __ lw(RA, Address(SP, 0 * kWordSize));
   __ addiu(SP, SP, Immediate(1 * kWordSize));
   __ LeaveStubFrame();
-  __ Bind(&not_stepping);
-
-  __ Ret();
+  __ b(&done_stepping);
 }
 
 
 // Used to check class and type arguments. Arguments passed in registers:
 // RA: return address.
 // A0: instance (must be preserved).
 // A1: instantiator type arguments or NULL.
 // A2: cache array.
 // Result in V0: null -> not found, otherwise result (true or false).
 static void GenerateSubtypeNTestCacheStub(Assembler* assembler, int n) {
@@ skipping 250 matching lines @@
 
 
 // Called only from unoptimized code. All relevant registers have been saved.
 // RA: return address.
 // SP + 4: left operand.
 // SP + 0: right operand.
 // Returns: CMPRES1 is zero if equal, non-zero otherwise.
 void StubCode::GenerateUnoptimizedIdenticalWithNumberCheckStub(
     Assembler* assembler) {
   // Check single stepping.
-  Label not_stepping;
+  Label stepping, done_stepping;
   __ lw(T0, FieldAddress(CTX, Context::isolate_offset()));
   __ lbu(T0, Address(T0, Isolate::single_step_offset()));
-  __ BranchEqual(T0, 0, &not_stepping);
-  // Call single step callback in debugger.
-  __ EnterStubFrame();
-  __ addiu(SP, SP, Immediate(-1 * kWordSize));
-  __ sw(RA, Address(SP, 0 * kWordSize));  // Return address.
-  __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0);
-  __ lw(RA, Address(SP, 0 * kWordSize));
-  __ addiu(SP, SP, Immediate(1 * kWordSize));
-  __ LeaveStubFrame();
-  __ Bind(&not_stepping);
+  __ BranchNotEqual(T0, 0, &stepping);
+  __ Bind(&done_stepping);
 
   const Register temp1 = T2;
   const Register temp2 = T3;
   const Register left = T1;
   const Register right = T0;
   __ lw(left, Address(SP, 1 * kWordSize));
   __ lw(right, Address(SP, 0 * kWordSize));
   GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2);
   __ Ret();
+
+  // Call single step callback in debugger.
+  __ Bind(&stepping);
+  __ EnterStubFrame();
+  __ addiu(SP, SP, Immediate(-1 * kWordSize));
+  __ sw(RA, Address(SP, 0 * kWordSize));  // Return address.
+  __ CallRuntime(kSingleStepHandlerRuntimeEntry, 0);
+  __ lw(RA, Address(SP, 0 * kWordSize));
+  __ addiu(SP, SP, Immediate(1 * kWordSize));
+  __ LeaveStubFrame();
+  __ b(&done_stepping);
 }
 
 
 // Called from optimized code only.
 // SP + 4: left operand.
 // SP + 0: right operand.
 // Returns: CMPRES1 is zero if equal, non-zero otherwise.
 void StubCode::GenerateOptimizedIdenticalWithNumberCheckStub(
     Assembler* assembler) {
   const Register temp1 = T2;
   const Register temp2 = T3;
   const Register left = T1;
   const Register right = T0;
   __ lw(left, Address(SP, 1 * kWordSize));
   __ lw(right, Address(SP, 0 * kWordSize));
   GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2);
   __ Ret();
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS