| Index: src/trusted/validator_ragel/testdata/64bit_regular.golden
|
| ===================================================================
|
| --- src/trusted/validator_ragel/testdata/64bit_regular.golden (revision 0)
|
| +++ src/trusted/validator_ragel/testdata/64bit_regular.golden (revision 0)
|
| @@ -0,0 +1,1529 @@
|
| +Instruction: 0f 0b ud2; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 0f 80 00 00 00 00 jo,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 0f 81 00 00 00 00 jno,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 0f 82 00 00 00 00 jb,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 0f 83 00 00 00 00 jae,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 0f 84 00 00 00 00 je,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 0f 85 00 00 00 00 jne,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 0f 86 00 00 00 00 jbe,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 0f 87 00 00 00 00 ja,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 0f 88 00 00 00 00 js,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 0f 89 00 00 00 00 jns,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 0f 8a 00 00 00 00 jp,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 0f 8b 00 00 00 00 jnp,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 0f 8c 00 00 00 00 jl,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 0f 8d 00 00 00 00 jge,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 0f 8e 00 00 00 00 jle,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 0f 8f 00 00 00 00 jg,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 70 00 jo,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 71 00 jno,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 72 00 jb,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 73 00 jae,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 74 00 je,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 75 00 jne,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 76 00 jbe,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 77 00 ja,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 78 00 js,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 79 00 jns,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 7a 00 jp,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 7b 00 jnp,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 7c 00 jl,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 7d 00 jge,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 7e 00 jle,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? 7f 00 jg,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 2e [REX:40..4f]? e3 00 jrcxz,pn %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 0f 80 00 00 00 00 jo,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 0f 81 00 00 00 00 jno,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 0f 82 00 00 00 00 jb,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 0f 83 00 00 00 00 jae,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 0f 84 00 00 00 00 je,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 0f 85 00 00 00 00 jne,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 0f 86 00 00 00 00 jbe,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 0f 87 00 00 00 00 ja,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 0f 88 00 00 00 00 js,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 0f 89 00 00 00 00 jns,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 0f 8a 00 00 00 00 jp,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 0f 8b 00 00 00 00 jnp,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 0f 8c 00 00 00 00 jl,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 0f 8d 00 00 00 00 jge,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 0f 8e 00 00 00 00 jle,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 0f 8f 00 00 00 00 jg,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 70 00 jo,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 71 00 jno,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 72 00 jb,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 73 00 jae,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 74 00 je,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 75 00 jne,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 76 00 jbe,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 77 00 ja,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 78 00 js,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 79 00 jns,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 7a 00 jp,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 7b 00 jnp,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 7c 00 jl,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 7d 00 jge,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 7e 00 jle,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? 7f 00 jg,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 3e [REX:40..4f]? e3 00 jrcxz,pt %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 40 rex; 9b fwait; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 40 5[89abef] pop [%rax..%rdi]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 40 90 xchg %eax,%eax; input_rr=any_nonspecial; output_rr=%eax
|
| +Instruction: 40 91 xchg %eax,%ecx; input_rr=any_nonspecial; output_rr=%ecx
|
| +Instruction: 40 92 xchg %eax,%edx; input_rr=any_nonspecial; output_rr=%edx
|
| +Instruction: 40 93 xchg %eax,%ebx; input_rr=any_nonspecial; output_rr=%ebx
|
| +Instruction: 40 94 xchg %eax,%esp; input_rr=any_nonspecial; output_rr=%esp
|
| +Instruction: 40 95 xchg %eax,%ebp; input_rr=any_nonspecial; output_rr=%ebp
|
| +Instruction: 40 96 xchg %eax,%esi; input_rr=any_nonspecial; output_rr=%esi
|
| +Instruction: 40 97 xchg %eax,%edi; input_rr=any_nonspecial; output_rr=%edi
|
| +Instruction: 40 b[012367] 00 mov $0x0,[%al..%dil]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 40 b[8..f] 00 00 00 00 mov $0x0,[%eax..%edi]; input_rr=any_nonspecial; output_rr=[%eax..%edi]
|
| +Instruction: 41 rex.B; 9b fwait; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 41 5[8..e] pop [%r8..%r14]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 41 90 xchg %eax,%r8d; input_rr=any_nonspecial; output_rr=%r8d
|
| +Instruction: 41 91 xchg %eax,%r9d; input_rr=any_nonspecial; output_rr=%r9d
|
| +Instruction: 41 92 xchg %eax,%r10d; input_rr=any_nonspecial; output_rr=%r10d
|
| +Instruction: 41 93 xchg %eax,%r11d; input_rr=any_nonspecial; output_rr=%r11d
|
| +Instruction: 41 94 xchg %eax,%r12d; input_rr=any_nonspecial; output_rr=%r12d
|
| +Instruction: 41 95 xchg %eax,%r13d; input_rr=any_nonspecial; output_rr=%r13d
|
| +Instruction: 41 96 xchg %eax,%r14d; input_rr=any_nonspecial; output_rr=%r14d
|
| +Instruction: 41 b[0..6] 00 mov $0x0,[%r8b..%r14b]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 41 b[8..e] 00 00 00 00 mov $0x0,[%r8d..%r14d]; input_rr=any_nonspecial; output_rr=[%r8d..%r14d]
|
| +Instruction: 42 rex.X; 9b fwait; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 42 5[89abef] pop [%rax..%rdi]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 42 90 xchg %eax,%eax; input_rr=any_nonspecial; output_rr=%eax
|
| +Instruction: 42 91 xchg %eax,%ecx; input_rr=any_nonspecial; output_rr=%ecx
|
| +Instruction: 42 92 xchg %eax,%edx; input_rr=any_nonspecial; output_rr=%edx
|
| +Instruction: 42 93 xchg %eax,%ebx; input_rr=any_nonspecial; output_rr=%ebx
|
| +Instruction: 42 94 xchg %eax,%esp; input_rr=any_nonspecial; output_rr=%esp
|
| +Instruction: 42 95 xchg %eax,%ebp; input_rr=any_nonspecial; output_rr=%ebp
|
| +Instruction: 42 96 xchg %eax,%esi; input_rr=any_nonspecial; output_rr=%esi
|
| +Instruction: 42 97 xchg %eax,%edi; input_rr=any_nonspecial; output_rr=%edi
|
| +Instruction: 42 b[012367] 00 mov $0x0,[%al..%dil]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 42 b[8..f] 00 00 00 00 mov $0x0,[%eax..%edi]; input_rr=any_nonspecial; output_rr=[%eax..%edi]
|
| +Instruction: 43 rex.XB; 9b fwait; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 43 5[8..e] pop [%r8..%r14]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 43 90 xchg %eax,%r8d; input_rr=any_nonspecial; output_rr=%r8d
|
| +Instruction: 43 91 xchg %eax,%r9d; input_rr=any_nonspecial; output_rr=%r9d
|
| +Instruction: 43 92 xchg %eax,%r10d; input_rr=any_nonspecial; output_rr=%r10d
|
| +Instruction: 43 93 xchg %eax,%r11d; input_rr=any_nonspecial; output_rr=%r11d
|
| +Instruction: 43 94 xchg %eax,%r12d; input_rr=any_nonspecial; output_rr=%r12d
|
| +Instruction: 43 95 xchg %eax,%r13d; input_rr=any_nonspecial; output_rr=%r13d
|
| +Instruction: 43 96 xchg %eax,%r14d; input_rr=any_nonspecial; output_rr=%r14d
|
| +Instruction: 43 b[0..6] 00 mov $0x0,[%r8b..%r14b]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 43 b[8..e] 00 00 00 00 mov $0x0,[%r8d..%r14d]; input_rr=any_nonspecial; output_rr=[%r8d..%r14d]
|
| +Instruction: 44 rex.R; 9b fwait; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 44 5[89abef] pop [%rax..%rdi]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 44 90 xchg %eax,%eax; input_rr=any_nonspecial; output_rr=%eax
|
| +Instruction: 44 91 xchg %eax,%ecx; input_rr=any_nonspecial; output_rr=%ecx
|
| +Instruction: 44 92 xchg %eax,%edx; input_rr=any_nonspecial; output_rr=%edx
|
| +Instruction: 44 93 xchg %eax,%ebx; input_rr=any_nonspecial; output_rr=%ebx
|
| +Instruction: 44 94 xchg %eax,%esp; input_rr=any_nonspecial; output_rr=%esp
|
| +Instruction: 44 95 xchg %eax,%ebp; input_rr=any_nonspecial; output_rr=%ebp
|
| +Instruction: 44 96 xchg %eax,%esi; input_rr=any_nonspecial; output_rr=%esi
|
| +Instruction: 44 97 xchg %eax,%edi; input_rr=any_nonspecial; output_rr=%edi
|
| +Instruction: 44 b[012367] 00 mov $0x0,[%al..%dil]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 44 b[8..f] 00 00 00 00 mov $0x0,[%eax..%edi]; input_rr=any_nonspecial; output_rr=[%eax..%edi]
|
| +Instruction: 45 rex.RB; 9b fwait; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 45 5[8..e] pop [%r8..%r14]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 45 90 xchg %eax,%r8d; input_rr=any_nonspecial; output_rr=%r8d
|
| +Instruction: 45 91 xchg %eax,%r9d; input_rr=any_nonspecial; output_rr=%r9d
|
| +Instruction: 45 92 xchg %eax,%r10d; input_rr=any_nonspecial; output_rr=%r10d
|
| +Instruction: 45 93 xchg %eax,%r11d; input_rr=any_nonspecial; output_rr=%r11d
|
| +Instruction: 45 94 xchg %eax,%r12d; input_rr=any_nonspecial; output_rr=%r12d
|
| +Instruction: 45 95 xchg %eax,%r13d; input_rr=any_nonspecial; output_rr=%r13d
|
| +Instruction: 45 96 xchg %eax,%r14d; input_rr=any_nonspecial; output_rr=%r14d
|
| +Instruction: 45 b[0..6] 00 mov $0x0,[%r8b..%r14b]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 45 b[8..e] 00 00 00 00 mov $0x0,[%r8d..%r14d]; input_rr=any_nonspecial; output_rr=[%r8d..%r14d]
|
| +Instruction: 46 rex.RX; 9b fwait; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 46 5[89abef] pop [%rax..%rdi]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 46 90 xchg %eax,%eax; input_rr=any_nonspecial; output_rr=%eax
|
| +Instruction: 46 91 xchg %eax,%ecx; input_rr=any_nonspecial; output_rr=%ecx
|
| +Instruction: 46 92 xchg %eax,%edx; input_rr=any_nonspecial; output_rr=%edx
|
| +Instruction: 46 93 xchg %eax,%ebx; input_rr=any_nonspecial; output_rr=%ebx
|
| +Instruction: 46 94 xchg %eax,%esp; input_rr=any_nonspecial; output_rr=%esp
|
| +Instruction: 46 95 xchg %eax,%ebp; input_rr=any_nonspecial; output_rr=%ebp
|
| +Instruction: 46 96 xchg %eax,%esi; input_rr=any_nonspecial; output_rr=%esi
|
| +Instruction: 46 97 xchg %eax,%edi; input_rr=any_nonspecial; output_rr=%edi
|
| +Instruction: 46 b[012367] 00 mov $0x0,[%al..%dil]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 46 b[8..f] 00 00 00 00 mov $0x0,[%eax..%edi]; input_rr=any_nonspecial; output_rr=[%eax..%edi]
|
| +Instruction: 47 rex.RXB; 9b fwait; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 47 5[8..e] pop [%r8..%r14]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 47 90 xchg %eax,%r8d; input_rr=any_nonspecial; output_rr=%r8d
|
| +Instruction: 47 91 xchg %eax,%r9d; input_rr=any_nonspecial; output_rr=%r9d
|
| +Instruction: 47 92 xchg %eax,%r10d; input_rr=any_nonspecial; output_rr=%r10d
|
| +Instruction: 47 93 xchg %eax,%r11d; input_rr=any_nonspecial; output_rr=%r11d
|
| +Instruction: 47 94 xchg %eax,%r12d; input_rr=any_nonspecial; output_rr=%r12d
|
| +Instruction: 47 95 xchg %eax,%r13d; input_rr=any_nonspecial; output_rr=%r13d
|
| +Instruction: 47 96 xchg %eax,%r14d; input_rr=any_nonspecial; output_rr=%r14d
|
| +Instruction: 47 b[0..6] 00 mov $0x0,[%r8b..%r14b]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 47 b[8..e] 00 00 00 00 mov $0x0,[%r8d..%r14d]; input_rr=any_nonspecial; output_rr=[%r8d..%r14d]
|
| +Instruction: 48 rex.W; 9b fwait; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 48 5[89abef] pop [%rax..%rdi]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 48 83 e4 [80..ff] and $0x[80..ff],%rsp; input_rr=any_nonspecial; output_rr=None # alignment and
|
| +Instruction: 48 89 e5 mov %rsp,%rbp; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 48 89 ec mov %rbp,%rsp; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 48 8b e5 mov %rbp,%rsp; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 48 8b ec mov %rsp,%rbp; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 48 90 nop; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 48 91 xchg %rax,%rcx; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 48 92 xchg %rax,%rdx; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 48 93 xchg %rax,%rbx; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 48 96 xchg %rax,%rsi; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 48 97 xchg %rax,%rdi; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 48 b[012367] 00 mov $0x0,[%al..%dil]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 48 b[89abef] 00 00 00 00 00 00 00 00 movabs $0x0,[%rax..%rdi]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 49 rex.WB; 9b fwait; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 49 03 e7 add %r15,%rsp; input_rr=%esp; output_rr=None
|
| +Instruction: 49 03 ef add %r15,%rbp; input_rr=%ebp; output_rr=None
|
| +Instruction: 49 0b e7 or %r15,%rsp; input_rr=%esp; output_rr=None
|
| +Instruction: 49 5[8..e] pop [%r8..%r14]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 49 90 xchg %rax,%r8; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 49 91 xchg %rax,%r9; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 49 92 xchg %rax,%r10; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 49 93 xchg %rax,%r11; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 49 94 xchg %rax,%r12; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 49 95 xchg %rax,%r13; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 49 96 xchg %rax,%r14; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 49 b[0..6] 00 mov $0x0,[%r8b..%r14b]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 49 b[8..e] 00 00 00 00 00 00 00 00 movabs $0x0,[%r8..%r14]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4a rex.WX; 9b fwait; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4a 5[89abef] pop [%rax..%rdi]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4a 89 e5 mov %rsp,%rbp; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4a 89 ec mov %rbp,%rsp; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4a 8b e5 mov %rbp,%rsp; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4a 8b ec mov %rsp,%rbp; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4a 8d 24 3c lea (%rsp,%r15,1),%rsp; input_rr=%esp; output_rr=None
|
| +Instruction: 4a 8d 64 3c 00 lea 0x0(%rsp,%r15,1),%rsp; input_rr=%esp; output_rr=None
|
| +Instruction: 4a 8d 6c 3d 00 lea 0x0(%rbp,%r15,1),%rbp; input_rr=%ebp; output_rr=None
|
| +Instruction: 4a 8d a4 3c 00 00 00 00 lea 0x0(%rsp,%r15,1),%rsp; input_rr=%esp; output_rr=None
|
| +Instruction: 4a 8d ac 3d 00 00 00 00 lea 0x0(%rbp,%r15,1),%rbp; input_rr=%ebp; output_rr=None
|
| +Instruction: 4a 90 xchg %rax,%rax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4a 91 xchg %rax,%rcx; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4a 92 xchg %rax,%rdx; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4a 93 xchg %rax,%rbx; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4a 96 xchg %rax,%rsi; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4a 97 xchg %rax,%rdi; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4a b[012367] 00 mov $0x0,[%al..%dil]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4a b[89abef] 00 00 00 00 00 00 00 00 movabs $0x0,[%rax..%rdi]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4b rex.WXB; 9b fwait; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4b 03 e7 add %r15,%rsp; input_rr=%esp; output_rr=None
|
| +Instruction: 4b 03 ef add %r15,%rbp; input_rr=%ebp; output_rr=None
|
| +Instruction: 4b 0b e7 or %r15,%rsp; input_rr=%esp; output_rr=None
|
| +Instruction: 4b 5[8..e] pop [%r8..%r14]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4b 90 xchg %rax,%r8; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4b 91 xchg %rax,%r9; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4b 92 xchg %rax,%r10; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4b 93 xchg %rax,%r11; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4b 94 xchg %rax,%r12; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4b 95 xchg %rax,%r13; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4b 96 xchg %rax,%r14; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4b b[0..6] 00 mov $0x0,[%r8b..%r14b]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4b b[8..e] 00 00 00 00 00 00 00 00 movabs $0x0,[%r8..%r14]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4c rex.WR; 9b fwait; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4c 01 fc add %r15,%rsp; input_rr=%esp; output_rr=None
|
| +Instruction: 4c 01 fd add %r15,%rbp; input_rr=%ebp; output_rr=None
|
| +Instruction: 4c 09 fc or %r15,%rsp; input_rr=%esp; output_rr=None
|
| +Instruction: 4c 5[89abef] pop [%rax..%rdi]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4c 90 xchg %rax,%rax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4c 91 xchg %rax,%rcx; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4c 92 xchg %rax,%rdx; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4c 93 xchg %rax,%rbx; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4c 96 xchg %rax,%rsi; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4c 97 xchg %rax,%rdi; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4c b[012367] 00 mov $0x0,[%al..%dil]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4c b[89abef] 00 00 00 00 00 00 00 00 movabs $0x0,[%rax..%rdi]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4d rex.WRB; 9b fwait; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4d 5[8..e] pop [%r8..%r14]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4d 90 xchg %rax,%r8; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4d 91 xchg %rax,%r9; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4d 92 xchg %rax,%r10; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4d 93 xchg %rax,%r11; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4d 94 xchg %rax,%r12; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4d 95 xchg %rax,%r13; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4d 96 xchg %rax,%r14; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4d b[0..6] 00 mov $0x0,[%r8b..%r14b]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4d b[8..e] 00 00 00 00 00 00 00 00 movabs $0x0,[%r8..%r14]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4e rex.WRX; 9b fwait; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4e 01 fc add %r15,%rsp; input_rr=%esp; output_rr=None
|
| +Instruction: 4e 01 fd add %r15,%rbp; input_rr=%ebp; output_rr=None
|
| +Instruction: 4e 09 fc or %r15,%rsp; input_rr=%esp; output_rr=None
|
| +Instruction: 4e 5[89abef] pop [%rax..%rdi]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4e 90 xchg %rax,%rax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4e 91 xchg %rax,%rcx; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4e 92 xchg %rax,%rdx; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4e 93 xchg %rax,%rbx; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4e 96 xchg %rax,%rsi; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4e 97 xchg %rax,%rdi; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4e b[012367] 00 mov $0x0,[%al..%dil]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4e b[89abef] 00 00 00 00 00 00 00 00 movabs $0x0,[%rax..%rdi]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4f rex.WRXB; 9b fwait; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4f 5[8..e] pop [%r8..%r14]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4f 90 xchg %rax,%r8; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4f 91 xchg %rax,%r9; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4f 92 xchg %rax,%r10; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4f 93 xchg %rax,%r11; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4f 94 xchg %rax,%r12; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4f 95 xchg %rax,%r13; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4f 96 xchg %rax,%r14; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4f b[0..6] 00 mov $0x0,[%r8b..%r14b]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 4f b[8..e] 00 00 00 00 00 00 00 00 movabs $0x0,[%r8..%r14]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 5[89abef] pop [%rax..%rdi]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 0f 1f 44 00 00 nopw 0x0(%rax,%rax,1); input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 0f 1f 84 00 00 00 00 00 nopw 0x0(%rax,%rax,1); input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0(%rax,%rax,1); input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 40 5[89abef] pop [%ax..%di]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 40 9[012367] xchg %ax,[%ax..%di]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 40 b[89abef] 00 00 mov $0x0,[%ax..%di]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 41 5[8..e] pop [%r8w..%r14w]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 41 9[0..6] xchg %ax,[%r8w..%r14w]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 41 b[8..e] 00 00 mov $0x0,[%r8w..%r14w]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 42 5[89abef] pop [%ax..%di]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 42 9[012367] xchg %ax,[%ax..%di]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 42 b[89abef] 00 00 mov $0x0,[%ax..%di]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 43 5[8..e] pop [%r8w..%r14w]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 43 9[0..6] xchg %ax,[%r8w..%r14w]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 43 b[8..e] 00 00 mov $0x0,[%r8w..%r14w]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 44 5[89abef] pop [%ax..%di]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 44 9[012367] xchg %ax,[%ax..%di]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 44 b[89abef] 00 00 mov $0x0,[%ax..%di]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 45 5[8..e] pop [%r8w..%r14w]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 45 9[0..6] xchg %ax,[%r8w..%r14w]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 45 b[8..e] 00 00 mov $0x0,[%r8w..%r14w]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 46 5[89abef] pop [%ax..%di]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 46 9[012367] xchg %ax,[%ax..%di]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 46 b[89abef] 00 00 mov $0x0,[%ax..%di]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 47 5[8..e] pop [%r8w..%r14w]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 47 9[0..6] xchg %ax,[%r8w..%r14w]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 47 b[8..e] 00 00 mov $0x0,[%r8w..%r14w]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 5[89abef] pop [%ax..%di]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 66 2e 0f 1f 84 00 00 00 00 00 data32 nopw %cs:0x0(%rax,%rax,1); input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 nopw %cs:0x0(%rax,%rax,1); input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0(%rax,%rax,1); input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 nopw %cs:0x0(%rax,%rax,1); input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0(%rax,%rax,1); input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 9[012367] xchg %ax,[%ax..%di]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 01 XX add [%ax..%r15w],[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 03 XX add [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 05 00 00 add $0x0,%ax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 09 XX or [%ax..%r15w],[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0b XX or [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0d 00 00 or $0x0,%ax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 38 f0 XX movbe [memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 38 f1 XX movbe [%ax..%r15w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 3a 14 XX 00 pextrb $0x0,[%xmm0..%xmm15],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 3a 15 XX 00 pextrw $0x0,[%xmm0..%xmm15],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 3a 16 XX 00 pextrd $0x0,[%xmm0..%xmm15],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 3a 17 XX 00 extractps $0x0,[%xmm0..%xmm15],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 3a 20 XX 00 pinsrb $0x0,[%eax..%r15d or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 3a 22 XX 00 pinsrd $0x0,[%eax..%r15d or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 40 XX cmovo [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 41 XX cmovno [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 42 XX cmovb [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 43 XX cmovae [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 44 XX cmove [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 45 XX cmovne [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 46 XX cmovbe [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 47 XX cmova [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 48 XX cmovs [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 49 XX cmovns [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 4a XX cmovp [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 4b XX cmovnp [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 4c XX cmovl [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 4d XX cmovge [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 4e XX cmovle [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 4f XX cmovg [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 50 XX movmskpd [%xmm0..%xmm15],[%eax..%ebx|%esi..%r14d]; input_rr=any_nonspecial; output_rr=None # rm to reg
|
| +Instruction: 66 [REX:40..47]? 0f 6e XX movd [%eax..%r15d or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f 7e XX movd [%xmm0..%xmm15],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: 66 [REX:40..47]? 0f a4 XX 00 shld $0x0,[%ax..%r15w],[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f a5 XX shld %cl,[%ax..%r15w],[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f ac XX 00 shrd $0x0,[%ax..%r15w],[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f ad XX shrd %cl,[%ax..%r15w],[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f af XX imul [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f b1 XX cmpxchg [%ax..%bx|%si..%r14w],[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: 66 [REX:40..47]? 0f b6 XX movzbw [%al..%r15b or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f b7 XX movzww [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f ba XX/4 00 bt[w]? $0x0,[%ax..%r15w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f ba XX/5 00 bts[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f ba XX/6 00 btr[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f ba XX/7 00 btc[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f bc XX bsf [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f bd XX bsr [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f be XX movsbw [%al..%r15b or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f bf XX movsww [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f c1 XX xadd [%ax..%bx|%si..%r14w],[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: 66 [REX:40..47]? 0f c4 XX 00 pinsrw $0x0,[%eax..%r15d or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 0f c5 XX 00 pextrw $0x0,[%xmm0..%xmm15],[%eax..%ebx|%esi..%r14d]; input_rr=any_nonspecial; output_rr=None # rm to reg
|
| +Instruction: 66 [REX:40..47]? 0f d7 XX pmovmskb [%xmm0..%xmm15],[%eax..%ebx|%esi..%r14d]; input_rr=any_nonspecial; output_rr=None # rm to reg
|
| +Instruction: 66 [REX:40..47]? 11 XX adc [%ax..%r15w],[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 13 XX adc [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 15 00 00 adc $0x0,%ax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 19 XX sbb [%ax..%r15w],[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 1b XX sbb [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 1d 00 00 sbb $0x0,%ax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 21 XX and [%ax..%r15w],[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 23 XX and [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 25 00 00 and $0x0,%ax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 29 XX sub [%ax..%r15w],[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 2b XX sub [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 2d 00 00 sub $0x0,%ax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 31 XX xor [%ax..%r15w],[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 33 XX xor [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 35 00 00 xor $0x0,%ax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 39 XX cmp [%ax..%r15w],[%ax..%r15w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 3b XX cmp [%ax..%r15w or memory],[%ax..%r15w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 3d 00 00 cmp $0x0,%ax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 5[0..7] push [%ax..%r15w]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 63 XX movslq [%eax..%r15d or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 68 00 00 pushw $0x0; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 69 XX 00 00 imul $0x0,[%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 6b XX 00 imul $0x0,[%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 81 XX/0 00 00 add[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 81 XX/1 00 00 or[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 81 XX/2 00 00 adc[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 81 XX/3 00 00 sbb[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 81 XX/4 00 00 and[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 81 XX/5 00 00 sub[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 81 XX/6 00 00 xor[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 81 XX/7 00 00 cmp[w]? $0x0,[%ax..%r15w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 83 XX/0 00 add[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 83 XX/1 00 or[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 83 XX/2 00 adc[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 83 XX/3 00 sbb[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 83 XX/4 00 and[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 83 XX/5 00 sub[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 83 XX/6 00 xor[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 83 XX/7 00 cmp[w]? $0x0,[%ax..%r15w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 85 XX test [%ax..%r15w],[%ax..%r15w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 87 XX xchg [%ax..%bx|%si..%r14w],[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: 66 [REX:40..47]? 89 XX mov [%ax..%r15w],[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 8b XX mov [%ax..%r15w or memory],[%ax..%bx|%si..%r14w]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 8d XX lea [memory],[%ax..%bx|%si..%r14w]; input_rr=any_nonspecial; output_rr=None # lea
|
| +Instruction: 66 [REX:40..47]? 8f XX/0 pop[w]? [%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 98 cbtw; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..47]? 99 cwtd; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..47]? a9 00 00 test $0x0,%ax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..47]? c1 XX/0 00 rol[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? c1 XX/1 00 ror[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? c1 XX/2 00 rcl[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? c1 XX/3 00 rcr[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? c1 XX/4 00 shl[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? c1 XX/5 00 shr[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? c1 XX/7 00 sar[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? c7 XX/0 00 00 mov[w]? $0x0,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? d1 XX/0 rol[w]? [%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? d1 XX/1 ror[w]? [%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? d1 XX/2 rcl[w]? [%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? d1 XX/3 rcr[w]? [%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? d1 XX/4 shl[w]? [%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? d1 XX/5 shr[w]? [%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? d1 XX/7 sar[w]? [%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? d3 XX/0 rol[w]? %cl,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? d3 XX/1 ror[w]? %cl,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? d3 XX/2 rcl[w]? %cl,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? d3 XX/3 rcr[w]? %cl,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? d3 XX/4 shl[w]? %cl,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? d3 XX/5 shr[w]? %cl,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? d3 XX/7 sar[w]? %cl,[%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? f7 XX/0 00 00 test[w]? $0x0,[%ax..%r15w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? f7 XX/2 not[w]? [%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? f7 XX/3 neg[w]? [%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? f7 XX/4 mul[w]? [%ax..%r15w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? f7 XX/5 imul[w]? [%ax..%r15w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? f7 XX/6 div[w]? [%ax..%r15w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? f7 XX/7 idiv[w]? [%ax..%r15w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? ff XX/0 inc[w]? [%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? ff XX/1 dec[w]? [%ax..%bx|%si..%r14w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..47]? ff XX/6 push[w]? [%ax..%r15w or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 10 XX movupd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 11 XX movupd [%xmm0..%xmm15],[%xmm0..%xmm15 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 12 XX movlpd [memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 13 XX movlpd [%xmm0..%xmm15],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 14 XX unpcklpd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 15 XX unpckhpd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 16 XX movhpd [memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 17 XX movhpd [%xmm0..%xmm15],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 28 XX movapd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 29 XX movapd [%xmm0..%xmm15],[%xmm0..%xmm15 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 2a XX cvtpi2pd [%mm0..%mm7 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 2b XX movntpd [%xmm0..%xmm15],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 2c XX cvttpd2pi [%xmm0..%xmm15 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 2d XX cvtpd2pi [%xmm0..%xmm15 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 2e XX ucomisd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 2f XX comisd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 00 XX pshufb [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 01 XX phaddw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 02 XX phaddd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 03 XX phaddsw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 04 XX pmaddubsw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 05 XX phsubw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 06 XX phsubd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 07 XX phsubsw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 08 XX psignb [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 09 XX psignw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 0a XX psignd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 0b XX pmulhrsw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 10 XX pblendvb %xmm0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 14 XX blendvps %xmm0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 15 XX blendvpd %xmm0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 17 XX ptest [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 1c XX pabsb [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 1d XX pabsw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 1e XX pabsd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 20 XX pmovsxbw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 21 XX pmovsxbd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 22 XX pmovsxbq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 23 XX pmovsxwd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 24 XX pmovsxwq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 25 XX pmovsxdq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 28 XX pmuldq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 29 XX pcmpeqq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 2a XX movntdqa [memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 2b XX packusdw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 30 XX pmovzxbw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 31 XX pmovzxbd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 32 XX pmovzxbq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 33 XX pmovzxwd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 34 XX pmovzxwq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 35 XX pmovzxdq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 37 XX pcmpgtq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 38 XX pminsb [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 39 XX pminsd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 3a XX pminuw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 3b XX pminud [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 3c XX pmaxsb [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 3d XX pmaxsd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 3e XX pmaxuw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 3f XX pmaxud [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 40 XX pmulld [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 38 41 XX phminposuw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 3a 08 XX 00 roundps $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 3a 09 XX 00 roundpd $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 3a 0a XX 00 roundss $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 3a 0b XX 00 roundsd $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 3a 0c XX 00 blendps $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 3a 0d XX 00 blendpd $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 3a 0e XX 00 pblendw $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 3a 0f XX 00 palignr $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 3a 21 XX 00 insertps $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 3a 40 XX 00 dpps $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 3a 41 XX 00 dppd $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 3a 42 XX 00 mpsadbw $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 3a 60 XX 00 pcmpestrm $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 3a 61 XX 00 pcmpestri $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 3a 62 XX 00 pcmpistrm $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 3a 63 XX 00 pcmpistri $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 51 XX sqrtpd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
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| +Instruction: 66 [REX:40..4f]? 0f 54 XX andpd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 55 XX andnpd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
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| +Instruction: 66 [REX:40..4f]? 0f 56 XX orpd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
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| +Instruction: 66 [REX:40..4f]? 0f 57 XX xorpd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
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| +Instruction: 66 [REX:40..4f]? 0f 58 XX addpd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 59 XX mulpd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 5a XX cvtpd2ps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
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| +Instruction: 66 [REX:40..4f]? 0f 5b XX cvtps2dq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 5c XX subpd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 5d XX minpd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 5e XX divpd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 5f XX maxpd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 60 XX punpcklbw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 61 XX punpcklwd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 62 XX punpckldq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 63 XX packsswb [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 64 XX pcmpgtb [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 65 XX pcmpgtw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 66 XX pcmpgtd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 67 XX packuswb [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 68 XX punpckhbw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 69 XX punpckhwd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 6a XX punpckhdq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 6b XX packssdw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 6c XX punpcklqdq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 6d XX punpckhqdq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 6f XX movdqa [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 70 XX 00 pshufd $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 71 XX/2 00 psrlw $0x0,[%xmm0..%xmm15]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 71 XX/4 00 psraw $0x0,[%xmm0..%xmm15]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 71 XX/6 00 psllw $0x0,[%xmm0..%xmm15]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 72 XX/2 00 psrld $0x0,[%xmm0..%xmm15]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 72 XX/4 00 psrad $0x0,[%xmm0..%xmm15]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 72 XX/6 00 pslld $0x0,[%xmm0..%xmm15]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 73 XX/2 00 psrlq $0x0,[%xmm0..%xmm15]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 73 XX/3 00 psrldq $0x0,[%xmm0..%xmm15]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 73 XX/6 00 psllq $0x0,[%xmm0..%xmm15]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 73 XX/7 00 pslldq $0x0,[%xmm0..%xmm15]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 74 XX pcmpeqb [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 75 XX pcmpeqw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 76 XX pcmpeqd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 79 XX extrq [%xmm0..%xmm15],[%xmm0..%xmm15]; input_rr=any_nonspecial; output_rr=None # rm to reg
|
| +Instruction: 66 [REX:40..4f]? 0f 7c XX haddpd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 7d XX hsubpd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f 7f XX movdqa [%xmm0..%xmm15],[%xmm0..%xmm15 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f c2 XX 00 cmpeqpd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f c6 XX 00 shufpd $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f d0 XX addsubpd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f d1 XX psrlw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f d2 XX psrld [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f d3 XX psrlq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f d4 XX paddq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f d5 XX pmullw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f d6 XX movq [%xmm0..%xmm15],[%xmm0..%xmm15 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f d8 XX psubusb [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f d9 XX psubusw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f da XX pminub [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f db XX pand [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f dc XX paddusb [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f dd XX paddusw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f de XX pmaxub [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f df XX pandn [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f e0 XX pavgb [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f e1 XX psraw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f e2 XX psrad [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f e3 XX pavgw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f e4 XX pmulhuw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f e5 XX pmulhw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f e6 XX cvttpd2dq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f e7 XX movntdq [%xmm0..%xmm15],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f e8 XX psubsb [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f e9 XX psubsw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f ea XX pminsw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f eb XX por [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f ec XX paddsb [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f ed XX paddsw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f ee XX pmaxsw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f ef XX pxor [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f f1 XX psllw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f f2 XX pslld [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f f3 XX psllq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f f4 XX pmuludq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f f5 XX pmaddwd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f f6 XX psadbw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f f8 XX psubb [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f f9 XX psubw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f fa XX psubd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f fb XX psubq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f fc XX paddb [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f fd XX paddw [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:40..4f]? 0f fe XX paddd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:48..4f] 0f 3a 14 XX 00 pextrb $0x0,[%xmm0..%xmm15],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:48..4f] 0f 3a 15 XX 00 pextrw $0x0,[%xmm0..%xmm15],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:48..4f] 0f 3a 16 XX 00 pextrq $0x0,[%xmm0..%xmm15],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:48..4f] 0f 3a 17 XX 00 extractps $0x0,[%xmm0..%xmm15],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:48..4f] 0f 3a 20 XX 00 pinsrb $0x0,[%rax..%r15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:48..4f] 0f 3a 22 XX 00 pinsrq $0x0,[%rax..%r15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:48..4f] 0f 50 XX movmskpd [%xmm0..%xmm15],[%rax..%rbx|%rsi..%r14]; input_rr=any_nonspecial; output_rr=None # rm to reg
|
| +Instruction: 66 [REX:48..4f] 0f 6e XX movq [%rax..%r15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:48..4f] 0f 7e XX movq [%xmm0..%xmm15],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:48..4f] 0f c4 XX 00 pinsrw $0x0,[%rax..%r15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 [REX:48..4f] 0f c5 XX 00 pextrw $0x0,[%xmm0..%xmm15],[%rax..%rbx|%rsi..%r14]; input_rr=any_nonspecial; output_rr=None # rm to reg
|
| +Instruction: 66 [REX:48..4f] 0f d7 XX pmovmskb [%xmm0..%xmm15],[%rax..%rbx|%rsi..%r14]; input_rr=any_nonspecial; output_rr=None # rm to reg
|
| +Instruction: 66 b[89abef] 00 00 mov $0x0,[%ax..%di]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 01 XX lock add [%ax..%r15w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 09 XX lock or [%ax..%r15w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 0f b1 XX lock cmpxchg [%ax..%bx|%si..%r14w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: 66 f0 [REX:40..47]? 0f ba XX/5 00 lock btsw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 0f ba XX/6 00 lock btrw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 0f ba XX/7 00 lock btcw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 0f c1 XX lock xadd [%ax..%bx|%si..%r14w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: 66 f0 [REX:40..47]? 11 XX lock adc [%ax..%r15w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 19 XX lock sbb [%ax..%r15w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 21 XX lock and [%ax..%r15w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 29 XX lock sub [%ax..%r15w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 31 XX lock xor [%ax..%r15w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 81 XX/0 00 00 lock addw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 81 XX/1 00 00 lock orw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 81 XX/2 00 00 lock adcw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 81 XX/3 00 00 lock sbbw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 81 XX/4 00 00 lock andw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 81 XX/5 00 00 lock subw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 81 XX/6 00 00 lock xorw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 83 XX/0 00 lock addw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 83 XX/1 00 lock orw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 83 XX/2 00 lock adcw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 83 XX/3 00 lock sbbw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 83 XX/4 00 lock andw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 83 XX/5 00 lock subw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 83 XX/6 00 lock xorw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? 87 XX lock xchg [%ax..%bx|%si..%r14w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: 66 f0 [REX:40..47]? f7 XX/2 lock notw [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? f7 XX/3 lock negw [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? ff XX/0 lock incw [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 66 f0 [REX:40..47]? ff XX/1 lock decw [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: 90 nop; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: 91 xchg %eax,%ecx; input_rr=any_nonspecial; output_rr=%ecx
|
| +Instruction: 92 xchg %eax,%edx; input_rr=any_nonspecial; output_rr=%edx
|
| +Instruction: 93 xchg %eax,%ebx; input_rr=any_nonspecial; output_rr=%ebx
|
| +Instruction: 94 xchg %eax,%esp; input_rr=any_nonspecial; output_rr=%esp
|
| +Instruction: 95 xchg %eax,%ebp; input_rr=any_nonspecial; output_rr=%ebp
|
| +Instruction: 96 xchg %eax,%esi; input_rr=any_nonspecial; output_rr=%esi
|
| +Instruction: 97 xchg %eax,%edi; input_rr=any_nonspecial; output_rr=%edi
|
| +Instruction: 9b fwait; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..47]? 01 XX add [%eax..%r15d],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 03 XX add [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 05 00 00 00 00 add $0x0,%eax; input_rr=any_nonspecial; output_rr=%eax
|
| +Instruction: [REX:40..47]? 09 XX or [%eax..%r15d],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 0b XX or [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 0d 00 00 00 00 or $0x0,%eax; input_rr=any_nonspecial; output_rr=%eax
|
| +Instruction: [REX:40..47]? 0f 1f XX/0 nop[l]? [%eax..%r15d or memory]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..47]? 0f 38 f0 XX movbe [memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f 38 f1 XX movbe [%eax..%r15d],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f 40 XX cmovo [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f 41 XX cmovno [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f 42 XX cmovb [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f 43 XX cmovae [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f 44 XX cmove [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f 45 XX cmovne [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f 46 XX cmovbe [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f 47 XX cmova [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f 48 XX cmovs [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f 49 XX cmovns [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f 4a XX cmovp [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f 4b XX cmovnp [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f 4c XX cmovl [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f 4d XX cmovge [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f 4e XX cmovle [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f 4f XX cmovg [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f 50 XX movmskps [%xmm0..%xmm15],[%eax..%ebx|%esi..%r14d]; input_rr=any_nonspecial; output_rr=None # rm to reg
|
| +Instruction: [REX:40..47]? 0f 6e XX movd [%eax..%r15d or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f 7e XX movd [%mm0..%mm7],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 0f a4 XX 00 shld $0x0,[%eax..%r15d],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f a5 XX shld %cl,[%eax..%r15d],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f ac XX 00 shrd $0x0,[%eax..%r15d],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f ad XX shrd %cl,[%eax..%r15d],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f af XX imul [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 0f b1 XX cmpxchg [%eax..%ebx|%esi..%r14d],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: [REX:40..47]? 0f b6 XX movzbl [%al..%r15b or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 0f b7 XX movzwl [%ax..%r15w or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 0f ba XX/4 00 bt[l]? $0x0,[%eax..%r15d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f ba XX/5 00 bts[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f ba XX/6 00 btr[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f ba XX/7 00 btc[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f bc XX bsf [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f bd XX bsr [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f be XX movsbl [%al..%r15b or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 0f bf XX movswl [%ax..%r15w or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 0f c1 XX xadd [%eax..%ebx|%esi..%r14d],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d] # write to both
|
| +Instruction: [REX:40..47]? 0f c3 XX movnti [%eax..%r15d],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f c4 XX 00 pinsrw $0x0,[%eax..%r15d or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f c5 XX 00 pextrw $0x0,[%mm0..%mm7],[%eax..%ebx|%esi..%r14d]; input_rr=any_nonspecial; output_rr=None # rm to reg
|
| +Instruction: [REX:40..47]? 0f c7 XX/1 cmpxchg8b [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 0f c[89abef] bswap [%eax..%ebx|%esi..%r14d]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..47]? 0f d7 XX pmovmskb [%mm0..%mm7],[%eax..%ebx|%esi..%r14d]; input_rr=any_nonspecial; output_rr=None # rm to reg
|
| +Instruction: [REX:40..47]? 11 XX adc [%eax..%r15d],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 13 XX adc [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 15 00 00 00 00 adc $0x0,%eax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..47]? 19 XX sbb [%eax..%r15d],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 1b XX sbb [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 1d 00 00 00 00 sbb $0x0,%eax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..47]? 21 XX and [%eax..%r15d],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 23 XX and [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 25 00 00 00 00 and $0x0,%eax; input_rr=any_nonspecial; output_rr=%eax
|
| +Instruction: [REX:40..47]? 29 XX sub [%eax..%r15d],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 2b XX sub [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 2d 00 00 00 00 sub $0x0,%eax; input_rr=any_nonspecial; output_rr=%eax
|
| +Instruction: [REX:40..47]? 31 XX xor [%eax..%r15d],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 33 XX xor [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 35 00 00 00 00 xor $0x0,%eax; input_rr=any_nonspecial; output_rr=%eax
|
| +Instruction: [REX:40..47]? 39 XX cmp [%eax..%r15d],[%eax..%r15d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 3b XX cmp [%eax..%r15d or memory],[%eax..%r15d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 3d 00 00 00 00 cmp $0x0,%eax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..47]? 63 XX movslq [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 69 XX 00 00 00 00 imul $0x0,[%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 6b XX 00 imul $0x0,[%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 81 XX/0 00 00 00 00 add[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 81 XX/1 00 00 00 00 or[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 81 XX/2 00 00 00 00 adc[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 81 XX/3 00 00 00 00 sbb[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 81 XX/4 00 00 00 00 and[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 81 XX/5 00 00 00 00 sub[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 81 XX/6 00 00 00 00 xor[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 81 XX/7 00 00 00 00 cmp[l]? $0x0,[%eax..%r15d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 83 XX/0 00 add[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 83 XX/1 00 or[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 83 XX/2 00 adc[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 83 XX/3 00 sbb[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 83 XX/4 00 and[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d] # special and
|
| +Instruction: [REX:40..47]? 83 XX/5 00 sub[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 83 XX/6 00 xor[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 83 XX/7 00 cmp[l]? $0x0,[%eax..%r15d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 85 XX test [%eax..%r15d],[%eax..%r15d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? 87 XX xchg [%eax..%ebx|%esi..%r14d],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d] # write to both
|
| +Instruction: [REX:40..47]? 89 XX mov [%eax..%r15d],[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 8b XX mov [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? 8d XX lea [memory],[%eax..%ebx|%esi..%r14d]; input_rr=any_nonspecial; output_rr=[%eax..%ebx|%esi..%r14d] # lea
|
| +Instruction: [REX:40..47]? 98 cwtl; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..47]? 99 cltd; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..47]? a9 00 00 00 00 test $0x0,%eax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..47]? c1 XX/0 00 rol[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? c1 XX/1 00 ror[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? c1 XX/2 00 rcl[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? c1 XX/3 00 rcr[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? c1 XX/4 00 shl[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? c1 XX/5 00 shr[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? c1 XX/7 00 sar[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? c7 XX/0 00 00 00 00 mov[l]? $0x0,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? d1 XX/0 rol[l]? [%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? d1 XX/1 ror[l]? [%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? d1 XX/2 rcl[l]? [%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? d1 XX/3 rcr[l]? [%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? d1 XX/4 shl[l]? [%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? d1 XX/5 shr[l]? [%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? d1 XX/7 sar[l]? [%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? d3 XX/0 rol[l]? %cl,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? d3 XX/1 ror[l]? %cl,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? d3 XX/2 rcl[l]? %cl,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? d3 XX/3 rcr[l]? %cl,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? d3 XX/4 shl[l]? %cl,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? d3 XX/5 shr[l]? %cl,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? d3 XX/7 sar[l]? %cl,[%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? f7 XX/0 00 00 00 00 test[l]? $0x0,[%eax..%r15d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? f7 XX/2 not[l]? [%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? f7 XX/3 neg[l]? [%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? f7 XX/4 mul[l]? [%eax..%r15d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? f7 XX/5 imul[l]? [%eax..%r15d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? f7 XX/6 div[l]? [%eax..%r15d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? f7 XX/7 idiv[l]? [%eax..%r15d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..47]? ff XX/0 inc[l]? [%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..47]? ff XX/1 dec[l]? [%eax..%ebx|%esi..%r14d or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=[%eax..%ebx|%esi..%r14d]
|
| +Instruction: [REX:40..4f]? 00 XX add [%al..%r15b],[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 02 XX add [%al..%r15b or memory],[%al..%bl|%ah..%bh|%sil..%r14b]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 04 00 add $0x0,%al; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 08 XX or [%al..%r15b],[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0a XX or [%al..%r15b or memory],[%al..%bl|%ah..%bh|%sil..%r14b]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0c 00 or $0x0,%al; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0d XX/0 prefetch [memory]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0d XX/1 prefetchw [memory]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0d XX/3 prefetch [memory]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0e femms; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX 0c pi2fw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX 0d pi2fd [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX 1c pf2iw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX 1d pf2id [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX 8a pfnacc [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX 8e pfpnacc [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX 90 pfcmpge [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX 94 pfmin [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX 96 pfrcp [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX 97 pfrsqrt [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX 9a pfsub [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX 9e pfadd [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX a0 pfcmpgt [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX a4 pfmax [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX a6 pfrcpit1 [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX a7 pfrsqit1 [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX aa pfsubr [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX ae pfacc [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX b0 pfcmpeq [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX b4 pfmul [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX b6 pfrcpit2 [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX b7 pmulhrw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX bb pswapd [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 0f XX bf pavgusb [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 10 XX movups [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 11 XX movups [%xmm0..%xmm15],[%xmm0..%xmm15 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 12 XX movhlps [%xmm0..%xmm15],[%xmm0..%xmm15]; input_rr=any_nonspecial; output_rr=None # rm to reg
|
| +Instruction: [REX:40..4f]? 0f 12 XX movlps [memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 13 XX movlps [%xmm0..%xmm15],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 14 XX unpcklps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 15 XX unpckhps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 16 XX movhps [memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 16 XX movlhps [%xmm0..%xmm15],[%xmm0..%xmm15]; input_rr=any_nonspecial; output_rr=None # rm to reg
|
| +Instruction: [REX:40..4f]? 0f 17 XX movhps [%xmm0..%xmm15],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 18 XX/0 prefetchnta [memory]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 18 XX/1 prefetcht0 [memory]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 18 XX/2 prefetcht1 [memory]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 18 XX/3 prefetcht2 [memory]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 28 XX movaps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 29 XX movaps [%xmm0..%xmm15],[%xmm0..%xmm15 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 2a XX cvtpi2ps [%mm0..%mm7 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 2b XX movntps [%xmm0..%xmm15],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 2c XX cvttps2pi [%xmm0..%xmm15 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 2d XX cvtps2pi [%xmm0..%xmm15 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 2e XX ucomiss [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 2f XX comiss [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 31 rdtsc; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 38 00 XX pshufb [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 38 01 XX phaddw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 38 02 XX phaddd [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 38 03 XX phaddsw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 38 04 XX pmaddubsw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 38 05 XX phsubw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 38 06 XX phsubd [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 38 07 XX phsubsw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 38 08 XX psignb [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 38 09 XX psignw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 38 0a XX psignd [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 38 0b XX pmulhrsw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 38 1c XX pabsb [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 38 1d XX pabsw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 38 1e XX pabsd [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 3a 0f XX 00 palignr $0x0,[%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 51 XX sqrtps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 52 XX rsqrtps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 53 XX rcpps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 54 XX andps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 55 XX andnps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 56 XX orps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 57 XX xorps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 58 XX addps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 59 XX mulps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 5a XX cvtps2pd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 5b XX cvtdq2ps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 5c XX subps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 5d XX minps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 5e XX divps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 5f XX maxps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 60 XX punpcklbw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 61 XX punpcklwd [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 62 XX punpckldq [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 63 XX packsswb [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 64 XX pcmpgtb [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 65 XX pcmpgtw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 66 XX pcmpgtd [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 67 XX packuswb [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 68 XX punpckhbw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 69 XX punpckhwd [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 6a XX punpckhdq [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 6b XX packssdw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 6f XX movq [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 70 XX 00 pshufw $0x0,[%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 71 XX/2 00 psrlw $0x0,[%mm0..%mm7]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 71 XX/4 00 psraw $0x0,[%mm0..%mm7]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 71 XX/6 00 psllw $0x0,[%mm0..%mm7]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 72 XX/2 00 psrld $0x0,[%mm0..%mm7]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 72 XX/4 00 psrad $0x0,[%mm0..%mm7]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 72 XX/6 00 pslld $0x0,[%mm0..%mm7]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 73 XX/2 00 psrlq $0x0,[%mm0..%mm7]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 73 XX/6 00 psllq $0x0,[%mm0..%mm7]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 74 XX pcmpeqb [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 75 XX pcmpeqw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 76 XX pcmpeqd [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 77 emms; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 7f XX movq [%mm0..%mm7],[%mm0..%mm7 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 80 00 00 00 00 jo %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 81 00 00 00 00 jno %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 82 00 00 00 00 jb %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 83 00 00 00 00 jae %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 84 00 00 00 00 je %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 85 00 00 00 00 jne %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 86 00 00 00 00 jbe %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 87 00 00 00 00 ja %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 88 00 00 00 00 js %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 89 00 00 00 00 jns %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 8a 00 00 00 00 jp %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 8b 00 00 00 00 jnp %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 8c 00 00 00 00 jl %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 8d 00 00 00 00 jge %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 8e 00 00 00 00 jle %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 8f 00 00 00 00 jg %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 90 XX seto [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 91 XX setno [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 92 XX setb [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 93 XX setae [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 94 XX sete [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 95 XX setne [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 96 XX setbe [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 97 XX seta [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 98 XX sets [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 99 XX setns [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 9a XX setp [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 9b XX setnp [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 9c XX setl [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 9d XX setge [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 9e XX setle [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f 9f XX setg [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f a2 cpuid; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f ae XX/2 ldmxcsr [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f ae XX/3 stmxcsr [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f ae XX/7 clflush [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f ae e8 lfence; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f ae f0 mfence; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f ae f8 sfence; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f b0 XX cmpxchg [%al..%bl|%ah..%bh|%sil..%r14b],[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: [REX:40..4f]? 0f c0 XX xadd [%al..%bl|%ah..%bh|%sil..%r14b],[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: [REX:40..4f]? 0f c2 XX 00 cmpeqps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f c6 XX 00 shufps $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f d1 XX psrlw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f d2 XX psrld [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f d3 XX psrlq [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f d4 XX paddq [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f d5 XX pmullw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f d8 XX psubusb [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f d9 XX psubusw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f da XX pminub [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f db XX pand [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f dc XX paddusb [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f dd XX paddusw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f de XX pmaxub [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f df XX pandn [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f e0 XX pavgb [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f e1 XX psraw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f e2 XX psrad [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f e3 XX pavgw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f e4 XX pmulhuw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f e5 XX pmulhw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f e7 XX movntq [%mm0..%mm7],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f e8 XX psubsb [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f e9 XX psubsw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f ea XX pminsw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f eb XX por [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f ec XX paddsb [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f ed XX paddsw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f ee XX pmaxsw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f ef XX pxor [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f f1 XX psllw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f f2 XX pslld [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f f3 XX psllq [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f f4 XX pmuludq [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f f5 XX pmaddwd [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f f6 XX psadbw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f f8 XX psubb [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f f9 XX psubw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f fa XX psubd [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f fb XX psubq [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f fc XX paddb [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f fd XX paddw [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 0f fe XX paddd [%mm0..%mm7 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 10 XX adc [%al..%r15b],[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 12 XX adc [%al..%r15b or memory],[%al..%bl|%ah..%bh|%sil..%r14b]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 14 00 adc $0x0,%al; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 18 XX sbb [%al..%r15b],[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 1a XX sbb [%al..%r15b or memory],[%al..%bl|%ah..%bh|%sil..%r14b]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 1c 00 sbb $0x0,%al; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 20 XX and [%al..%r15b],[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 22 XX and [%al..%r15b or memory],[%al..%bl|%ah..%bh|%sil..%r14b]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 24 00 and $0x0,%al; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 28 XX sub [%al..%r15b],[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 2a XX sub [%al..%r15b or memory],[%al..%bl|%ah..%bh|%sil..%r14b]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 2c 00 sub $0x0,%al; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 30 XX xor [%al..%r15b],[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 32 XX xor [%al..%r15b or memory],[%al..%bl|%ah..%bh|%sil..%r14b]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 34 00 xor $0x0,%al; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 38 XX cmp [%al..%r15b],[%al..%r15b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 3a XX cmp [%al..%r15b or memory],[%al..%r15b]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 3c 00 cmp $0x0,%al; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 5[0..7] push [%rax..%r15]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 68 00 00 00 00 pushq $0x0; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 6a 00 pushq $0x0; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 70 00 jo %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 71 00 jno %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 72 00 jb %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 73 00 jae %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 74 00 je %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 75 00 jne %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 76 00 jbe %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 77 00 ja %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 78 00 js %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 79 00 jns %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 7a 00 jp %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 7b 00 jnp %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 7c 00 jl %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 7d 00 jge %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 7e 00 jle %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 7f 00 jg %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 80 XX/0 00 add[b]? $0x0,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 80 XX/1 00 or[b]? $0x0,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 80 XX/2 00 adc[b]? $0x0,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 80 XX/3 00 sbb[b]? $0x0,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 80 XX/4 00 and[b]? $0x0,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 80 XX/5 00 sub[b]? $0x0,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 80 XX/6 00 xor[b]? $0x0,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 80 XX/7 00 cmp[b]? $0x0,[%al..%r15b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 84 XX test [%al..%r15b],[%al..%r15b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 86 XX xchg [%al..%bl|%ah..%bh|%sil..%r14b],[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: [REX:40..4f]? 88 XX mov [%al..%r15b],[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 8a XX mov [%al..%r15b or memory],[%al..%bl|%ah..%bh|%sil..%r14b]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 8f XX/0 pop[q]? [%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? 9e sahf; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? 9f lahf; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? a8 00 test $0x0,%al; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? c0 XX/0 00 rol[b]? $0x0,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? c0 XX/1 00 ror[b]? $0x0,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? c0 XX/2 00 rcl[b]? $0x0,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? c0 XX/3 00 rcr[b]? $0x0,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? c0 XX/4 00 shl[b]? $0x0,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? c0 XX/5 00 shr[b]? $0x0,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? c0 XX/7 00 sar[b]? $0x0,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? c6 XX/0 00 mov[b]? $0x0,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d0 XX/0 rol[b]? [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d0 XX/1 ror[b]? [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d0 XX/2 rcl[b]? [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d0 XX/3 rcr[b]? [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d0 XX/4 shl[b]? [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d0 XX/5 shr[b]? [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d0 XX/7 sar[b]? [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d2 XX/0 rol[b]? %cl,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d2 XX/1 ror[b]? %cl,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d2 XX/2 rcl[b]? %cl,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d2 XX/3 rcr[b]? %cl,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d2 XX/4 shl[b]? %cl,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d2 XX/5 shr[b]? %cl,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d2 XX/7 sar[b]? %cl,[%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d8 XX/0 fadds [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d8 XX/1 fmuls [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d8 XX/2 fcoms [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d8 XX/3 fcomps [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d8 XX/4 fsubs [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d8 XX/5 fsubrs [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d8 XX/6 fdivs [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d8 XX/7 fdivrs [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d8 c[0..7] fadd [%st(0)..%st(7)],%st; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d8 c[8..f] fmul [%st(0)..%st(7)],%st; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d8 d[0..7] fcom [%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d8 d[8..f] fcomp [%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d8 e[0..7] fsub [%st(0)..%st(7)],%st; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d8 e[8..f] fsubr [%st(0)..%st(7)],%st; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d8 f[0..7] fdiv [%st(0)..%st(7)],%st; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d8 f[8..f] fdivr [%st(0)..%st(7)],%st; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 XX/0 flds [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 XX/2 fsts [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 XX/3 fstps [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 XX/4 fldenv [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 XX/5 fldcw [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 XX/6 fnstenv [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 XX/7 fnstcw [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 c[0..7] fld [%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 c[8..f] fxch [%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 d0 fnop; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 e0 fchs; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 e1 fabs; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 e4 ftst; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 e5 fxam; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 e8 fld1; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 e9 fldl2t; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 ea fldl2e; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 eb fldpi; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 ec fldlg2; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 ed fldln2; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 ee fldz; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 f0 f2xm1; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 f1 fyl2x; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 f2 fptan; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 f3 fpatan; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 f4 fxtract; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 f5 fprem1; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 f6 fdecstp; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 f7 fincstp; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 f8 fprem; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 f9 fyl2xp1; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 fa fsqrt; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 fb fsincos; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 fc frndint; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 fd fscale; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 fe fsin; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? d9 ff fcos; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? da XX/0 fiaddl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? da XX/1 fimull [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? da XX/2 ficoml [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? da XX/3 ficompl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? da XX/4 fisubl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? da XX/5 fisubrl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? da XX/6 fidivl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? da XX/7 fidivrl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? da c[0..7] fcmovb [%st(0)..%st(7)],%st; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? da c[8..f] fcmove [%st(0)..%st(7)],%st; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? da d[0..7] fcmovbe [%st(0)..%st(7)],%st; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? da d[8..f] fcmovu [%st(0)..%st(7)],%st; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? da e9 fucompp; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? db XX/0 fildl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? db XX/1 fisttpl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? db XX/2 fistl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? db XX/3 fistpl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? db XX/5 fldt [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? db XX/7 fstpt [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? db c[0..7] fcmovnb [%st(0)..%st(7)],%st; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? db c[8..f] fcmovne [%st(0)..%st(7)],%st; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? db d[0..7] fcmovnbe [%st(0)..%st(7)],%st; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? db d[8..f] fcmovnu [%st(0)..%st(7)],%st; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? db e2 fnclex; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? db e3 fninit; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? db e[8..f] fucomi [%st(0)..%st(7)],%st; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? db f[0..7] fcomi [%st(0)..%st(7)],%st; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? dc XX/0 faddl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? dc XX/1 fmull [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? dc XX/2 fcoml [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? dc XX/3 fcompl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? dc XX/4 fsubl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? dc XX/5 fsubrl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? dc XX/6 fdivl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? dc XX/7 fdivrl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? dc c[0..7] fadd %st,[%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? dc c[8..f] fmul %st,[%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? dc e[0..7] fsub %st,[%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? dc e[8..f] fsubr %st,[%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? dc f[0..7] fdiv %st,[%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? dc f[8..f] fdivr %st,[%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? dd XX/0 fldl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? dd XX/1 fisttpll [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? dd XX/2 fstl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? dd XX/3 fstpl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? dd XX/4 frstor [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? dd XX/6 fnsave [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? dd XX/7 fnstsw [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? dd c[0..7] ffree [%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? dd d[0..7] fst [%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? dd d[8..f] fstp [%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? dd e[0..7] fucom [%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? dd e[8..f] fucomp [%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? de XX/0 fiadd [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? de XX/1 fimul [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? de XX/2 ficom [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? de XX/3 ficomp [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? de XX/4 fisub [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? de XX/5 fisubr [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? de XX/6 fidiv [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? de XX/7 fidivr [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? de c[0..7] faddp %st,[%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? de c[8..f] fmulp %st,[%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? de d9 fcompp; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? de e[0..7] fsubp %st,[%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? de e[8..f] fsubrp %st,[%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? de f[0..7] fdivp %st,[%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? de f[8..f] fdivrp %st,[%st(0)..%st(7)]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? df XX/0 fild [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? df XX/1 fisttp [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? df XX/2 fist [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? df XX/3 fistp [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? df XX/4 fbld [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? df XX/5 fildll [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? df XX/6 fbstp [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? df XX/7 fistpll [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? df e0 fnstsw %ax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? df e[8..f] fucomip [%st(0)..%st(7)],%st; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? df f[0..7] fcomip [%st(0)..%st(7)],%st; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? e0 00 loopne %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? e1 00 loope %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? e2 00 loop %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? e3 00 jrcxz %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? e8 00 00 00 00 callq %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? e9 00 00 00 00 jmpq %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? eb 00 jmp %rip; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? f4 hlt; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? f5 cmc; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? f6 XX/0 00 test[b]? $0x0,[%al..%r15b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? f6 XX/2 not[b]? [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? f6 XX/3 neg[b]? [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? f6 XX/4 mul[b]? [%al..%r15b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? f6 XX/5 imul[b]? [%al..%r15b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? f6 XX/6 div[b]? [%al..%r15b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? f6 XX/7 idiv[b]? [%al..%r15b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? f8 clc; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? f9 stc; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? fc cld; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? fd std; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:40..4f]? fe XX/0 inc[b]? [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? fe XX/1 dec[b]? [%al..%bl|%ah..%bh|%sil..%r14b or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:40..4f]? ff XX/6 push[q]? [%rax..%r15 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 01 XX add [%rax..%r15],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 03 XX add [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 05 00 00 00 00 add $0x0,%rax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:48..4f] 09 XX or [%rax..%r15],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0b XX or [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0d 00 00 00 00 or $0x0,%rax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 1f XX/0 nop[q]? [%rax..%r15 or memory]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 38 f0 XX movbe [memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 38 f1 XX movbe [%rax..%r15],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 40 XX cmovo [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 41 XX cmovno [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 42 XX cmovb [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 43 XX cmovae [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 44 XX cmove [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 45 XX cmovne [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 46 XX cmovbe [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 47 XX cmova [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 48 XX cmovs [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 49 XX cmovns [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 4a XX cmovp [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 4b XX cmovnp [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 4c XX cmovl [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 4d XX cmovge [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 4e XX cmovle [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 4f XX cmovg [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 50 XX movmskps [%xmm0..%xmm15],[%rax..%rbx|%rsi..%r14]; input_rr=any_nonspecial; output_rr=None # rm to reg
|
| +Instruction: [REX:48..4f] 0f 6e XX movq [%rax..%r15 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f 7e XX movq [%mm0..%mm7],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f a4 XX 00 shld $0x0,[%rax..%r15],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f a5 XX shld %cl,[%rax..%r15],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f ac XX 00 shrd $0x0,[%rax..%r15],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f ad XX shrd %cl,[%rax..%r15],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f af XX imul [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f b1 XX cmpxchg [%rax..%rbx|%rsi..%r14],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: [REX:48..4f] 0f b6 XX movzbq [%al..%r15b or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f b7 XX movzwq [%ax..%r15w or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f ba XX/4 00 bt[q]? $0x0,[%rax..%r15 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f ba XX/5 00 bts[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f ba XX/6 00 btr[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f ba XX/7 00 btc[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f bc XX bsf [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f bd XX bsr [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f be XX movsbq [%al..%r15b or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f bf XX movswq [%ax..%r15w or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f c1 XX xadd [%rax..%rbx|%rsi..%r14],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: [REX:48..4f] 0f c3 XX movnti [%rax..%r15],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f c4 XX 00 pinsrw $0x0,[%rax..%r15 or memory],[%mm0..%mm7]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f c5 XX 00 pextrw $0x0,[%mm0..%mm7],[%rax..%rbx|%rsi..%r14]; input_rr=any_nonspecial; output_rr=None # rm to reg
|
| +Instruction: [REX:48..4f] 0f c7 XX/1 cmpxchg16b [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 0f c[89abef] bswap [%rax..%rbx|%rsi..%r14]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:48..4f] 0f d7 XX pmovmskb [%mm0..%mm7],[%rax..%rbx|%rsi..%r14]; input_rr=any_nonspecial; output_rr=None # rm to reg
|
| +Instruction: [REX:48..4f] 11 XX adc [%rax..%r15],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 13 XX adc [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 15 00 00 00 00 adc $0x0,%rax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:48..4f] 19 XX sbb [%rax..%r15],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 1b XX sbb [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 1d 00 00 00 00 sbb $0x0,%rax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:48..4f] 21 XX and [%rax..%r15],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 23 XX and [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 25 00 00 00 00 and $0x0,%rax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:48..4f] 29 XX sub [%rax..%r15],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 2b XX sub [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 2d 00 00 00 00 sub $0x0,%rax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:48..4f] 31 XX xor [%rax..%r15],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 33 XX xor [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 35 00 00 00 00 xor $0x0,%rax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:48..4f] 39 XX cmp [%rax..%r15],[%rax..%r15 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 3b XX cmp [%rax..%r15 or memory],[%rax..%r15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 3d 00 00 00 00 cmp $0x0,%rax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:48..4f] 63 XX movslq [%eax..%r15d or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 69 XX 00 00 00 00 imul $0x0,[%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 6b XX 00 imul $0x0,[%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 81 XX/0 00 00 00 00 add[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 81 XX/1 00 00 00 00 or[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 81 XX/2 00 00 00 00 adc[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 81 XX/3 00 00 00 00 sbb[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 81 XX/4 00 00 00 00 and[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 81 XX/5 00 00 00 00 sub[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 81 XX/6 00 00 00 00 xor[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 81 XX/7 00 00 00 00 cmp[q]? $0x0,[%rax..%r15 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 83 XX/0 00 add[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 83 XX/1 00 or[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 83 XX/2 00 adc[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 83 XX/3 00 sbb[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 83 XX/4 00 and[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 83 XX/5 00 sub[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 83 XX/6 00 xor[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 83 XX/7 00 cmp[q]? $0x0,[%rax..%r15 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 85 XX test [%rax..%r15],[%rax..%r15 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 87 XX xchg [%rax..%rbx|%rsi..%r14],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: [REX:48..4f] 89 XX mov [%rax..%r15],[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 8b XX mov [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] 8d XX lea [memory],[%rax..%rbx|%rsi..%r14]; input_rr=any_nonspecial; output_rr=None # lea
|
| +Instruction: [REX:48..4f] 98 cltq; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:48..4f] 99 cqto; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:48..4f] a9 00 00 00 00 test $0x0,%rax; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: [REX:48..4f] c1 XX/0 00 rol[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] c1 XX/1 00 ror[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] c1 XX/2 00 rcl[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] c1 XX/3 00 rcr[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] c1 XX/4 00 shl[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] c1 XX/5 00 shr[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] c1 XX/7 00 sar[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] c7 XX/0 00 00 00 00 mov[q]? $0x0,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] d1 XX/0 rol[q]? [%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] d1 XX/1 ror[q]? [%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] d1 XX/2 rcl[q]? [%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] d1 XX/3 rcr[q]? [%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] d1 XX/4 shl[q]? [%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] d1 XX/5 shr[q]? [%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] d1 XX/7 sar[q]? [%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] d3 XX/0 rol[q]? %cl,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] d3 XX/1 ror[q]? %cl,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] d3 XX/2 rcl[q]? %cl,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] d3 XX/3 rcr[q]? %cl,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] d3 XX/4 shl[q]? %cl,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] d3 XX/5 shr[q]? %cl,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] d3 XX/7 sar[q]? %cl,[%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] f7 XX/0 00 00 00 00 test[q]? $0x0,[%rax..%r15 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] f7 XX/2 not[q]? [%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] f7 XX/3 neg[q]? [%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] f7 XX/4 mul[q]? [%rax..%r15 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] f7 XX/5 imul[q]? [%rax..%r15 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] f7 XX/6 div[q]? [%rax..%r15 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] f7 XX/7 idiv[q]? [%rax..%r15 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] ff XX/0 inc[q]? [%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: [REX:48..4f] ff XX/1 dec[q]? [%rax..%rbx|%rsi..%r14 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: b[0..7] 00 mov $0x0,[%al..%bh]; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: b[8..f] 00 00 00 00 mov $0x0,[%eax..%edi]; input_rr=any_nonspecial; output_rr=[%eax..%edi]
|
| +Instruction: f0 66 [REX:40..47]? 01 XX lock add [%ax..%r15w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 09 XX lock or [%ax..%r15w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 0f b1 XX lock cmpxchg [%ax..%bx|%si..%r14w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: f0 66 [REX:40..47]? 0f ba XX/5 00 lock btsw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 0f ba XX/6 00 lock btrw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 0f ba XX/7 00 lock btcw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 0f c1 XX lock xadd [%ax..%bx|%si..%r14w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: f0 66 [REX:40..47]? 11 XX lock adc [%ax..%r15w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 19 XX lock sbb [%ax..%r15w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 21 XX lock and [%ax..%r15w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 29 XX lock sub [%ax..%r15w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 31 XX lock xor [%ax..%r15w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 81 XX/0 00 00 lock addw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 81 XX/1 00 00 lock orw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 81 XX/2 00 00 lock adcw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 81 XX/3 00 00 lock sbbw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 81 XX/4 00 00 lock andw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 81 XX/5 00 00 lock subw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 81 XX/6 00 00 lock xorw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 83 XX/0 00 lock addw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 83 XX/1 00 lock orw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 83 XX/2 00 lock adcw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 83 XX/3 00 lock sbbw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 83 XX/4 00 lock andw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 83 XX/5 00 lock subw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 83 XX/6 00 lock xorw $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? 87 XX lock xchg [%ax..%bx|%si..%r14w],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: f0 66 [REX:40..47]? f7 XX/2 lock notw [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? f7 XX/3 lock negw [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? ff XX/0 lock incw [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 66 [REX:40..47]? ff XX/1 lock decw [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 01 XX lock add [%eax..%r15d],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 09 XX lock or [%eax..%r15d],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 0f b1 XX lock cmpxchg [%eax..%ebx|%esi..%r14d],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: f0 [REX:40..47]? 0f ba XX/5 00 lock btsl $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 0f ba XX/6 00 lock btrl $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 0f ba XX/7 00 lock btcl $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 0f c1 XX lock xadd [%eax..%ebx|%esi..%r14d],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: f0 [REX:40..47]? 0f c7 XX/1 lock cmpxchg8b [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 11 XX lock adc [%eax..%r15d],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 19 XX lock sbb [%eax..%r15d],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 21 XX lock and [%eax..%r15d],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 29 XX lock sub [%eax..%r15d],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 31 XX lock xor [%eax..%r15d],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 81 XX/0 00 00 00 00 lock addl $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 81 XX/1 00 00 00 00 lock orl $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 81 XX/2 00 00 00 00 lock adcl $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 81 XX/3 00 00 00 00 lock sbbl $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 81 XX/4 00 00 00 00 lock andl $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 81 XX/5 00 00 00 00 lock subl $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 81 XX/6 00 00 00 00 lock xorl $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 83 XX/0 00 lock addl $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 83 XX/1 00 lock orl $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 83 XX/2 00 lock adcl $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 83 XX/3 00 lock sbbl $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 83 XX/4 00 lock andl $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 83 XX/5 00 lock subl $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 83 XX/6 00 lock xorl $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? 87 XX lock xchg [%eax..%ebx|%esi..%r14d],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: f0 [REX:40..47]? f7 XX/2 lock notl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? f7 XX/3 lock negl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? ff XX/0 lock incl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..47]? ff XX/1 lock decl [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..4f]? 00 XX lock add [%al..%r15b],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..4f]? 08 XX lock or [%al..%r15b],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..4f]? 0f b0 XX lock cmpxchg [%al..%bl|%ah..%bh|%sil..%r14b],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: f0 [REX:40..4f]? 0f c0 XX lock xadd [%al..%bl|%ah..%bh|%sil..%r14b],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: f0 [REX:40..4f]? 10 XX lock adc [%al..%r15b],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..4f]? 18 XX lock sbb [%al..%r15b],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..4f]? 20 XX lock and [%al..%r15b],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..4f]? 28 XX lock sub [%al..%r15b],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..4f]? 30 XX lock xor [%al..%r15b],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..4f]? 80 XX/0 00 lock addb $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..4f]? 80 XX/1 00 lock orb $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..4f]? 80 XX/2 00 lock adcb $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..4f]? 80 XX/3 00 lock sbbb $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..4f]? 80 XX/4 00 lock andb $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..4f]? 80 XX/5 00 lock subb $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..4f]? 80 XX/6 00 lock xorb $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..4f]? 86 XX lock xchg [%al..%bl|%ah..%bh|%sil..%r14b],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: f0 [REX:40..4f]? f6 XX/2 lock notb [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..4f]? f6 XX/3 lock negb [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..4f]? fe XX/0 lock incb [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:40..4f]? fe XX/1 lock decb [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 01 XX lock add [%rax..%r15],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 09 XX lock or [%rax..%r15],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 0f b1 XX lock cmpxchg [%rax..%rbx|%rsi..%r14],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: f0 [REX:48..4f] 0f ba XX/5 00 lock btsq $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 0f ba XX/6 00 lock btrq $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 0f ba XX/7 00 lock btcq $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 0f c1 XX lock xadd [%rax..%rbx|%rsi..%r14],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: f0 [REX:48..4f] 0f c7 XX/1 lock cmpxchg16b [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 11 XX lock adc [%rax..%r15],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 19 XX lock sbb [%rax..%r15],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 21 XX lock and [%rax..%r15],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 29 XX lock sub [%rax..%r15],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 31 XX lock xor [%rax..%r15],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 81 XX/0 00 00 00 00 lock addq $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 81 XX/1 00 00 00 00 lock orq $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 81 XX/2 00 00 00 00 lock adcq $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 81 XX/3 00 00 00 00 lock sbbq $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 81 XX/4 00 00 00 00 lock andq $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 81 XX/5 00 00 00 00 lock subq $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 81 XX/6 00 00 00 00 lock xorq $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 83 XX/0 00 lock addq $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 83 XX/1 00 lock orq $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 83 XX/2 00 lock adcq $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 83 XX/3 00 lock sbbq $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 83 XX/4 00 lock andq $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 83 XX/5 00 lock subq $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 83 XX/6 00 lock xorq $0x0,[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] 87 XX lock xchg [%rax..%rbx|%rsi..%r14],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None # write to both
|
| +Instruction: f0 [REX:48..4f] f7 XX/2 lock notq [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] f7 XX/3 lock negq [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] ff XX/0 lock incq [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f0 [REX:48..4f] ff XX/1 lock decq [memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..47]? 0f 2a XX cvtsi2sd[l]? [%eax..%r15d or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..47]? 0f 2c XX cvttsd2si [%xmm0..%xmm15 or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..47]? 0f 2d XX cvtsd2si [%xmm0..%xmm15 or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..47]? 0f 38 f0 XX crc32b [%al..%r15b or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..47]? 0f 38 f1 XX crc32l [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..4f]? 0f 10 XX movsd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..4f]? 0f 11 XX movsd [%xmm0..%xmm15],[%xmm0..%xmm15 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..4f]? 0f 12 XX movddup [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..4f]? 0f 2b XX movntsd [%xmm0..%xmm15],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..4f]? 0f 51 XX sqrtsd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..4f]? 0f 58 XX addsd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..4f]? 0f 59 XX mulsd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..4f]? 0f 5a XX cvtsd2ss [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..4f]? 0f 5c XX subsd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..4f]? 0f 5d XX minsd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..4f]? 0f 5e XX divsd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..4f]? 0f 5f XX maxsd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..4f]? 0f 70 XX 00 pshuflw $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..4f]? 0f 78 XX 00 00 insertq $0x0,$0x0,[%xmm0..%xmm15],[%xmm0..%xmm15]; input_rr=any_nonspecial; output_rr=None # rm to reg
|
| +Instruction: f2 [REX:40..4f]? 0f 79 XX insertq [%xmm0..%xmm15],[%xmm0..%xmm15]; input_rr=any_nonspecial; output_rr=None # rm to reg
|
| +Instruction: f2 [REX:40..4f]? 0f 7c XX haddps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..4f]? 0f 7d XX hsubps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..4f]? 0f c2 XX 00 cmpeqsd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..4f]? 0f d0 XX addsubps [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..4f]? 0f d6 XX movdq2q [%xmm0..%xmm15],[%mm0..%mm7]; input_rr=any_nonspecial; output_rr=None # rm to reg
|
| +Instruction: f2 [REX:40..4f]? 0f e6 XX cvtpd2dq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:40..4f]? 0f f0 XX lddqu [memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:48..4f] 0f 2a XX cvtsi2sd[q]? [%rax..%r15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:48..4f] 0f 2c XX cvttsd2si [%xmm0..%xmm15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:48..4f] 0f 2d XX cvtsd2si [%xmm0..%xmm15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:48..4f] 0f 38 f0 XX crc32b [%al..%r15b or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f2 [REX:48..4f] 0f 38 f1 XX crc32q [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 90 pause; input_rr=any_nonspecial; output_rr=None
|
| +Instruction: f3 [REX:40..47]? 0f 2a XX cvtsi2ss[l]? [%eax..%r15d or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..47]? 0f 2c XX cvttss2si [%xmm0..%xmm15 or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..47]? 0f 2d XX cvtss2si [%xmm0..%xmm15 or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..47]? 0f b8 XX popcnt [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..47]? 0f bc XX tzcnt [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..47]? 0f bd XX lzcnt [%eax..%r15d or memory],[%eax..%ebx|%esi..%r14d]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f 10 XX movss [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f 11 XX movss [%xmm0..%xmm15],[%xmm0..%xmm15 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f 12 XX movsldup [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f 16 XX movshdup [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f 2b XX movntss [%xmm0..%xmm15],[memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f 51 XX sqrtss [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f 52 XX rsqrtss [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f 53 XX rcpss [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f 58 XX addss [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f 59 XX mulss [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f 5a XX cvtss2sd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f 5b XX cvttps2dq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f 5c XX subss [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f 5d XX minss [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f 5e XX divss [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f 5f XX maxss [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f 6f XX movdqu [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f 70 XX 00 pshufhw $0x0,[%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f 7e XX movq [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f 7f XX movdqu [%xmm0..%xmm15],[%xmm0..%xmm15 or memory]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f c2 XX 00 cmpeqss [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:40..4f]? 0f d6 XX movq2dq [%mm0..%mm7],[%xmm0..%xmm15]; input_rr=any_nonspecial; output_rr=None # rm to reg
|
| +Instruction: f3 [REX:40..4f]? 0f e6 XX cvtdq2pd [%xmm0..%xmm15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:48..4f] 0f 2a XX cvtsi2ss[q]? [%rax..%r15 or memory],[%xmm0..%xmm15]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:48..4f] 0f 2c XX cvttss2si [%xmm0..%xmm15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:48..4f] 0f 2d XX cvtss2si [%xmm0..%xmm15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:48..4f] 0f b8 XX popcnt [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:48..4f] 0f bc XX tzcnt [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
| +Instruction: f3 [REX:48..4f] 0f bd XX lzcnt [%rax..%r15 or memory],[%rax..%rbx|%rsi..%r14]; input_rr=[%eax..%ebx|%esi..%r15d]; output_rr=None
|
|
|
Chromium Code Reviews
Issue 49183002:
Regular instructions golden file test.
Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client/