Chromium Code Reviews| Index: tests_lit/llvm2ice_tests/balloc.ll |
| diff --git a/tests_lit/llvm2ice_tests/balloc.ll b/tests_lit/llvm2ice_tests/balloc.ll |
| new file mode 100644 |
| index 0000000000000000000000000000000000000000..5d288f427a5006cfbcad639fc1f10a8ed5d7629d |
| --- /dev/null |
| +++ b/tests_lit/llvm2ice_tests/balloc.ll |
| @@ -0,0 +1,102 @@ |
| +; This is a real function that led to a bug in the address mode |
| +; optimization code. It followed assignment chains through non-SSA |
| +; temporaries created from Phi instruction lowering. |
| +; |
| +; This test depends to some degree on the stability of "--verbose |
| +; addropt" output format. |
| + |
| +; RUN: %llvm2ice -O2 --verbose addropt %s | FileCheck %s |
|
jvoung (off chromium)
2014/08/27 16:21:08
It would probably be better to name the file after
Jim Stichnoth
2014/08/27 20:23:15
Done.
|
| + |
| +declare i32 @_calloc_r(i32, i32, i32) |
| + |
| +define internal i32 @_Balloc(i32 %ptr, i32 %k) { |
| +entry: |
| + %gep = add i32 %ptr, 76 |
| + %gep.asptr = inttoptr i32 %gep to i32* |
| + %0 = load i32* %gep.asptr, align 1 |
| + %cmp = icmp eq i32 %0, 0 |
| + br i1 %cmp, label %if.then, label %if.end5 |
| + |
| +if.then: ; preds = %entry |
| + %call = tail call i32 @_calloc_r(i32 %ptr, i32 4, i32 33) |
| + %gep.asptr2 = inttoptr i32 %gep to i32* |
| + store i32 %call, i32* %gep.asptr2, align 1 |
| + %cmp3 = icmp eq i32 %call, 0 |
| + br i1 %cmp3, label %return, label %if.end5 |
| + |
| +if.end5: ; preds = %if.then, %entry |
| + %1 = phi i32 [ %call, %if.then ], [ %0, %entry ] |
| + %gep_array = mul i32 %k, 4 |
| + %gep2 = add i32 %1, %gep_array |
| + %gep2.asptr = inttoptr i32 %gep2 to i32* |
| + %2 = load i32* %gep2.asptr, align 1 |
| +; The above load instruction is a good target for address mode |
| +; optimization. Correct analysis would lead to dump output like: |
| +; Starting computeAddressOpt for instruction: |
| +; [ 15] %__13 = load i32* %gep2.asptr, align 1 |
| +; Instruction: [ 14] %gep2.asptr = i32 %gep2 |
| +; results in Base=%gep2, Index=<null>, Shift=0, Offset=0 |
| +; Instruction: [ 13] %gep2 = add i32 %__9, %gep_array |
| +; results in Base=%__9, Index=%gep_array, Shift=0, Offset=0 |
| +; Instruction: [ 46] %__9 = i32 %__9_phi |
| +; results in Base=%__9_phi, Index=%gep_array, Shift=0, Offset=0 |
| +; Instruction: [ 12] %gep_array = mul i32 %k, 4 |
| +; results in Base=%__9_phi, Index=%k, Shift=2, Offset=0 |
| +; |
| +; Incorrect, overly-aggressive analysis would lead to output like: |
| +; Starting computeAddressOpt for instruction: |
| +; [ 15] %__13 = load i32* %gep2.asptr, align 1 |
| +; Instruction: [ 14] %gep2.asptr = i32 %gep2 |
| +; results in Base=%gep2, Index=<null>, Shift=0, Offset=0 |
| +; Instruction: [ 13] %gep2 = add i32 %__9, %gep_array |
| +; results in Base=%__9, Index=%gep_array, Shift=0, Offset=0 |
| +; Instruction: [ 46] %__9 = i32 %__9_phi |
| +; results in Base=%__9_phi, Index=%gep_array, Shift=0, Offset=0 |
| +; Instruction: [ 49] %__9_phi = i32 %__4 |
| +; results in Base=%__4, Index=%gep_array, Shift=0, Offset=0 |
| +; Instruction: [ 12] %gep_array = mul i32 %k, 4 |
| +; results in Base=%__4, Index=%k, Shift=2, Offset=0 |
| +; |
| +; CHECK-NOT: results in Base=%__4, |
| +; |
| + %cmp7 = icmp eq i32 %2, 0 |
| + br i1 %cmp7, label %if.else, label %if.then8 |
| + |
| +if.then8: ; preds = %if.end5 |
| + %.asptr = inttoptr i32 %2 to i32* |
|
jvoung (off chromium)
2014/08/27 16:21:08
Does the rest of this test matter, or can it just
Jim Stichnoth
2014/08/27 20:23:15
Done.
|
| + %3 = load i32* %.asptr, align 1 |
| + %gep2.asptr3 = inttoptr i32 %gep2 to i32* |
| + store i32 %3, i32* %gep2.asptr3, align 1 |
| + br label %if.end15 |
| + |
| +if.else: ; preds = %if.end5 |
| + %shl = shl i32 1, %k |
| + %sub = shl i32 %shl, 2 |
| + %add = add i32 %sub, 20 |
| + %call11 = tail call i32 @_calloc_r(i32 %ptr, i32 1, i32 %add) |
| + %cmp12 = icmp eq i32 %call11, 0 |
| + br i1 %cmp12, label %return, label %if.end14 |
| + |
| +if.end14: ; preds = %if.else |
| + %gep5 = add i32 %call11, 4 |
| + %gep5.asptr = inttoptr i32 %gep5 to i32* |
| + store i32 %k, i32* %gep5.asptr, align 1 |
| + %gep7 = add i32 %call11, 8 |
| + %gep7.asptr = inttoptr i32 %gep7 to i32* |
| + store i32 %shl, i32* %gep7.asptr, align 1 |
| + br label %if.end15 |
| + |
| +if.end15: ; preds = %if.end14, %if.then8 |
| + %rv.0 = phi i32 [ %2, %if.then8 ], [ %call11, %if.end14 ] |
| + %gep9 = add i32 %rv.0, 16 |
| + %gep9.asptr = inttoptr i32 %gep9 to i32* |
| + store i32 0, i32* %gep9.asptr, align 1 |
| + %gep11 = add i32 %rv.0, 12 |
| + %gep11.asptr = inttoptr i32 %gep11 to i32* |
| + store i32 0, i32* %gep11.asptr, align 1 |
| + br label %return |
| + |
| +return: ; preds = %if.end15, %if.else, %if.then |
| + %retval.0 = phi i32 [ %rv.0, %if.end15 ], [ 0, %if.then ], [ 0, %if.else ] |
| + ret i32 %retval.0 |
| +} |