Subzero: Fix address mode optimization involving phi temporaries.

src/IceTargetLoweringX8632.cpp

 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the TargetLoweringX8632 class, which
@@ skipping 2589 matching lines @@
     if (Var->hasReg())
       IsSrc1ImmOrReg = true;
   }
 
   // Try to fuse a compare immediately followed by a conditional branch.  This
   // is possible when the compare dest and the branch source operands are the
   // same, and are their only uses.  TODO: implement this optimization for i64.
   if (InstBr *NextBr = llvm::dyn_cast_or_null<InstBr>(Context.getNextInst())) {
     if (Src0->getType() != IceType_i64 && !NextBr->isUnconditional() &&
         Dest == NextBr->getSrc(0) && NextBr->isLastUse(Dest)) {
+      NextBr->setDeleted();
       Operand *Src0RM = legalize(
           Src0, IsSrc1ImmOrReg ? (Legal_Reg | Legal_Mem) : Legal_Reg, true);
       _cmp(Src0RM, Src1);
       _br(getIcmp32Mapping(Inst->getCondition()), NextBr->getTargetTrue(),
           NextBr->getTargetFalse());
       // Skip over the following branch instruction.
-      NextBr->setDeleted();
       Context.advanceNext();
       return;
     }
   }
 
   // a=icmp cond, b, c ==> cmp b,c; a=1; br cond,L1; FakeUse(a); a=0; L1:
   Constant *Zero = Ctx->getConstantZero(IceType_i32);
   Constant *One = Ctx->getConstantInt(IceType_i32, 1);
   if (Src0->getType() == IceType_i64) {
     InstIcmp::ICond Condition = Inst->getCondition();
@@ skipping 560 matching lines @@
       return false;
     if (InstBr *NextBr = llvm::dyn_cast<InstBr>(NextInst)) {
       if (!NextBr->isUnconditional() &&
           NextCmp->getDest() == NextBr->getCondition() &&
           NextBr->isLastUse(NextCmp->getDest())) {
         lowerAtomicCmpxchg(Dest, PtrToMem, Expected, Desired);
         for (size_t i = 0; i < PhiAssigns.size(); ++i) {
           // Lower the phi assignments now, before the branch (same placement
           // as before).
           InstAssign *PhiAssign = PhiAssigns[i];
+          PhiAssign->setDeleted();
           lowerAssign(PhiAssign);
-          PhiAssign->setDeleted();
           Context.advanceNext();
         }
         _br(InstX8632::Br_e, NextBr->getTargetTrue(), NextBr->getTargetFalse());
         // Skip over the old compare and branch, by deleting them.
         NextCmp->setDeleted();
         NextBr->setDeleted();
         Context.advanceNext();
         Context.advanceNext();
         return true;
       }
@@ skipping 266 matching lines @@
 namespace {
 
 bool isAdd(const Inst *Inst) {
   if (const InstArithmetic *Arith =
           llvm::dyn_cast_or_null<const InstArithmetic>(Inst)) {
     return (Arith->getOp() == InstArithmetic::Add);
   }
   return false;
 }
 
-void computeAddressOpt(Variable *&Base, Variable *&Index, uint16_t &Shift,
-                       int32_t &Offset) {
+void dumpAddressOpt(const Cfg *Func, const Variable *Base,
+                    const Variable *Index, uint16_t Shift, int32_t Offset,
+                    const Inst *Reason) {
+  if (!Func->getContext()->isVerbose(IceV_AddrOpt))
+    return;
+  Ostream &Str = Func->getContext()->getStrDump();
+  Str << "Instruction: ";
+  Reason->dumpDecorated(Func);
+  Str << "  results in Base=";
+  if (Base)
+    Base->dump(Func);
+  else
+    Str << "<null>";
+  Str << ", Index=";
+  if (Index)
+    Index->dump(Func);
+  else
+    Str << "<null>";
+  Str << ", Shift=" << Shift << ", Offset=" << Offset << "\n";
+}
+
+void computeAddressOpt(Cfg *Func, const Inst *Instr, Variable *&Base,
+                       Variable *&Index, uint16_t &Shift, int32_t &Offset) {
+  Func->setCurrentNode(NULL);
+  if (Func->getContext()->isVerbose(IceV_AddrOpt)) {
+    Ostream &Str = Func->getContext()->getStrDump();
+    Str << "\nStarting computeAddressOpt for instruction:\n  ";
+    Instr->dumpDecorated(Func);
+  }
   (void)Offset; // TODO: pattern-match for non-zero offsets.
   if (Base == NULL)
     return;
   // If the Base has more than one use or is live across multiple
   // blocks, then don't go further.  Alternatively (?), never consider
   // a transformation that would change a variable that is currently
   // *not* live across basic block boundaries into one that *is*.
   if (Base->isMultiblockLife() /* || Base->getUseCount() > 1*/)
     return;
 
   while (true) {
     // Base is Base=Var ==>
     //   set Base=Var
     const Inst *BaseInst = Base->getDefinition();
     Operand *BaseOperand0 = BaseInst ? BaseInst->getSrc(0) : NULL;
     Variable *BaseVariable0 = llvm::dyn_cast_or_null<Variable>(BaseOperand0);
     // TODO: Helper function for all instances of assignment
     // transitivity.
     if (BaseInst && llvm::isa<InstAssign>(BaseInst) && BaseVariable0 &&
         // TODO: ensure BaseVariable0 stays single-BB
         true) {
       Base = BaseVariable0;
+      dumpAddressOpt(Func, Base, Index, Shift, Offset, BaseInst);
       continue;
     }
 
     // Index is Index=Var ==>
     //   set Index=Var
 
     // Index==NULL && Base is Base=Var1+Var2 ==>
     //   set Base=Var1, Index=Var2, Shift=0
     Operand *BaseOperand1 =
         BaseInst && BaseInst->getSrcSize() >= 2 ? BaseInst->getSrc(1) : NULL;
     Variable *BaseVariable1 = llvm::dyn_cast_or_null<Variable>(BaseOperand1);
     if (Index == NULL && isAdd(BaseInst) && BaseVariable0 && BaseVariable1 &&
         // TODO: ensure BaseVariable0 and BaseVariable1 stay single-BB
         true) {
       Base = BaseVariable0;
       Index = BaseVariable1;
       Shift = 0; // should already have been 0
+      dumpAddressOpt(Func, Base, Index, Shift, Offset, BaseInst);
       continue;
     }
 
     // Index is Index=Var*Const && log2(Const)+Shift<=3 ==>
     //   Index=Var, Shift+=log2(Const)
     const Inst *IndexInst = Index ? Index->getDefinition() : NULL;
     if (const InstArithmetic *ArithInst =
             llvm::dyn_cast_or_null<InstArithmetic>(IndexInst)) {
       Operand *IndexOperand0 = ArithInst->getSrc(0);
       Variable *IndexVariable0 = llvm::dyn_cast<Variable>(IndexOperand0);
@@ skipping 17 matching lines @@
         case 8:
           LogMult = 3;
           break;
         default:
           LogMult = 4;
           break;
         }
         if (Shift + LogMult <= 3) {
           Index = IndexVariable0;
           Shift += LogMult;
+          dumpAddressOpt(Func, Base, Index, Shift, Offset, IndexInst);
           continue;
         }
       }
     }
 
     // Base is Base=Var+Const || Base is Base=Const+Var ==>
     //   set Base=Var, Offset+=Const
     // Base is Base=Var-Const ==>
     //   set Base=Var, Offset-=Const
     const InstArithmetic *ArithInst =
         llvm::dyn_cast_or_null<const InstArithmetic>(BaseInst);
     if (ArithInst && (ArithInst->getOp() == InstArithmetic::Add ||
                       ArithInst->getOp() == InstArithmetic::Sub)) {
       bool IsAdd = ArithInst->getOp() == InstArithmetic::Add;
       Variable *Var = NULL;
       ConstantInteger *Const = NULL;
       if (Variable *VariableOperand =
               llvm::dyn_cast<Variable>(ArithInst->getSrc(0))) {
         Var = VariableOperand;
         Const = llvm::dyn_cast<ConstantInteger>(ArithInst->getSrc(1));
       } else if (IsAdd) {
         Const = llvm::dyn_cast<ConstantInteger>(ArithInst->getSrc(0));
         Var = llvm::dyn_cast<Variable>(ArithInst->getSrc(1));
       }
       if (!(Const && Var)) {
         break;
       }
       Base = Var;
       Offset += IsAdd ? Const->getValue() : -Const->getValue();
+      dumpAddressOpt(Func, Base, Index, Shift, Offset, BaseInst);
       continue;
     }
 
     // Index is Index=Var<<Const && Const+Shift<=3 ==>
     //   Index=Var, Shift+=Const
 
     // Index is Index=Const*Var && log2(Const)+Shift<=3 ==>
     //   Index=Var, Shift+=log2(Const)
 
     // Index && Shift==0 && Base is Base=Var*Const && log2(Const)+Shift<=3 ==>
@@ skipping 75 matching lines @@
   Variable *Index = NULL;
   uint16_t Shift = 0;
   int32_t Offset = 0; // TODO: make Constant
   // Vanilla ICE load instructions should not use the segment registers,
   // and computeAddressOpt only works at the level of Variables and Constants,
   // not other OperandX8632Mem, so there should be no mention of segment
   // registers there either.
   const OperandX8632Mem::SegmentRegisters SegmentReg =
       OperandX8632Mem::DefaultSegment;
   Variable *Base = llvm::dyn_cast<Variable>(Addr);
-  computeAddressOpt(Base, Index, Shift, Offset);
+  computeAddressOpt(Func, Inst, Base, Index, Shift, Offset);
   if (Base && Addr != Base) {
+    Inst->setDeleted();
     Constant *OffsetOp = Ctx->getConstantInt(IceType_i32, Offset);
     Addr = OperandX8632Mem::create(Func, Dest->getType(), Base, OffsetOp, Index,
                                    Shift, SegmentReg);
-    Inst->setDeleted();
     Context.insert(InstLoad::create(Func, Dest, Addr));
   }
 }
 
 void TargetX8632::randomlyInsertNop(float Probability) {
   RandomNumberGeneratorWrapper RNG(Ctx->getRNG());
   if (RNG.getTrueWithProbability(Probability)) {
     _nop(RNG.next(X86_NUM_NOP_VARIANTS));
   }
 }
@@ skipping 156 matching lines @@
   Variable *Index = NULL;
   uint16_t Shift = 0;
   int32_t Offset = 0; // TODO: make Constant
   Variable *Base = llvm::dyn_cast<Variable>(Addr);
   // Vanilla ICE store instructions should not use the segment registers,
   // and computeAddressOpt only works at the level of Variables and Constants,
   // not other OperandX8632Mem, so there should be no mention of segment
   // registers there either.
   const OperandX8632Mem::SegmentRegisters SegmentReg =
       OperandX8632Mem::DefaultSegment;
-  computeAddressOpt(Base, Index, Shift, Offset);
+  computeAddressOpt(Func, Inst, Base, Index, Shift, Offset);
   if (Base && Addr != Base) {
+    Inst->setDeleted();
     Constant *OffsetOp = Ctx->getConstantInt(IceType_i32, Offset);
     Addr = OperandX8632Mem::create(Func, Data->getType(), Base, OffsetOp, Index,
                                    Shift, SegmentReg);
-    Inst->setDeleted();
     Context.insert(InstStore::create(Func, Data, Addr));
   }
 }
 
 void TargetX8632::lowerSwitch(const InstSwitch *Inst) {
   // This implements the most naive possible lowering.
   // cmp a,val[0]; jeq label[0]; cmp a,val[1]; jeq label[1]; ... jmp default
   Operand *Src0 = Inst->getComparison();
   SizeT NumCases = Inst->getNumCases();
   // OK, we'll be slightly less naive by forcing Src into a physical
@@ skipping 51 matching lines @@
 //
 // We can eliminate the sext operation by copying the result of pcmpeqd,
 // pcmpgtd, or cmpps (which produce sign extended results) to the result
 // of the sext operation.
 void
 TargetX8632::eliminateNextVectorSextInstruction(Variable *SignExtendedResult) {
   if (InstCast *NextCast =
           llvm::dyn_cast_or_null<InstCast>(Context.getNextInst())) {
     if (NextCast->getCastKind() == InstCast::Sext &&
         NextCast->getSrc(0) == SignExtendedResult) {
+      NextCast->setDeleted();
       _movp(NextCast->getDest(), legalizeToVar(SignExtendedResult));
       // Skip over the instruction.
-      NextCast->setDeleted();
       Context.advanceNext();
     }
   }
 }
 
 void TargetX8632::lowerUnreachable(const InstUnreachable * /*Inst*/) {
   const SizeT MaxSrcs = 0;
   Variable *Dest = NULL;
   InstCall *Call = makeHelperCall("ice_unreachable", Dest, MaxSrcs);
   lowerCall(Call);
@@ skipping 428 matching lines @@
     Str << "\t.align\t" << Align << "\n";
     Str << MangledName << ":\n";
     for (SizeT i = 0; i < Size; ++i) {
       Str << "\t.byte\t" << (((unsigned)Data[i]) & 0xff) << "\n";
     }
     Str << "\t.size\t" << MangledName << ", " << Size << "\n";
   }
 }
 
 } // end of namespace Ice