Chromium Code Reviews| OLD | NEW |
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| 1 ; This is a real function that led to a bug in the address mode | |
| 2 ; optimization code. It followed assignment chains through non-SSA | |
| 3 ; temporaries created from Phi instruction lowering. | |
| 4 ; | |
| 5 ; This test depends to some degree on the stability of "--verbose | |
| 6 ; addropt" output format. | |
| 7 | |
| 8 ; RUN: %llvm2ice -O2 --verbose addropt %s | FileCheck %s | |
|
jvoung (off chromium)
2014/08/27 16:21:08
It would probably be better to name the file after
Jim Stichnoth
2014/08/27 20:23:15
Done.
| |
| 9 | |
| 10 declare i32 @_calloc_r(i32, i32, i32) | |
| 11 | |
| 12 define internal i32 @_Balloc(i32 %ptr, i32 %k) { | |
| 13 entry: | |
| 14 %gep = add i32 %ptr, 76 | |
| 15 %gep.asptr = inttoptr i32 %gep to i32* | |
| 16 %0 = load i32* %gep.asptr, align 1 | |
| 17 %cmp = icmp eq i32 %0, 0 | |
| 18 br i1 %cmp, label %if.then, label %if.end5 | |
| 19 | |
| 20 if.then: ; preds = %entry | |
| 21 %call = tail call i32 @_calloc_r(i32 %ptr, i32 4, i32 33) | |
| 22 %gep.asptr2 = inttoptr i32 %gep to i32* | |
| 23 store i32 %call, i32* %gep.asptr2, align 1 | |
| 24 %cmp3 = icmp eq i32 %call, 0 | |
| 25 br i1 %cmp3, label %return, label %if.end5 | |
| 26 | |
| 27 if.end5: ; preds = %if.then, %entry | |
| 28 %1 = phi i32 [ %call, %if.then ], [ %0, %entry ] | |
| 29 %gep_array = mul i32 %k, 4 | |
| 30 %gep2 = add i32 %1, %gep_array | |
| 31 %gep2.asptr = inttoptr i32 %gep2 to i32* | |
| 32 %2 = load i32* %gep2.asptr, align 1 | |
| 33 ; The above load instruction is a good target for address mode | |
| 34 ; optimization. Correct analysis would lead to dump output like: | |
| 35 ; Starting computeAddressOpt for instruction: | |
| 36 ; [ 15] %__13 = load i32* %gep2.asptr, align 1 | |
| 37 ; Instruction: [ 14] %gep2.asptr = i32 %gep2 | |
| 38 ; results in Base=%gep2, Index=<null>, Shift=0, Offset=0 | |
| 39 ; Instruction: [ 13] %gep2 = add i32 %__9, %gep_array | |
| 40 ; results in Base=%__9, Index=%gep_array, Shift=0, Offset=0 | |
| 41 ; Instruction: [ 46] %__9 = i32 %__9_phi | |
| 42 ; results in Base=%__9_phi, Index=%gep_array, Shift=0, Offset=0 | |
| 43 ; Instruction: [ 12] %gep_array = mul i32 %k, 4 | |
| 44 ; results in Base=%__9_phi, Index=%k, Shift=2, Offset=0 | |
| 45 ; | |
| 46 ; Incorrect, overly-aggressive analysis would lead to output like: | |
| 47 ; Starting computeAddressOpt for instruction: | |
| 48 ; [ 15] %__13 = load i32* %gep2.asptr, align 1 | |
| 49 ; Instruction: [ 14] %gep2.asptr = i32 %gep2 | |
| 50 ; results in Base=%gep2, Index=<null>, Shift=0, Offset=0 | |
| 51 ; Instruction: [ 13] %gep2 = add i32 %__9, %gep_array | |
| 52 ; results in Base=%__9, Index=%gep_array, Shift=0, Offset=0 | |
| 53 ; Instruction: [ 46] %__9 = i32 %__9_phi | |
| 54 ; results in Base=%__9_phi, Index=%gep_array, Shift=0, Offset=0 | |
| 55 ; Instruction: [ 49] %__9_phi = i32 %__4 | |
| 56 ; results in Base=%__4, Index=%gep_array, Shift=0, Offset=0 | |
| 57 ; Instruction: [ 12] %gep_array = mul i32 %k, 4 | |
| 58 ; results in Base=%__4, Index=%k, Shift=2, Offset=0 | |
| 59 ; | |
| 60 ; CHECK-NOT: results in Base=%__4, | |
| 61 ; | |
| 62 %cmp7 = icmp eq i32 %2, 0 | |
| 63 br i1 %cmp7, label %if.else, label %if.then8 | |
| 64 | |
| 65 if.then8: ; preds = %if.end5 | |
| 66 %.asptr = inttoptr i32 %2 to i32* | |
|
jvoung (off chromium)
2014/08/27 16:21:08
Does the rest of this test matter, or can it just
Jim Stichnoth
2014/08/27 20:23:15
Done.
| |
| 67 %3 = load i32* %.asptr, align 1 | |
| 68 %gep2.asptr3 = inttoptr i32 %gep2 to i32* | |
| 69 store i32 %3, i32* %gep2.asptr3, align 1 | |
| 70 br label %if.end15 | |
| 71 | |
| 72 if.else: ; preds = %if.end5 | |
| 73 %shl = shl i32 1, %k | |
| 74 %sub = shl i32 %shl, 2 | |
| 75 %add = add i32 %sub, 20 | |
| 76 %call11 = tail call i32 @_calloc_r(i32 %ptr, i32 1, i32 %add) | |
| 77 %cmp12 = icmp eq i32 %call11, 0 | |
| 78 br i1 %cmp12, label %return, label %if.end14 | |
| 79 | |
| 80 if.end14: ; preds = %if.else | |
| 81 %gep5 = add i32 %call11, 4 | |
| 82 %gep5.asptr = inttoptr i32 %gep5 to i32* | |
| 83 store i32 %k, i32* %gep5.asptr, align 1 | |
| 84 %gep7 = add i32 %call11, 8 | |
| 85 %gep7.asptr = inttoptr i32 %gep7 to i32* | |
| 86 store i32 %shl, i32* %gep7.asptr, align 1 | |
| 87 br label %if.end15 | |
| 88 | |
| 89 if.end15: ; preds = %if.end14, %if.then8 | |
| 90 %rv.0 = phi i32 [ %2, %if.then8 ], [ %call11, %if.end14 ] | |
| 91 %gep9 = add i32 %rv.0, 16 | |
| 92 %gep9.asptr = inttoptr i32 %gep9 to i32* | |
| 93 store i32 0, i32* %gep9.asptr, align 1 | |
| 94 %gep11 = add i32 %rv.0, 12 | |
| 95 %gep11.asptr = inttoptr i32 %gep11 to i32* | |
| 96 store i32 0, i32* %gep11.asptr, align 1 | |
| 97 br label %return | |
| 98 | |
| 99 return: ; preds = %if.end15, %if.else, %if.then | |
| 100 %retval.0 = phi i32 [ %rv.0, %if.end15 ], [ 0, %if.then ], [ 0, %if.else ] | |
| 101 ret i32 %retval.0 | |
| 102 } | |
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