Subzero: Fix address mode optimization involving phi temporaries.

src/IceTargetLoweringX8632.cpp

 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the TargetLoweringX8632 class, which
@@ skipping 3464 matching lines @@
 namespace {
 
 bool isAdd(const Inst *Inst) {
   if (const InstArithmetic *Arith =
           llvm::dyn_cast_or_null<const InstArithmetic>(Inst)) {
     return (Arith->getOp() == InstArithmetic::Add);
   }
   return false;
 }
 
-void computeAddressOpt(Variable *&Base, Variable *&Index, uint16_t &Shift,
-                       int32_t &Offset) {
+void dumpAddressOpt(const Cfg *Func, const Variable *Base,
+                    const Variable *Index, uint16_t Shift, int32_t Offset,
+                    const Inst *Reason) {
+  if (!Func->getContext()->isVerbose(IceV_AddrOpt))
+    return;
+  Ostream &Str = Func->getContext()->getStrDump();
+  Str << "Instruction: ";
+  Reason->dumpDecorated(Func);
+  Str << "  results in Base=";
+  if (Base)
+    Base->dump(Func);
+  else
+    Str << "<null>";
+  Str << ", Index=";
+  if (Index)
+    Index->dump(Func);
+  else
+    Str << "<null>";
+  Str << ", Shift=" << Shift << ", Offset=" << Offset << "\n";
+}
+
+void computeAddressOpt(Cfg *Func, const Inst *Instr, Variable *&Base,
+                       Variable *&Index, uint16_t &Shift, int32_t &Offset) {
+  Func->setCurrentNode(NULL);
+  if (Func->getContext()->isVerbose(IceV_AddrOpt)) {
+    Ostream &Str = Func->getContext()->getStrDump();
+    Str << "\nStarting computeAddressOpt for instruction:\n  ";
+    Instr->dumpDecorated(Func);
+  }
   (void)Offset; // TODO: pattern-match for non-zero offsets.
   if (Base == NULL)
     return;
   // If the Base has more than one use or is live across multiple
   // blocks, then don't go further.  Alternatively (?), never consider
   // a transformation that would change a variable that is currently
   // *not* live across basic block boundaries into one that *is*.
   if (Base->isMultiblockLife() /* || Base->getUseCount() > 1*/)
     return;
 
   while (true) {
     // Base is Base=Var ==>
     //   set Base=Var
     const Inst *BaseInst = Base->getDefinition();
     Operand *BaseOperand0 = BaseInst ? BaseInst->getSrc(0) : NULL;
     Variable *BaseVariable0 = llvm::dyn_cast_or_null<Variable>(BaseOperand0);
     // TODO: Helper function for all instances of assignment
     // transitivity.
     if (BaseInst && llvm::isa<InstAssign>(BaseInst) && BaseVariable0 &&
         // TODO: ensure BaseVariable0 stays single-BB

[jvoung (off chromium), 2014/08/27 16:21:07]

Does this take care of the TODO?

Maybe not the one below, because that's assuming the BaseInst is an add instead
of an assign.

[Jim Stichnoth, 2014/08/27 20:23:14]

I don't think so.  This needs to be tuned, but my feeling about address mode
optimization is to try to avoid using variables in the expression that are
defined far away, because that may increase register pressure.  Single-BB is an
approximation for defined not far away.

         true) {
       Base = BaseVariable0;
+      dumpAddressOpt(Func, Base, Index, Shift, Offset, BaseInst);
       continue;
     }
 
     // Index is Index=Var ==>
     //   set Index=Var
 
     // Index==NULL && Base is Base=Var1+Var2 ==>
     //   set Base=Var1, Index=Var2, Shift=0
     Operand *BaseOperand1 =
         BaseInst && BaseInst->getSrcSize() >= 2 ? BaseInst->getSrc(1) : NULL;
     Variable *BaseVariable1 = llvm::dyn_cast_or_null<Variable>(BaseOperand1);
     if (Index == NULL && isAdd(BaseInst) && BaseVariable0 && BaseVariable1 &&
         // TODO: ensure BaseVariable0 and BaseVariable1 stay single-BB
         true) {
       Base = BaseVariable0;
       Index = BaseVariable1;
       Shift = 0; // should already have been 0
+      dumpAddressOpt(Func, Base, Index, Shift, Offset, BaseInst);
       continue;
     }
 
     // Index is Index=Var*Const && log2(Const)+Shift<=3 ==>
     //   Index=Var, Shift+=log2(Const)
     const Inst *IndexInst = Index ? Index->getDefinition() : NULL;
     if (const InstArithmetic *ArithInst =
             llvm::dyn_cast_or_null<InstArithmetic>(IndexInst)) {
       Operand *IndexOperand0 = ArithInst->getSrc(0);
       Variable *IndexVariable0 = llvm::dyn_cast<Variable>(IndexOperand0);
@@ skipping 17 matching lines @@
         case 8:
           LogMult = 3;
           break;
         default:
           LogMult = 4;
           break;
         }
         if (Shift + LogMult <= 3) {
           Index = IndexVariable0;
           Shift += LogMult;
+          dumpAddressOpt(Func, Base, Index, Shift, Offset, IndexInst);
           continue;
         }
       }
     }
 
     // Base is Base=Var+Const || Base is Base=Const+Var ==>
     //   set Base=Var, Offset+=Const
     // Base is Base=Var-Const ==>
     //   set Base=Var, Offset-=Const
     const InstArithmetic *ArithInst =
         llvm::dyn_cast_or_null<const InstArithmetic>(BaseInst);
     if (ArithInst && (ArithInst->getOp() == InstArithmetic::Add ||
                       ArithInst->getOp() == InstArithmetic::Sub)) {
       bool IsAdd = ArithInst->getOp() == InstArithmetic::Add;
       Variable *Var = NULL;
       ConstantInteger *Const = NULL;
       if (Variable *VariableOperand =
               llvm::dyn_cast<Variable>(ArithInst->getSrc(0))) {
         Var = VariableOperand;
         Const = llvm::dyn_cast<ConstantInteger>(ArithInst->getSrc(1));
       } else if (IsAdd) {
         Const = llvm::dyn_cast<ConstantInteger>(ArithInst->getSrc(0));
         Var = llvm::dyn_cast<Variable>(ArithInst->getSrc(1));
       }
       if (!(Const && Var)) {
         break;
       }
       Base = Var;
       Offset += IsAdd ? Const->getValue() : -Const->getValue();
+      dumpAddressOpt(Func, Base, Index, Shift, Offset, BaseInst);
       continue;
     }
 
     // Index is Index=Var<<Const && Const+Shift<=3 ==>
     //   Index=Var, Shift+=Const
 
     // Index is Index=Const*Var && log2(Const)+Shift<=3 ==>
     //   Index=Var, Shift+=log2(Const)
 
     // Index && Shift==0 && Base is Base=Var*Const && log2(Const)+Shift<=3 ==>
@@ skipping 75 matching lines @@
   Variable *Index = NULL;
   uint16_t Shift = 0;
   int32_t Offset = 0; // TODO: make Constant
   // Vanilla ICE load instructions should not use the segment registers,
   // and computeAddressOpt only works at the level of Variables and Constants,
   // not other OperandX8632Mem, so there should be no mention of segment
   // registers there either.
   const OperandX8632Mem::SegmentRegisters SegmentReg =
       OperandX8632Mem::DefaultSegment;
   Variable *Base = llvm::dyn_cast<Variable>(Addr);
-  computeAddressOpt(Base, Index, Shift, Offset);
+  computeAddressOpt(Func, Inst, Base, Index, Shift, Offset);
   if (Base && Addr != Base) {
     Constant *OffsetOp = Ctx->getConstantInt(IceType_i32, Offset);
     Addr = OperandX8632Mem::create(Func, Dest->getType(), Base, OffsetOp, Index,
                                    Shift, SegmentReg);
     Inst->setDeleted();
     Context.insert(InstLoad::create(Func, Dest, Addr));
   }
 }
 
 void TargetX8632::randomlyInsertNop(float Probability) {
@@ skipping 161 matching lines @@
   Variable *Index = NULL;
   uint16_t Shift = 0;
   int32_t Offset = 0; // TODO: make Constant
   Variable *Base = llvm::dyn_cast<Variable>(Addr);
   // Vanilla ICE store instructions should not use the segment registers,
   // and computeAddressOpt only works at the level of Variables and Constants,
   // not other OperandX8632Mem, so there should be no mention of segment
   // registers there either.
   const OperandX8632Mem::SegmentRegisters SegmentReg =
       OperandX8632Mem::DefaultSegment;
-  computeAddressOpt(Base, Index, Shift, Offset);
+  computeAddressOpt(Func, Inst, Base, Index, Shift, Offset);
   if (Base && Addr != Base) {
     Constant *OffsetOp = Ctx->getConstantInt(IceType_i32, Offset);
     Addr = OperandX8632Mem::create(Func, Data->getType(), Base, OffsetOp, Index,
                                    Shift, SegmentReg);
     Inst->setDeleted();
     Context.insert(InstStore::create(Func, Data, Addr));
   }
 }
 
 void TargetX8632::lowerSwitch(const InstSwitch *Inst) {
@@ skipping 507 matching lines @@
     Str << "\t.align\t" << Align << "\n";
     Str << MangledName << ":\n";
     for (SizeT i = 0; i < Size; ++i) {
       Str << "\t.byte\t" << (((unsigned)Data[i]) & 0xff) << "\n";
     }
     Str << "\t.size\t" << MangledName << ", " << Size << "\n";
   }
 }
 
 } // end of namespace Ice