Index: src/ic/arm64/ic-conventions-arm64.cc |
diff --git a/src/ic/arm64/ic-conventions-arm64.cc b/src/ic/arm64/ic-conventions-arm64.cc |
new file mode 100644 |
index 0000000000000000000000000000000000000000..53c846e3cb2f63ddfa9c6b22b8471cf0b64e6d6b |
--- /dev/null |
+++ b/src/ic/arm64/ic-conventions-arm64.cc |
@@ -0,0 +1,40 @@ |
+// Copyright 2013 the V8 project authors. All rights reserved. |
+// Use of this source code is governed by a BSD-style license that can be |
+// found in the LICENSE file. |
+ |
+#include "src/v8.h" |
+ |
+#if V8_TARGET_ARCH_ARM64 |
+ |
+#include "src/codegen.h" |
+#include "src/ic/ic-conventions.h" |
+ |
+namespace v8 { |
+namespace internal { |
+ |
+// IC register specifications |
+const Register LoadConvention::ReceiverRegister() { return x1; } |
+const Register LoadConvention::NameRegister() { return x2; } |
+ |
+const Register VectorLoadConvention::SlotRegister() { |
+ DCHECK(FLAG_vector_ics); |
+ return x0; |
+} |
+ |
+ |
+const Register FullVectorLoadConvention::VectorRegister() { |
+ DCHECK(FLAG_vector_ics); |
+ return x3; |
+} |
+ |
+ |
+const Register StoreConvention::ReceiverRegister() { return x1; } |
+const Register StoreConvention::NameRegister() { return x2; } |
+const Register StoreConvention::ValueRegister() { return x0; } |
+ |
+ |
+const Register StoreConvention::MapRegister() { return x3; } |
+} |
+} // namespace v8::internal |
+ |
+#endif // V8_TARGET_ARCH_ARM64 |